blob: a5421809fa340986fd7ef58ef0327d4a07589a2d [file] [log] [blame]
Xiaohu.Huangf78b48b2022-01-17 10:41:38 +08001/*
2 * Copyright (c) 2021-2022 Amlogic, Inc. All rights reserved.
3 *
4 * SPDX-License-Identifier: MIT
5 */
6
7#ifndef N200_FUNC_H
8#define N200_FUNC_H
9
10__BEGIN_DECLS
11
12#include "n200_timer.h"
bangzheng.liu4d71f922022-09-29 16:12:20 +080013#ifdef CONFIG_N200_REVA
14#include "interrupt_control_pic.h"
15#else
16#include "interrupt_control_eclic.h"
17#endif
xiaohu.huang38262102022-05-06 22:21:48 +080018#include "gcc_compiler_attributes.h"
Xiaohu.Huangf78b48b2022-01-17 10:41:38 +080019
20void pmp_open_all_space(void);
21
22void switch_m2u_mode(void);
23
24uint32_t get_mtime_freq(void);
25
26uint32_t mtime_lo(void);
27
28uint32_t mtime_hi(void);
29
30uint64_t get_mtime_value(void);
31
32uint64_t get_instret_value(void);
33
34uint64_t get_cycle_value(void);
35
36uint32_t get_cpu_freq(void);
37
xiaohu.huang38262102022-05-06 22:21:48 +080038uint32_t __noinline measure_cpu_freq(size_t n);
Xiaohu.Huangf78b48b2022-01-17 10:41:38 +080039
40void wfe(void);
41
42uint64_t get_timer_value(void);
43
44uint32_t get_timer_freq(void);
45
46void test_handler(void);
47
48int EnableIrq(uint32_t ulIrq);
49
50int DisableIrq(uint32_t ulIrq);
51
52int SetIrqPriority(uint32_t ulIrq, uint32_t ulProi);
53
54int ClearPendingIrq(uint32_t ulIrq);
55
56int RegisterIrq(uint32_t int_num, uint32_t int_priority, function_ptr_t handler);
57
58int UnRegisterIrq(uint32_t ulIrq);
59
60unsigned long interrupt_status_get(void);
61
62void interrupt_disable(void);
63
64void interrupt_enable(void);
65
Xiaohu.Huangf78b48b2022-01-17 10:41:38 +080066__END_DECLS
67
68#endif