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Xiaohu.Huanga2c5a042022-03-12 22:41:09 +08001/*
2 * Copyright (c) 2021-2022 Amlogic, Inc. All rights reserved.
3 *
4 * SPDX-License-Identifier: MIT
5 */
6
7#ifndef INTERRUPT_CONTROL_H_
8#define INTERRUPT_CONTROL_H_
9
10#include "n200_pic_tmr.h"
11#include "interrupt.h"
xiaohu.huang38262102022-05-06 22:21:48 +080012#include "gcc_compiler_attributes.h"
13
Xiaohu.Huanga2c5a042022-03-12 22:41:09 +080014void pic_init(uintptr_t base_addr, uint32_t num_sources, uint32_t num_priorities);
15
16void pic_set_threshold(uint32_t threshold);
17
18void pic_enable_interrupt(uint32_t source);
19
20void pic_disable_interrupt(uint32_t source);
21
22void pic_set_priority(uint32_t source, uint32_t priority);
23
24uint32_t pic_claim_interrupt(void);
25
26void pic_complete_interrupt(uint32_t source);
27
28uint32_t pic_check_eip(void);
29
30void DefaultInterruptHandler(void);
31
Xiaohu.Huanga2c5a042022-03-12 22:41:09 +080032// The interrupt 0 is empty
xiaohu.huang38262102022-05-06 22:21:48 +080033__weak function_ptr_t pic_interrupt_handlers[PIC_NUM_INTERRUPTS];
Xiaohu.Huanga2c5a042022-03-12 22:41:09 +080034
35#endif