blob: 0fa9f1964f74dd9854a532b9989c75adae4d05b2 [file] [log] [blame]
Xiaohu.Huangf78b48b2022-01-17 10:41:38 +08001/*
2 * Copyright (c) 2021-2022 Amlogic, Inc. All rights reserved.
3 *
4 * SPDX-License-Identifier: MIT
5 */
6
7#include <stdio.h>
8#include <stdlib.h>
9#include <string.h>
10#include <unistd.h>
11
12#include "n200_func.h"
13#include "register.h"
14#include "common.h"
15#include "n200_timer.h"
16#include "riscv_encoding.h"
17
18// Configure PMP to make all the address space accesable and executable
19void pmp_open_all_space(void){
20 // Config entry0 addr to all 1s to make the range cover all space
21 asm volatile ("li x6, 0xffffffff":::"x6");
22 asm volatile ("csrw pmpaddr0, x6":::);
23 // Config entry0 cfg to make it NAPOT address mode, and R/W/X okay
24 asm volatile ("li x6, 0x7f":::"x6");
25 asm volatile ("csrw pmpcfg0, x6":::);
26}
27
28void switch_m2u_mode(void){
29 clear_csr (mstatus,MSTATUS_MPP);
30 //printf("\nIn the m2u function, the mstatus is 0x%x\n", read_csr(mstatus));
31 //printf("\nIn the m2u function, the mepc is 0x%x\n", read_csr(mepc));
32 asm volatile ("la x6, 1f ":::"x6");
33 asm volatile ("csrw mepc, x6":::);
34 asm volatile ("mret":::);
35 asm volatile ("1:":::);
36}
37
38uint32_t mtime_lo(void)
39{
40 return *(volatile uint32_t *)(TIMER_CTRL_ADDR + TIMER_MTIME);
41}
42
43
44uint32_t mtime_hi(void)
45{
46 return *(volatile uint32_t *)(TIMER_CTRL_ADDR + TIMER_MTIME + 4);
47}
48
49uint64_t get_timer_value(void)
50{
51 while (1) {
52 uint32_t hi = mtime_hi();
53 uint32_t lo = mtime_lo();
54 if (hi == mtime_hi())
55 return ((uint64_t)hi << 32) | lo;
56 }
57}
58
59uint32_t get_timer_freq(void)
60{
61 return TIMER_FREQ;
62}
63
64uint64_t get_instret_value(void)
65{
66 while (1) {
67 uint32_t hi = read_csr(minstreth);
68 uint32_t lo = read_csr(minstret);
69 if (hi == read_csr(minstreth))
70 return ((uint64_t)hi << 32) | lo;
71 }
72}
73
74uint64_t get_cycle_value(void)
75{
76 while (1) {
77 uint32_t hi = read_csr(mcycleh);
78 uint32_t lo = read_csr(mcycle);
79 if (hi == read_csr(mcycleh))
80 return ((uint64_t)hi << 32) | lo;
81 }
82}
83
84unsigned long interrupt_status_get(void)
85{
86 return read_csr(mstatus) >> 0x3;
87}
88
89void interrupt_disable(void)
90{
91 clear_csr(mstatus, MSTATUS_MIE);
92}
93
94void interrupt_enable(void)
95{
96 set_csr(mstatus, MSTATUS_MIE);
97}
98
99#ifndef CONFIG_N200_REVA
100
101uint32_t __attribute__((noinline)) measure_cpu_freq(size_t n)
102{
103 uint32_t start_mtime, delta_mtime;
104 uint32_t mtime_freq = get_timer_freq();
105
106 // Don't start measuruing until we see an mtime tick
107 uint32_t tmp = mtime_lo();
108 do {
109 start_mtime = mtime_lo();
110 } while (start_mtime == tmp);
111
112 uint32_t start_mcycle = read_csr(mcycle);
113
114 do {
115 delta_mtime = mtime_lo() - start_mtime;
116 } while (delta_mtime < n);
117
118 uint32_t delta_mcycle = read_csr(mcycle) - start_mcycle;
119
120 return (delta_mcycle / delta_mtime) * mtime_freq
121 + ((delta_mcycle % delta_mtime) * mtime_freq) / delta_mtime;
122}
123
124uint32_t get_cpu_freq(void)
125{
126 uint32_t cpu_freq;
127
128 // warm up
129 measure_cpu_freq(1);
130 // measure for real
131 cpu_freq = measure_cpu_freq(100);
132
133 return cpu_freq;
134}
135
136unsigned int xPortIsIsrContext(void)
137{
138 return (read_csr_msubmode & 0xff);
139}
140
141#else
142
143unsigned int xPortIsIsrContext(void)
144{
145 return read_csr_msubmode;
146}
147
148#endif