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bangzheng.liu5e691382023-01-10 16:20:10 +08001/*
2 * Copyright (c) 2021-2022 Amlogic, Inc. All rights reserved.
3 *
4 * SPDX-License-Identifier: MIT
5 */
6
7#ifndef _SARADC_DATA_H_
8#define _SARADC_DATA_H_
9
10#include <register.h>
11
12#define SAR_CLK_BASE CLKCTRL_SAR_CLK_CTRL0
13#define SARADC_BASE SAR_ADC_REG0
14
15#define REG11_VREF_EN_VALUE 0
16#define REG11_CMV_SEL_VALUE 0
17#define REG11_EOC_VALUE 1
18
19/* sc2 saradc interrupt num */
20#define SARADC_INTERRUPT_NUM 181
21
22#define SARADC_REG_NUM (39 + 1)
23
Huqiang Qin0b19ebc2023-08-30 13:23:28 +080024/* enable software calibration */
25#define SARADC_SOFTWARE_CALIBRATION
26
bangzheng.liu5e691382023-01-10 16:20:10 +080027#endif