Wolfgang Denk | 25ddd1f | 2010-10-26 14:34:52 +0200 | [diff] [blame] | 1 | #ifndef DO_DEPS_ONLY |
| 2 | |
Wolfgang Denk | 16a354f | 2010-10-26 00:08:35 +0200 | [diff] [blame] | 3 | #include <generated/generic-asm-offsets.h> |
| 4 | /* #include <generated/asm-offsets.h> */ |
Jianyi Shi | 18eda7e | 2024-05-07 02:00:30 +0000 | [diff] [blame^] | 5 | #ifdef CONFIG_AMLOGIC_MODIFY |
| 6 | #define TSK_ACTIVE_MM 1120 /* offsetof(struct task_struct, active_mm) */ |
| 7 | #define TCR_T0SZ_OFFSET 0 |
| 8 | #define TCR_TxSZ_WIDTH 6 |
| 9 | #define TSK_TI_FLAGS 0 /* offsetof(struct task_struct, thread_info.flags) */ |
| 10 | #define TSK_TI_PREEMPT 24 /* offsetof(struct task_struct, thread_info.preempt_count) */ |
| 11 | #define TSK_TI_ADDR_LIMIT 8 /* offsetof(struct task_struct, thread_info.addr_limit) */ |
| 12 | #define TSK_TI_TTBR0 16 /* offsetof(struct task_struct, thread_info.ttbr0) */ |
| 13 | #define TSK_STACK 40 /* offsetof(struct task_struct, stack) */ |
| 14 | #define TSK_STACK_CANARY 1296 /* offsetof(struct task_struct, stack_canary) */ |
Wolfgang Denk | 25ddd1f | 2010-10-26 14:34:52 +0200 | [diff] [blame] | 15 | |
Jianyi Shi | 18eda7e | 2024-05-07 02:00:30 +0000 | [diff] [blame^] | 16 | #define THREAD_CPU_CONTEXT 2576 /* offsetof(struct task_struct, thread.cpu_context) */ |
| 17 | |
| 18 | #define S_X0 0 /* offsetof(struct pt_regs, regs[0]) */ |
| 19 | #define S_X2 16 /* offsetof(struct pt_regs, regs[2]) */ |
| 20 | #define S_X4 32 /* offsetof(struct pt_regs, regs[4]) */ |
| 21 | #define S_X6 48 /* offsetof(struct pt_regs, regs[6]) */ |
| 22 | #define S_X8 64 /* offsetof(struct pt_regs, regs[8]) */ |
| 23 | #define S_X10 80 /* offsetof(struct pt_regs, regs[10]) */ |
| 24 | #define S_X12 96 /* offsetof(struct pt_regs, regs[12]) */ |
| 25 | #define S_X14 112 /* offsetof(struct pt_regs, regs[14]) */ |
| 26 | #define S_X16 128 /* offsetof(struct pt_regs, regs[16]) */ |
| 27 | #define S_X18 144 /* offsetof(struct pt_regs, regs[18]) */ |
| 28 | #define S_X20 160 /* offsetof(struct pt_regs, regs[20]) */ |
| 29 | #define S_X22 176 /* offsetof(struct pt_regs, regs[22]) */ |
| 30 | #define S_X24 192 /* offsetof(struct pt_regs, regs[24]) */ |
| 31 | #define S_X26 208 /* offsetof(struct pt_regs, regs[26]) */ |
| 32 | #define S_X28 224 /* offsetof(struct pt_regs, regs[28]) */ |
| 33 | #define S_LR 240 /* offsetof(struct pt_regs, regs[30]) */ |
| 34 | #define S_SP 248 /* offsetof(struct pt_regs, sp) */ |
| 35 | #define S_PSTATE 264 /* offsetof(struct pt_regs, pstate) */ |
| 36 | #define S_PC 256 /* offsetof(struct pt_regs, pc) */ |
| 37 | #define S_SYSCALLNO 280 /* offsetof(struct pt_regs, syscallno) */ |
| 38 | #define S_ORIG_ADDR_LIMIT 288 /* offsetof(struct pt_regs, orig_addr_limit) */ |
| 39 | #define S_PMR_SAVE 296 /* offsetof(struct pt_regs, pmr_save) */ |
| 40 | #define S_STACKFRAME 304 /* offsetof(struct pt_regs, stackframe) */ |
| 41 | #define S_FRAME_SIZE 320 /* sizeof(struct pt_regs) */ |
| 42 | |
| 43 | /* offsetof(struct compat_sigframe, uc.uc_mcontext.arm_r0) */ |
| 44 | #define COMPAT_SIGFRAME_REGS_OFFSET 32 |
| 45 | /* offsetof(struct compat_rt_sigframe, sig.uc.uc_mcontext.arm_r0) */ |
| 46 | #define COMPAT_RT_SIGFRAME_REGS_OFFSET 160 |
| 47 | |
| 48 | #define MM_CONTEXT_ID 736 /* offsetof(struct mm_struct, context.id.counter) */ |
| 49 | |
| 50 | #define VMA_VM_MM 64 /* offsetof(struct vm_area_struct, vm_mm) */ |
| 51 | #define VMA_VM_FLAGS 80 /* offsetof(struct vm_area_struct, vm_flags) */ |
| 52 | |
| 53 | #define VM_EXEC 4 /* VM_EXEC */ |
| 54 | |
| 55 | #define PAGE_SZ 4096 /* PAGE_SIZE */ |
| 56 | |
| 57 | //#define DMA_TO_DEVICE 1 /* DMA_TO_DEVICE */ |
| 58 | //#define DMA_FROM_DEVICE 2 /* DMA_FROM_DEVICE */ |
| 59 | |
| 60 | #define PREEMPT_DISABLE_OFFSET 1 /* PREEMPT_DISABLE_OFFSET */ |
| 61 | |
| 62 | #define CPU_BOOT_STACK 0 /* offsetof(struct secondary_data, stack) */ |
| 63 | #define CPU_BOOT_TASK 8 /* offsetof(struct secondary_data, task) */ |
| 64 | |
| 65 | #define CPU_CTX_SP 104 /* offsetof(struct cpu_suspend_ctx, sp) */ |
| 66 | #define MPIDR_HASH_MASK 0 /* offsetof(struct mpidr_hash, mask) */ |
| 67 | #define MPIDR_HASH_SHIFTS 8 /* offsetof(struct mpidr_hash, shift_aff) */ |
| 68 | #define SLEEP_STACK_DATA_SYSTEM_REGS 0 /* offsetof(struct sleep_stack_data, system_regs) */ |
| 69 | #define SLEEP_STACK_DATA_CALLEE_REGS 112 /* offsetof(struct sleep_stack_data, callee_saved_regs) */ |
| 70 | #define ARM_SMCCC_RES_X0_OFFS 0 /* offsetof(struct arm_smccc_res, a0) */ |
| 71 | #define ARM_SMCCC_RES_X2_OFFS 16 /* offsetof(struct arm_smccc_res, a2) */ |
| 72 | #define ARM_SMCCC_QUIRK_ID_OFFS 0 /* offsetof(struct arm_smccc_quirk, id) */ |
| 73 | #define ARM_SMCCC_QUIRK_STATE_OFFS 8 /* offsetof(struct arm_smccc_quirk, state) */ |
| 74 | |
| 75 | #define HIBERN_PBE_ORIG 8 /* offsetof(struct pbe, orig_address) */ |
| 76 | #define HIBERN_PBE_ADDR 0 /* offsetof(struct pbe, address) */ |
| 77 | #define HIBERN_PBE_NEXT 16 /* offsetof(struct pbe, next) */ |
| 78 | #define ARM64_FTR_SYSVAL 24 /* offsetof(struct arm64_ftr_reg, sys_val) */ |
| 79 | |
| 80 | #define TRAMP_VALIAS -4322250752 /* TRAMP_VALIAS */ |
| 81 | #endif |
Wolfgang Denk | 25ddd1f | 2010-10-26 14:34:52 +0200 | [diff] [blame] | 82 | #endif |