blob: a227f8cffae006e7677e47281fecd0afebd159ac [file] [log] [blame]
Bo Lv72d0e902023-01-02 14:27:34 +00001/* SPDX-License-Identifier: (GPL-2.0+ OR MIT) */
2/*
3 * Copyright (c) 2019 Amlogic, Inc. All rights reserved.
4 */
5
6#ifndef __AML_MMC_H__
7#define __AML_MMC_H__
8
9#include <common.h>
10#include <mmc.h>
jinbiao5da7d892024-05-13 12:19:47 +000011#include "emmc_partitions.h"
Bo Lv72d0e902023-01-02 14:27:34 +000012
Ruixuan.lib5755732024-02-01 16:01:14 +080013/*mmc.h*/
14#define NO_CARD_ERR -16
15#define UNUSABLE_ERR -17
16#define COMM_ERR -18
17#define TIMEOUT -19
18#define IN_PROGRESS -20
19#define SWITCH_ERR -21
20
21#define MESON_SD_EMMC_ADJ_IDX_LOG 0x20
22#define MESON_SD_EMMC_CLKTEST_LOG 0x24
23#define MESON_SD_EMMC_CLKTEST_OUT 0x28
24#define MESON_SD_EMMC_EYETEST_LOG 0x2C
25#define MESON_SD_EMMC_EYETEST_OUT0 0x30
26#define MESON_SD_EMMC_EYETEST_OUT1 0x34
27#define MESON_SD_EMMC_INTF3 0x38
28#define MMC_CMD23
29
30#define MMC_CMD_SET_WRITE_PROTECT 28
31#define MMC_CMD_CLR_WRITE_PROT 29
32#define MMC_CMD_SEND_WRITE_PROT 30
33#define MMC_CMD_SEND_WRITE_PROT_TYPE 31
34#define MMC_SD_HS_TUNING 70
35
36#define MMC_KEY_SIZE (256*1024)
37#define EMMC_KEY_DEV (1)
38
39#define EXT_CSD_CLASS_6_CTRL 59 /*R/W/E_P*/
40#define EXT_CSD_DRIVER_STRENGTH 197 /* RO */
41#define EXT_CSD_DEV_LIFETIME_EST_TYP_A 268 /* RO */
42#define EXT_CSD_DEV_LIFETIME_EST_TYP_B 269 /* RO */
43#define EXT_CSD_SUPPORTED_MODES 493 /* RO */
44#define EXT_CSD_FW_VERSION 254 /* RO, 261:254 */
45#define EXT_CSD_FW_CFG 169 /* R/W */
46#define EXT_CSD_MODE_CFG 30 /* R/W */
47#define EXT_CSD_FFU_STATUS 26 /* RO */
48
49#define US_PWR_WP_DIS_BIT 1<<3
50#define US_PERM_WP_DIS_BIT 1<<4
51#define WP_CLEAR_TYPE 0
52#define WP_POWER_ON_TYPE (1<<1)
53#define WP_TEMPORARY_TYPE 1
54#define WP_PERMANENT_TYPE ((1<<0)|(1<<1))
55#define WP_TYPE_MASK 3
56#define WP_ENABLE_MASK 7
57#define WP_TEMPORARY_EN_BIT 0
58#define WP_POWER_ON_EN_BIT (1<<0)
59#define WP_PERM_EN_BIT (1<<2)
60#define WP_GRP_SIZE_MASK 31
61
62#ifndef CONFIG_SYS_MMC_MAX_BLK_COUNT
63#define CONFIG_SYS_MMC_MAX_BLK_COUNT 65535
64#endif
65/*mmc.h*/
66
Bo Lv72d0e902023-01-02 14:27:34 +000067/* bootloader operation */
68#define AML_BL_USER (0x1 << 0)
69#define AML_BL_BOOT0 (0x1 << 1)
70#define AML_BL_BOOT1 (0x1 << 2)
71#define AML_BL_BOOT (0x6)
72#define AML_BL_ALL (0x7)
73
74/** For actually partitions with mask 8 store into bootinfo
75 * name: partition name.
76 * addr: sector addr of the partition
77 * size: sector cont of the partition
78*/
79struct part_property
80{
81 char name[8];
82 uint32_t addr;
83 uint32_t size;
84};
85#define PART_PROPERTY_SIZE sizeof(struct part_property)
86#define BOOTINFO_MAX_PARTITIONS (4)
87#define BOOTINFO_PARTITIONS_SIZE (PART_PROPERTY_SIZE * BOOTINFO_MAX_PARTITIONS)
88
89
90#define VPART_PROPERTY_SIZE sizeof(struct vpart_property)
91struct vpart_property {
92 u32 addr;
93 u32 size;
94};
95
96/*
97 * sizeof(struct storage_emmc_boot_info) is strictly
98 * smaller than or equal to one sector. we will bind
99 * it in one sector with u-boot.bin together and
100 * write into boot loader area.
101 * @rsv_base_addr : the sector address of reserved area
102 * @dtb : the sector address and size of dtb property
103 * @ddr : the sector address and size of ddr property
104 */
105#define EMMC_BOOT_INFO_SIZE 512
106struct storage_emmc_boot_info {
107 u32 version;
108 u32 rsv_base_addr;
109 struct vpart_property dtb;
110 struct vpart_property ddr;
111
112 struct part_property parts[BOOTINFO_MAX_PARTITIONS];
113 uint8_t reserved[512 - 2 * VPART_PROPERTY_SIZE - BOOTINFO_PARTITIONS_SIZE - 12];
114 u32 checksum;
115};
116
Ruixuan.lifd943de2024-01-19 15:48:40 +0800117#define stamp_after(a,b) ((int)(b) - (int)(a) < 0)
118
Bo Lv72d0e902023-01-02 14:27:34 +0000119int amlmmc_write_bootloader(int dev, int map,
120 unsigned int size, const void *src);
121int amlmmc_erase_bootloader(int dev, int map);
122
Bo Lv72d0e902023-01-02 14:27:34 +0000123/* interface on reserved area. */
jinbiao5da7d892024-05-13 12:19:47 +0000124void mmc_write_cali_mattern(void *addr, struct aml_pattern *table);
Bo Lv72d0e902023-01-02 14:27:34 +0000125
126/* dtb operation */
127int dtb_write(void *addr);
128
129/* emmc key operation */
130int mmc_key_read(unsigned char *buf,
131 unsigned int size, uint32_t *actual_length);
132int mmc_key_write(unsigned char *buf,
133 unsigned int size, uint32_t *actual_length);
134int mmc_key_erase(void);
135
136/* partition operation */
137int renew_partition_tbl(unsigned char *buffer);
138int find_dev_num_by_partition_name (char const *name);
139
140#ifdef CONFIG_AML_PARTITION
141int emmc_update_mbr(unsigned char *buffer);
142#endif
143
144/*mmc ext_csd register operation*/
145int mmc_get_ext_csd(struct mmc *mmc, u8 *ext_csd);
146int mmc_set_ext_csd(struct mmc *mmc, u8 index, u8 value);
147
148/* mmc caps quirks */
149int emmc_quirks(void);
150#endif /* __AML_MMC_H__ */