| ramneek mehresh | 9dee205 | 2013-08-05 16:00:16 +0530 | [diff] [blame^] | 1 | /* |
| 2 | * Freescale USB Controller |
| 3 | * |
| 4 | * Copyright 2013 Freescale Semiconductor, Inc. |
| 5 | * |
| 6 | * This software may be used and distributed according to the |
| 7 | * terms of the GNU Public License, Version 2, incorporated |
| 8 | * herein by reference. |
| 9 | * |
| 10 | * This program is free software; you can redistribute it and/or |
| 11 | * modify it under the terms of the GNU General Public License |
| 12 | * Version 2 as published by the Free Software Foundation. |
| 13 | * |
| 14 | * This program is distributed in the hope that it will be useful, |
| 15 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 16 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 17 | * GNU General Public License for more details. |
| 18 | * |
| 19 | * You should have received a copy of the GNU General Public License |
| 20 | * along with this program; if not, write to the Free Software |
| 21 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, |
| 22 | * MA 02111-1307 USA |
| 23 | */ |
| 24 | |
| 25 | #ifndef _ASM_FSL_USB_H_ |
| 26 | #define _ASM_FSL_USB_H_ |
| 27 | |
| 28 | #ifdef CONFIG_SYS_FSL_USB_DUAL_PHY_ENABLE |
| 29 | struct ccsr_usb_port_ctrl { |
| 30 | u32 ctrl; |
| 31 | u32 drvvbuscfg; |
| 32 | u32 pwrfltcfg; |
| 33 | u32 sts; |
| 34 | u8 res_14[0xc]; |
| 35 | u32 bistcfg; |
| 36 | u32 biststs; |
| 37 | u32 abistcfg; |
| 38 | u32 abiststs; |
| 39 | u8 res_30[0x10]; |
| 40 | u32 xcvrprg; |
| 41 | u32 anaprg; |
| 42 | u32 anadrv; |
| 43 | u32 anasts; |
| 44 | }; |
| 45 | |
| 46 | struct ccsr_usb_phy { |
| 47 | u32 id; |
| 48 | struct ccsr_usb_port_ctrl port1; |
| 49 | u8 res_50[0xc]; |
| 50 | u32 tvr; |
| 51 | u32 pllprg[4]; |
| 52 | u8 res_70[0x4]; |
| 53 | u32 anaccfg; |
| 54 | u32 dbg; |
| 55 | u8 res_7c[0x4]; |
| 56 | struct ccsr_usb_port_ctrl port2; |
| 57 | u8 res_dc[0x334]; |
| 58 | }; |
| 59 | |
| 60 | #define CONFIG_SYS_FSL_USB_CTRL_PHY_EN (1 << 0) |
| 61 | #define CONFIG_SYS_FSL_USB_DRVVBUS_CR_EN (1 << 1) |
| 62 | #define CONFIG_SYS_FSL_USB_PWRFLT_CR_EN (1 << 1) |
| 63 | #define CONFIG_SYS_FSL_USB_PLLPRG1_PHY_DIV (1 << 0) |
| 64 | #define CONFIG_SYS_FSL_USB_PLLPRG2_PHY2_CLK_EN (1 << 0) |
| 65 | #define CONFIG_SYS_FSL_USB_PLLPRG2_PHY1_CLK_EN (1 << 1) |
| 66 | #define CONFIG_SYS_FSL_USB_PLLPRG2_FRAC_LPF_EN (1 << 13) |
| 67 | #define CONFIG_SYS_FSL_USB_PLLPRG2_REF_DIV (1 << 4) |
| 68 | #define CONFIG_SYS_FSL_USB_PLLPRG2_MFI (5 << 16) |
| 69 | #define CONFIG_SYS_FSL_USB_PLLPRG2_PLL_EN (1 << 21) |
| 70 | #define CONFIG_SYS_FSL_USB_SYS_CLK_VALID (1 << 0) |
| 71 | #else |
| 72 | struct ccsr_usb_phy { |
| 73 | u8 res0[0x18]; |
| 74 | u32 usb_enable_override; |
| 75 | u8 res[0xe4]; |
| 76 | }; |
| 77 | #define CONFIG_SYS_FSL_USB_ENABLE_OVERRIDE 1 |
| 78 | #endif |
| 79 | |
| 80 | #endif /*_ASM_FSL_USB_H_ */ |