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wdenk1f045212002-03-10 14:37:15 +00001/*
Heiko Schocher385c9ef2012-01-16 21:12:23 +00002 * Copyright (C) 2009 Sergey Kubushyn <ksi@koi8.net>
3 * Copyright (C) 2009 - 2013 Heiko Schocher <hs@denx.de>
4 * Changes for multibus/multiadapter I2C support.
5 *
wdenk1f045212002-03-10 14:37:15 +00006 * (C) Copyright 2001
7 * Gerald Van Baren, Custom IDEAS, vanbaren@cideas.com.
8 *
Wolfgang Denk1a459662013-07-08 09:37:19 +02009 * SPDX-License-Identifier: GPL-2.0+
wdenk1f045212002-03-10 14:37:15 +000010 *
11 * The original I2C interface was
12 * (C) 2000 by Paolo Scaffardi (arsenio@tin.it)
13 * AIRVENT SAM s.p.a - RIMINI(ITALY)
14 * but has been changed substantially.
15 */
16
17#ifndef _I2C_H_
18#define _I2C_H_
19
20/*
Simon Glassc6202d82014-12-10 08:55:47 -070021 * For now there are essentially two parts to this file - driver model
22 * here at the top, and the older code below (with CONFIG_SYS_I2C being
23 * most recent). The plan is to migrate everything to driver model.
24 * The driver model structures and API are separate as they are different
25 * enough as to be incompatible for compilation purposes.
26 */
27
Simon Glassc6202d82014-12-10 08:55:47 -070028enum dm_i2c_chip_flags {
29 DM_I2C_CHIP_10BIT = 1 << 0, /* Use 10-bit addressing */
30 DM_I2C_CHIP_RD_ADDRESS = 1 << 1, /* Send address for each read byte */
31 DM_I2C_CHIP_WR_ADDRESS = 1 << 2, /* Send address for each write byte */
32};
33
Simon Glassfffff722015-02-05 21:41:33 -070034struct udevice;
Simon Glassc6202d82014-12-10 08:55:47 -070035/**
36 * struct dm_i2c_chip - information about an i2c chip
37 *
38 * An I2C chip is a device on the I2C bus. It sits at a particular address
39 * and normally supports 7-bit or 10-bit addressing.
40 *
Simon Glasse6f66ec2015-01-25 08:27:13 -070041 * To obtain this structure, use dev_get_parent_platdata(dev) where dev is
42 * the chip to examine.
Simon Glassc6202d82014-12-10 08:55:47 -070043 *
44 * @chip_addr: Chip address on bus
45 * @offset_len: Length of offset in bytes. A single byte offset can
46 * represent up to 256 bytes. A value larger than 1 may be
47 * needed for larger devices.
48 * @flags: Flags for this chip (dm_i2c_chip_flags)
49 * @emul: Emulator for this chip address (only used for emulation)
50 */
51struct dm_i2c_chip {
52 uint chip_addr;
53 uint offset_len;
54 uint flags;
55#ifdef CONFIG_SANDBOX
56 struct udevice *emul;
57#endif
58};
59
60/**
61 * struct dm_i2c_bus- information about an i2c bus
62 *
63 * An I2C bus contains 0 or more chips on it, each at its own address. The
64 * bus can operate at different speeds (measured in Hz, typically 100KHz
65 * or 400KHz).
66 *
Simon Glasse564f052015-03-05 12:25:20 -070067 * To obtain this structure, use dev_get_uclass_priv(bus) where bus is the
68 * I2C bus udevice.
Simon Glassc6202d82014-12-10 08:55:47 -070069 *
70 * @speed_hz: Bus speed in hertz (typically 100000)
71 */
72struct dm_i2c_bus {
73 int speed_hz;
74};
75
76/**
Simon Glassf9a4c2d2015-01-12 18:02:07 -070077 * dm_i2c_read() - read bytes from an I2C chip
Simon Glassc6202d82014-12-10 08:55:47 -070078 *
79 * To obtain an I2C device (called a 'chip') given the I2C bus address you
80 * can use i2c_get_chip(). To obtain a bus by bus number use
81 * uclass_get_device_by_seq(UCLASS_I2C, <bus number>).
82 *
83 * To set the address length of a devce use i2c_set_addr_len(). It
84 * defaults to 1.
85 *
86 * @dev: Chip to read from
87 * @offset: Offset within chip to start reading
88 * @buffer: Place to put data
89 * @len: Number of bytes to read
90 *
91 * @return 0 on success, -ve on failure
92 */
Simon Glassf9a4c2d2015-01-12 18:02:07 -070093int dm_i2c_read(struct udevice *dev, uint offset, uint8_t *buffer, int len);
Simon Glassc6202d82014-12-10 08:55:47 -070094
95/**
Simon Glassf9a4c2d2015-01-12 18:02:07 -070096 * dm_i2c_write() - write bytes to an I2C chip
Simon Glassc6202d82014-12-10 08:55:47 -070097 *
Simon Glassf9a4c2d2015-01-12 18:02:07 -070098 * See notes for dm_i2c_read() above.
Simon Glassc6202d82014-12-10 08:55:47 -070099 *
100 * @dev: Chip to write to
101 * @offset: Offset within chip to start writing
102 * @buffer: Buffer containing data to write
103 * @len: Number of bytes to write
104 *
105 * @return 0 on success, -ve on failure
106 */
Simon Glassf9a4c2d2015-01-12 18:02:07 -0700107int dm_i2c_write(struct udevice *dev, uint offset, const uint8_t *buffer,
108 int len);
Simon Glassc6202d82014-12-10 08:55:47 -0700109
110/**
Simon Glassf9a4c2d2015-01-12 18:02:07 -0700111 * dm_i2c_probe() - probe a particular chip address
Simon Glassc6202d82014-12-10 08:55:47 -0700112 *
113 * This can be useful to check for the existence of a chip on the bus.
114 * It is typically implemented by writing the chip address to the bus
115 * and checking that the chip replies with an ACK.
116 *
117 * @bus: Bus to probe
118 * @chip_addr: 7-bit address to probe (10-bit and others are not supported)
119 * @chip_flags: Flags for the probe (see enum dm_i2c_chip_flags)
120 * @devp: Returns the device found, or NULL if none
121 * @return 0 if a chip was found at that address, -ve if not
122 */
Simon Glassf9a4c2d2015-01-12 18:02:07 -0700123int dm_i2c_probe(struct udevice *bus, uint chip_addr, uint chip_flags,
124 struct udevice **devp);
Simon Glassc6202d82014-12-10 08:55:47 -0700125
126/**
Simon Glassba3864f2015-04-20 12:37:14 -0600127 * dm_i2c_reg_read() - Read a value from an I2C register
128 *
129 * This reads a single value from the given address in an I2C chip
130 *
131 * @addr: Address to read from
132 * @return value read, or -ve on error
133 */
134int dm_i2c_reg_read(struct udevice *dev, uint offset);
135
136/**
137 * dm_i2c_reg_write() - Write a value to an I2C register
138 *
139 * This writes a single value to the given address in an I2C chip
140 *
141 * @addr: Address to write to
142 * @val: Value to write (normally a byte)
143 * @return 0 on success, -ve on error
144 */
145int dm_i2c_reg_write(struct udevice *dev, uint offset, unsigned int val);
146
147/**
Simon Glassca88b9b2015-02-05 21:41:32 -0700148 * dm_i2c_set_bus_speed() - set the speed of a bus
Simon Glassc6202d82014-12-10 08:55:47 -0700149 *
150 * @bus: Bus to adjust
151 * @speed: Requested speed in Hz
152 * @return 0 if OK, -EINVAL for invalid values
153 */
Simon Glassca88b9b2015-02-05 21:41:32 -0700154int dm_i2c_set_bus_speed(struct udevice *bus, unsigned int speed);
Simon Glassc6202d82014-12-10 08:55:47 -0700155
156/**
Simon Glassca88b9b2015-02-05 21:41:32 -0700157 * dm_i2c_get_bus_speed() - get the speed of a bus
Simon Glassc6202d82014-12-10 08:55:47 -0700158 *
159 * @bus: Bus to check
160 * @return speed of selected I2C bus in Hz, -ve on error
161 */
Simon Glassca88b9b2015-02-05 21:41:32 -0700162int dm_i2c_get_bus_speed(struct udevice *bus);
Simon Glassc6202d82014-12-10 08:55:47 -0700163
164/**
165 * i2c_set_chip_flags() - set flags for a chip
166 *
167 * Typically addresses are 7 bits, but for 10-bit addresses you should set
168 * flags to DM_I2C_CHIP_10BIT. All accesses will then use 10-bit addressing.
169 *
170 * @dev: Chip to adjust
171 * @flags: New flags
172 * @return 0 if OK, -EINVAL if value is unsupported, other -ve value on error
173 */
174int i2c_set_chip_flags(struct udevice *dev, uint flags);
175
176/**
177 * i2c_get_chip_flags() - get flags for a chip
178 *
179 * @dev: Chip to check
180 * @flagsp: Place to put flags
181 * @return 0 if OK, other -ve value on error
182 */
183int i2c_get_chip_flags(struct udevice *dev, uint *flagsp);
184
185/**
186 * i2c_set_offset_len() - set the offset length for a chip
187 *
188 * The offset used to access a chip may be up to 4 bytes long. Typically it
189 * is only 1 byte, which is enough for chips with 256 bytes of memory or
190 * registers. The default value is 1, but you can call this function to
191 * change it.
192 *
193 * @offset_len: New offset length value (typically 1 or 2)
194 */
195
196int i2c_set_chip_offset_len(struct udevice *dev, uint offset_len);
197/**
198 * i2c_deblock() - recover a bus that is in an unknown state
199 *
200 * See the deblock() method in 'struct dm_i2c_ops' for full information
201 *
202 * @bus: Bus to recover
203 * @return 0 if OK, -ve on error
204 */
205int i2c_deblock(struct udevice *bus);
206
Simon Glass73845352015-01-12 18:02:08 -0700207#ifdef CONFIG_DM_I2C_COMPAT
208/**
209 * i2c_probe() - Compatibility function for driver model
210 *
211 * Calls dm_i2c_probe() on the current bus
212 */
213int i2c_probe(uint8_t chip_addr);
214
215/**
216 * i2c_read() - Compatibility function for driver model
217 *
218 * Calls dm_i2c_read() with the device corresponding to @chip_addr, and offset
219 * set to @addr. @alen must match the current setting for the device.
220 */
221int i2c_read(uint8_t chip_addr, unsigned int addr, int alen, uint8_t *buffer,
222 int len);
223
224/**
225 * i2c_write() - Compatibility function for driver model
226 *
227 * Calls dm_i2c_write() with the device corresponding to @chip_addr, and offset
228 * set to @addr. @alen must match the current setting for the device.
229 */
230int i2c_write(uint8_t chip_addr, unsigned int addr, int alen, uint8_t *buffer,
231 int len);
232
233/**
234 * i2c_get_bus_num_fdt() - Compatibility function for driver model
235 *
236 * @return the bus number associated with the given device tree node
237 */
238int i2c_get_bus_num_fdt(int node);
239
240/**
241 * i2c_get_bus_num() - Compatibility function for driver model
242 *
243 * @return the 'current' bus number
244 */
245unsigned int i2c_get_bus_num(void);
246
247/**
Simon Glassd744d562015-01-26 20:29:39 -0700248 * i2c_set_bus_num() - Compatibility function for driver model
Simon Glass73845352015-01-12 18:02:08 -0700249 *
250 * Sets the 'current' bus
251 */
252int i2c_set_bus_num(unsigned int bus);
253
254static inline void I2C_SET_BUS(unsigned int bus)
255{
256 i2c_set_bus_num(bus);
257}
258
259static inline unsigned int I2C_GET_BUS(void)
260{
261 return i2c_get_bus_num();
262}
263
Simon Glassd744d562015-01-26 20:29:39 -0700264/**
265 * i2c_init() - Compatibility function for driver model
266 *
267 * This function does nothing.
268 */
269void i2c_init(int speed, int slaveaddr);
270
271/**
272 * board_i2c_init() - Compatibility function for driver model
273 *
274 * @param blob Device tree blbo
275 * @return the number of I2C bus
276 */
277void board_i2c_init(const void *blob);
278
Simon Glass73845352015-01-12 18:02:08 -0700279#endif
280
Simon Glassc6202d82014-12-10 08:55:47 -0700281/*
282 * Not all of these flags are implemented in the U-Boot API
283 */
284enum dm_i2c_msg_flags {
285 I2C_M_TEN = 0x0010, /* ten-bit chip address */
286 I2C_M_RD = 0x0001, /* read data, from slave to master */
287 I2C_M_STOP = 0x8000, /* send stop after this message */
288 I2C_M_NOSTART = 0x4000, /* no start before this message */
289 I2C_M_REV_DIR_ADDR = 0x2000, /* invert polarity of R/W bit */
290 I2C_M_IGNORE_NAK = 0x1000, /* continue after NAK */
291 I2C_M_NO_RD_ACK = 0x0800, /* skip the Ack bit on reads */
292 I2C_M_RECV_LEN = 0x0400, /* length is first received byte */
293};
294
295/**
296 * struct i2c_msg - an I2C message
297 *
298 * @addr: Slave address
299 * @flags: Flags (see enum dm_i2c_msg_flags)
300 * @len: Length of buffer in bytes, may be 0 for a probe
301 * @buf: Buffer to send/receive, or NULL if no data
302 */
303struct i2c_msg {
304 uint addr;
305 uint flags;
306 uint len;
307 u8 *buf;
308};
309
310/**
311 * struct i2c_msg_list - a list of I2C messages
312 *
313 * This is called i2c_rdwr_ioctl_data in Linux but the name does not seem
314 * appropriate in U-Boot.
315 *
316 * @msg: Pointer to i2c_msg array
317 * @nmsgs: Number of elements in the array
318 */
319struct i2c_msg_list {
320 struct i2c_msg *msgs;
321 uint nmsgs;
322};
323
324/**
325 * struct dm_i2c_ops - driver operations for I2C uclass
326 *
327 * Drivers should support these operations unless otherwise noted. These
328 * operations are intended to be used by uclass code, not directly from
329 * other code.
330 */
331struct dm_i2c_ops {
332 /**
333 * xfer() - transfer a list of I2C messages
334 *
335 * @bus: Bus to read from
336 * @msg: List of messages to transfer
337 * @nmsgs: Number of messages in the list
338 * @return 0 if OK, -EREMOTEIO if the slave did not ACK a byte,
339 * -ECOMM if the speed cannot be supported, -EPROTO if the chip
340 * flags cannot be supported, other -ve value on some other error
341 */
342 int (*xfer)(struct udevice *bus, struct i2c_msg *msg, int nmsgs);
343
344 /**
345 * probe_chip() - probe for the presense of a chip address
346 *
347 * This function is optional. If omitted, the uclass will send a zero
348 * length message instead.
349 *
350 * @bus: Bus to probe
351 * @chip_addr: Chip address to probe
352 * @chip_flags: Probe flags (enum dm_i2c_chip_flags)
353 * @return 0 if chip was found, -EREMOTEIO if not, -ENOSYS to fall back
354 * to default probem other -ve value on error
355 */
356 int (*probe_chip)(struct udevice *bus, uint chip_addr, uint chip_flags);
357
358 /**
359 * set_bus_speed() - set the speed of a bus (optional)
360 *
361 * The bus speed value will be updated by the uclass if this function
362 * does not return an error. This method is optional - if it is not
363 * provided then the driver can read the speed from
Simon Glasse564f052015-03-05 12:25:20 -0700364 * dev_get_uclass_priv(bus)->speed_hz
Simon Glassc6202d82014-12-10 08:55:47 -0700365 *
366 * @bus: Bus to adjust
367 * @speed: Requested speed in Hz
368 * @return 0 if OK, -EINVAL for invalid values
369 */
370 int (*set_bus_speed)(struct udevice *bus, unsigned int speed);
371
372 /**
373 * get_bus_speed() - get the speed of a bus (optional)
374 *
375 * Normally this can be provided by the uclass, but if you want your
376 * driver to check the bus speed by looking at the hardware, you can
377 * implement that here. This method is optional. This method would
Simon Glasse564f052015-03-05 12:25:20 -0700378 * normally be expected to return dev_get_uclass_priv(bus)->speed_hz.
Simon Glassc6202d82014-12-10 08:55:47 -0700379 *
380 * @bus: Bus to check
381 * @return speed of selected I2C bus in Hz, -ve on error
382 */
383 int (*get_bus_speed)(struct udevice *bus);
384
385 /**
386 * set_flags() - set the flags for a chip (optional)
387 *
388 * This is generally implemented by the uclass, but drivers can
389 * check the value to ensure that unsupported options are not used.
390 * This method is optional. If provided, this method will always be
391 * called when the flags change.
392 *
393 * @dev: Chip to adjust
394 * @flags: New flags value
395 * @return 0 if OK, -EINVAL if value is unsupported
396 */
397 int (*set_flags)(struct udevice *dev, uint flags);
398
399 /**
400 * deblock() - recover a bus that is in an unknown state
401 *
402 * I2C is a synchronous protocol and resets of the processor in the
403 * middle of an access can block the I2C Bus until a powerdown of
404 * the full unit is done. This is because slaves can be stuck
405 * waiting for addition bus transitions for a transaction that will
406 * never complete. Resetting the I2C master does not help. The only
407 * way is to force the bus through a series of transitions to make
408 * sure that all slaves are done with the transaction. This method
409 * performs this 'deblocking' if support by the driver.
410 *
411 * This method is optional.
412 */
413 int (*deblock)(struct udevice *bus);
414};
415
416#define i2c_get_ops(dev) ((struct dm_i2c_ops *)(dev)->driver->ops)
417
418/**
419 * i2c_get_chip() - get a device to use to access a chip on a bus
420 *
421 * This returns the device for the given chip address. The device can then
422 * be used with calls to i2c_read(), i2c_write(), i2c_probe(), etc.
423 *
424 * @bus: Bus to examine
425 * @chip_addr: Chip address for the new device
Simon Glass25ab4b02015-01-25 08:26:55 -0700426 * @offset_len: Length of a register offset in bytes (normally 1)
Simon Glassc6202d82014-12-10 08:55:47 -0700427 * @devp: Returns pointer to new device if found or -ENODEV if not
428 * found
429 */
Simon Glass25ab4b02015-01-25 08:26:55 -0700430int i2c_get_chip(struct udevice *bus, uint chip_addr, uint offset_len,
431 struct udevice **devp);
Simon Glassc6202d82014-12-10 08:55:47 -0700432
433/**
434 * i2c_get_chip() - get a device to use to access a chip on a bus number
435 *
436 * This returns the device for the given chip address on a particular bus
437 * number.
438 *
439 * @busnum: Bus number to examine
440 * @chip_addr: Chip address for the new device
Simon Glass25ab4b02015-01-25 08:26:55 -0700441 * @offset_len: Length of a register offset in bytes (normally 1)
Simon Glassc6202d82014-12-10 08:55:47 -0700442 * @devp: Returns pointer to new device if found or -ENODEV if not
443 * found
444 */
Simon Glass25ab4b02015-01-25 08:26:55 -0700445int i2c_get_chip_for_busnum(int busnum, int chip_addr, uint offset_len,
446 struct udevice **devp);
Simon Glassc6202d82014-12-10 08:55:47 -0700447
448/**
449 * i2c_chip_ofdata_to_platdata() - Decode standard I2C platform data
450 *
451 * This decodes the chip address from a device tree node and puts it into
452 * its dm_i2c_chip structure. This should be called in your driver's
453 * ofdata_to_platdata() method.
454 *
455 * @blob: Device tree blob
456 * @node: Node offset to read from
457 * @spi: Place to put the decoded information
458 */
459int i2c_chip_ofdata_to_platdata(const void *blob, int node,
460 struct dm_i2c_chip *chip);
461
Simon Glassc6202d82014-12-10 08:55:47 -0700462#ifndef CONFIG_DM_I2C
463
464/*
wdenk1f045212002-03-10 14:37:15 +0000465 * WARNING WARNING WARNING WARNING WARNING WARNING WARNING WARNING
466 *
467 * The implementation MUST NOT use static or global variables if the
468 * I2C routines are used to read SDRAM configuration information
469 * because this is done before the memories are initialized. Limited
470 * use of stack-based variables are OK (the initial stack size is
471 * limited).
472 *
473 * WARNING WARNING WARNING WARNING WARNING WARNING WARNING WARNING
474 */
475
476/*
477 * Configuration items.
478 */
479#define I2C_RXTX_LEN 128 /* maximum tx/rx buffer length */
480
Heiko Schocher385c9ef2012-01-16 21:12:23 +0000481#if !defined(CONFIG_SYS_I2C_MAX_HOPS)
482/* no muxes used bus = i2c adapters */
483#define CONFIG_SYS_I2C_DIRECT_BUS 1
484#define CONFIG_SYS_I2C_MAX_HOPS 0
485#define CONFIG_SYS_NUM_I2C_BUSES ll_entry_count(struct i2c_adapter, i2c)
Stefan Roese79b2d0b2007-02-20 10:27:08 +0100486#else
Heiko Schocher385c9ef2012-01-16 21:12:23 +0000487/* we use i2c muxes */
488#undef CONFIG_SYS_I2C_DIRECT_BUS
Stefan Roese79b2d0b2007-02-20 10:27:08 +0100489#endif
490
Stefan Roese8c120452007-03-01 07:03:25 +0100491/* define the I2C bus number for RTC and DTT if not already done */
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200492#if !defined(CONFIG_SYS_RTC_BUS_NUM)
493#define CONFIG_SYS_RTC_BUS_NUM 0
Stefan Roese8c120452007-03-01 07:03:25 +0100494#endif
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200495#if !defined(CONFIG_SYS_DTT_BUS_NUM)
496#define CONFIG_SYS_DTT_BUS_NUM 0
Stefan Roese8c120452007-03-01 07:03:25 +0100497#endif
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200498#if !defined(CONFIG_SYS_SPD_BUS_NUM)
499#define CONFIG_SYS_SPD_BUS_NUM 0
Matthias Fuchsd8a8ea52007-03-08 16:20:32 +0100500#endif
Stefan Roese8c120452007-03-01 07:03:25 +0100501
Heiko Schocher385c9ef2012-01-16 21:12:23 +0000502struct i2c_adapter {
503 void (*init)(struct i2c_adapter *adap, int speed,
504 int slaveaddr);
505 int (*probe)(struct i2c_adapter *adap, uint8_t chip);
506 int (*read)(struct i2c_adapter *adap, uint8_t chip,
507 uint addr, int alen, uint8_t *buffer,
508 int len);
509 int (*write)(struct i2c_adapter *adap, uint8_t chip,
510 uint addr, int alen, uint8_t *buffer,
511 int len);
512 uint (*set_bus_speed)(struct i2c_adapter *adap,
513 uint speed);
514 int speed;
Hannes Petermaierd5243352014-02-03 21:22:18 +0100515 int waitdelay;
Heiko Schocher385c9ef2012-01-16 21:12:23 +0000516 int slaveaddr;
517 int init_done;
518 int hwadapnr;
519 char *name;
520};
521
522#define U_BOOT_I2C_MKENT_COMPLETE(_init, _probe, _read, _write, \
523 _set_speed, _speed, _slaveaddr, _hwadapnr, _name) \
524 { \
525 .init = _init, \
526 .probe = _probe, \
527 .read = _read, \
528 .write = _write, \
529 .set_bus_speed = _set_speed, \
530 .speed = _speed, \
531 .slaveaddr = _slaveaddr, \
532 .init_done = 0, \
533 .hwadapnr = _hwadapnr, \
534 .name = #_name \
535};
536
537#define U_BOOT_I2C_ADAP_COMPLETE(_name, _init, _probe, _read, _write, \
538 _set_speed, _speed, _slaveaddr, _hwadapnr) \
539 ll_entry_declare(struct i2c_adapter, _name, i2c) = \
540 U_BOOT_I2C_MKENT_COMPLETE(_init, _probe, _read, _write, \
541 _set_speed, _speed, _slaveaddr, _hwadapnr, _name);
542
543struct i2c_adapter *i2c_get_adapter(int index);
544
545#ifndef CONFIG_SYS_I2C_DIRECT_BUS
546struct i2c_mux {
547 int id;
548 char name[16];
549};
550
551struct i2c_next_hop {
552 struct i2c_mux mux;
553 uint8_t chip;
554 uint8_t channel;
555};
556
557struct i2c_bus_hose {
558 int adapter;
559 struct i2c_next_hop next_hop[CONFIG_SYS_I2C_MAX_HOPS];
560};
561#define I2C_NULL_HOP {{-1, ""}, 0, 0}
562extern struct i2c_bus_hose i2c_bus[];
563
564#define I2C_ADAPTER(bus) i2c_bus[bus].adapter
565#else
566#define I2C_ADAPTER(bus) bus
567#endif
568#define I2C_BUS gd->cur_i2c_bus
569
570#define I2C_ADAP_NR(bus) i2c_get_adapter(I2C_ADAPTER(bus))
571#define I2C_ADAP I2C_ADAP_NR(gd->cur_i2c_bus)
572#define I2C_ADAP_HWNR (I2C_ADAP->hwadapnr)
573
574#ifndef CONFIG_SYS_I2C_DIRECT_BUS
575#define I2C_MUX_PCA9540_ID 1
576#define I2C_MUX_PCA9540 {I2C_MUX_PCA9540_ID, "PCA9540B"}
577#define I2C_MUX_PCA9542_ID 2
578#define I2C_MUX_PCA9542 {I2C_MUX_PCA9542_ID, "PCA9542A"}
579#define I2C_MUX_PCA9544_ID 3
580#define I2C_MUX_PCA9544 {I2C_MUX_PCA9544_ID, "PCA9544A"}
581#define I2C_MUX_PCA9547_ID 4
582#define I2C_MUX_PCA9547 {I2C_MUX_PCA9547_ID, "PCA9547A"}
Michael Burre6658742013-09-23 22:35:45 +0000583#define I2C_MUX_PCA9548_ID 5
584#define I2C_MUX_PCA9548 {I2C_MUX_PCA9548_ID, "PCA9548"}
Heiko Schocher385c9ef2012-01-16 21:12:23 +0000585#endif
586
Heiko Schocher98aed372008-10-15 09:35:26 +0200587#ifndef I2C_SOFT_DECLARATIONS
588# if defined(CONFIG_MPC8260)
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200589# define I2C_SOFT_DECLARATIONS volatile ioport_t *iop = ioport_addr((immap_t *)CONFIG_SYS_IMMR, I2C_PORT);
Heiko Schocher98aed372008-10-15 09:35:26 +0200590# elif defined(CONFIG_8xx)
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200591# define I2C_SOFT_DECLARATIONS volatile immap_t *immr = (immap_t *)CONFIG_SYS_IMMR;
Jens Scharsig0cf0b932010-02-03 22:46:58 +0100592
593# elif (defined(CONFIG_AT91RM9200) || \
594 defined(CONFIG_AT91SAM9260) || defined(CONFIG_AT91SAM9261) || \
Andreas Bießmanncb96a0a2013-10-30 15:18:18 +0100595 defined(CONFIG_AT91SAM9263))
esw@bus-elektronik.de78132272011-12-20 06:05:30 +0000596# define I2C_SOFT_DECLARATIONS at91_pio_t *pio = (at91_pio_t *) ATMEL_BASE_PIOA;
Heiko Schocher98aed372008-10-15 09:35:26 +0200597# else
598# define I2C_SOFT_DECLARATIONS
599# endif
600#endif
Timur Tabiecf5f072008-12-03 11:28:30 -0600601
602#ifdef CONFIG_8xx
Peter Tyser9c90a2c2009-04-24 15:34:05 -0500603/* Set default value for the I2C bus speed on 8xx. In the
Timur Tabiecf5f072008-12-03 11:28:30 -0600604 * future, we'll define these in all 8xx board config files.
605 */
606#ifndef CONFIG_SYS_I2C_SPEED
607#define CONFIG_SYS_I2C_SPEED 50000
608#endif
Timur Tabiecf5f072008-12-03 11:28:30 -0600609#endif
Peter Tyser9c90a2c2009-04-24 15:34:05 -0500610
611/*
612 * Many boards/controllers/drivers don't support an I2C slave interface so
613 * provide a default slave address for them for use in common code. A real
614 * value for CONFIG_SYS_I2C_SLAVE should be defined for any board which does
615 * support a slave interface.
616 */
617#ifndef CONFIG_SYS_I2C_SLAVE
618#define CONFIG_SYS_I2C_SLAVE 0xfe
Timur Tabiecf5f072008-12-03 11:28:30 -0600619#endif
620
wdenk1f045212002-03-10 14:37:15 +0000621/*
622 * Initialization, must be called once on start up, may be called
623 * repeatedly to change the speed and slave addresses.
624 */
625void i2c_init(int speed, int slaveaddr);
wdenk06d01db2003-03-14 20:47:52 +0000626void i2c_init_board(void);
Richard Retanubun26a33502010-04-12 15:08:17 -0400627#ifdef CONFIG_SYS_I2C_BOARD_LATE_INIT
628void i2c_board_late_init(void);
629#endif
wdenk1f045212002-03-10 14:37:15 +0000630
Heiko Schocher385c9ef2012-01-16 21:12:23 +0000631#ifdef CONFIG_SYS_I2C
632/*
Heiko Schocher385c9ef2012-01-16 21:12:23 +0000633 * i2c_get_bus_num:
634 *
635 * Returns index of currently active I2C bus. Zero-based.
636 */
637unsigned int i2c_get_bus_num(void);
Heiko Schocher67b23a32008-10-15 09:39:47 +0200638
Heiko Schocher385c9ef2012-01-16 21:12:23 +0000639/*
640 * i2c_set_bus_num:
641 *
642 * Change the active I2C bus. Subsequent read/write calls will
643 * go to this one.
644 *
645 * bus - bus index, zero based
646 *
647 * Returns: 0 on success, not 0 on failure
648 *
649 */
650int i2c_set_bus_num(unsigned int bus);
Heiko Schocher67b23a32008-10-15 09:39:47 +0200651
Heiko Schocher385c9ef2012-01-16 21:12:23 +0000652/*
653 * i2c_init_all():
654 *
655 * Initializes all I2C adapters in the system. All i2c_adap structures must
656 * be initialized beforehead with function pointers and data, including
657 * speed and slaveaddr. Returns 0 on success, non-0 on failure.
658 */
659void i2c_init_all(void);
Heiko Schocher67b23a32008-10-15 09:39:47 +0200660
Heiko Schocher385c9ef2012-01-16 21:12:23 +0000661/*
662 * Probe the given I2C chip address. Returns 0 if a chip responded,
663 * not 0 on failure.
664 */
665int i2c_probe(uint8_t chip);
666
667/*
668 * Read/Write interface:
669 * chip: I2C chip address, range 0..127
670 * addr: Memory (register) address within the chip
671 * alen: Number of bytes to use for addr (typically 1, 2 for larger
672 * memories, 0 for register type devices with only one
673 * register)
674 * buffer: Where to read/write the data
675 * len: How many bytes to read/write
676 *
677 * Returns: 0 on success, not 0 on failure
678 */
679int i2c_read(uint8_t chip, unsigned int addr, int alen,
680 uint8_t *buffer, int len);
681
682int i2c_write(uint8_t chip, unsigned int addr, int alen,
683 uint8_t *buffer, int len);
684
685/*
686 * Utility routines to read/write registers.
687 */
688uint8_t i2c_reg_read(uint8_t addr, uint8_t reg);
689
690void i2c_reg_write(uint8_t addr, uint8_t reg, uint8_t val);
691
692/*
693 * i2c_set_bus_speed:
694 *
695 * Change the speed of the active I2C bus
696 *
697 * speed - bus speed in Hz
698 *
699 * Returns: new bus speed
700 *
701 */
702unsigned int i2c_set_bus_speed(unsigned int speed);
703
704/*
705 * i2c_get_bus_speed:
706 *
707 * Returns speed of currently active I2C bus in Hz
708 */
709
710unsigned int i2c_get_bus_speed(void);
711
712/*
713 * i2c_reloc_fixup:
714 *
715 * Adjusts I2C pointers after U-Boot is relocated to DRAM
716 */
717void i2c_reloc_fixup(void);
Heiko Schocherea818db2013-01-29 08:53:15 +0100718#if defined(CONFIG_SYS_I2C_SOFT)
719void i2c_soft_init(void);
720void i2c_soft_active(void);
721void i2c_soft_tristate(void);
722int i2c_soft_read(void);
723void i2c_soft_sda(int bit);
724void i2c_soft_scl(int bit);
725void i2c_soft_delay(void);
Heiko Schocher67b23a32008-10-15 09:39:47 +0200726#endif
Heiko Schocher385c9ef2012-01-16 21:12:23 +0000727#else
Heiko Schocher67b23a32008-10-15 09:39:47 +0200728
wdenk1f045212002-03-10 14:37:15 +0000729/*
730 * Probe the given I2C chip address. Returns 0 if a chip responded,
731 * not 0 on failure.
732 */
733int i2c_probe(uchar chip);
734
735/*
736 * Read/Write interface:
737 * chip: I2C chip address, range 0..127
738 * addr: Memory (register) address within the chip
739 * alen: Number of bytes to use for addr (typically 1, 2 for larger
740 * memories, 0 for register type devices with only one
741 * register)
742 * buffer: Where to read/write the data
743 * len: How many bytes to read/write
744 *
745 * Returns: 0 on success, not 0 on failure
746 */
747int i2c_read(uchar chip, uint addr, int alen, uchar *buffer, int len);
748int i2c_write(uchar chip, uint addr, int alen, uchar *buffer, int len);
749
750/*
751 * Utility routines to read/write registers.
752 */
Timur Tabiecf5f072008-12-03 11:28:30 -0600753static inline u8 i2c_reg_read(u8 addr, u8 reg)
754{
755 u8 buf;
756
757#ifdef CONFIG_8xx
758 /* MPC8xx needs this. Maybe one day we can get rid of it. */
759 i2c_init(CONFIG_SYS_I2C_SPEED, CONFIG_SYS_I2C_SLAVE);
760#endif
761
762#ifdef DEBUG
763 printf("%s: addr=0x%02x, reg=0x%02x\n", __func__, addr, reg);
764#endif
765
Timur Tabiecf5f072008-12-03 11:28:30 -0600766 i2c_read(addr, reg, 1, &buf, 1);
Timur Tabiecf5f072008-12-03 11:28:30 -0600767
768 return buf;
769}
770
771static inline void i2c_reg_write(u8 addr, u8 reg, u8 val)
772{
773#ifdef CONFIG_8xx
774 /* MPC8xx needs this. Maybe one day we can get rid of it. */
775 i2c_init(CONFIG_SYS_I2C_SPEED, CONFIG_SYS_I2C_SLAVE);
776#endif
777
778#ifdef DEBUG
779 printf("%s: addr=0x%02x, reg=0x%02x, val=0x%02x\n",
780 __func__, addr, reg, val);
781#endif
782
Timur Tabiecf5f072008-12-03 11:28:30 -0600783 i2c_write(addr, reg, 1, &val, 1);
Timur Tabiecf5f072008-12-03 11:28:30 -0600784}
wdenk1f045212002-03-10 14:37:15 +0000785
Ben Warrenbb99ad62006-09-07 16:50:54 -0400786/*
787 * Functions for setting the current I2C bus and its speed
788 */
789
790/*
791 * i2c_set_bus_num:
792 *
793 * Change the active I2C bus. Subsequent read/write calls will
794 * go to this one.
795 *
Wolfgang Denk53677ef2008-05-20 16:00:29 +0200796 * bus - bus index, zero based
Ben Warrenbb99ad62006-09-07 16:50:54 -0400797 *
Wolfgang Denk53677ef2008-05-20 16:00:29 +0200798 * Returns: 0 on success, not 0 on failure
Ben Warrenbb99ad62006-09-07 16:50:54 -0400799 *
800 */
Timur Tabi9ca880a2006-10-31 21:23:16 -0600801int i2c_set_bus_num(unsigned int bus);
Ben Warrenbb99ad62006-09-07 16:50:54 -0400802
803/*
804 * i2c_get_bus_num:
805 *
806 * Returns index of currently active I2C bus. Zero-based.
807 */
808
Timur Tabi9ca880a2006-10-31 21:23:16 -0600809unsigned int i2c_get_bus_num(void);
Ben Warrenbb99ad62006-09-07 16:50:54 -0400810
811/*
812 * i2c_set_bus_speed:
813 *
814 * Change the speed of the active I2C bus
815 *
Wolfgang Denk53677ef2008-05-20 16:00:29 +0200816 * speed - bus speed in Hz
Ben Warrenbb99ad62006-09-07 16:50:54 -0400817 *
Wolfgang Denk53677ef2008-05-20 16:00:29 +0200818 * Returns: 0 on success, not 0 on failure
Ben Warrenbb99ad62006-09-07 16:50:54 -0400819 *
820 */
Timur Tabi9ca880a2006-10-31 21:23:16 -0600821int i2c_set_bus_speed(unsigned int);
Ben Warrenbb99ad62006-09-07 16:50:54 -0400822
823/*
824 * i2c_get_bus_speed:
825 *
826 * Returns speed of currently active I2C bus in Hz
827 */
828
Timur Tabi9ca880a2006-10-31 21:23:16 -0600829unsigned int i2c_get_bus_speed(void);
Heiko Schocher385c9ef2012-01-16 21:12:23 +0000830#endif /* CONFIG_SYS_I2C */
831
832/*
833 * only for backwardcompatibility, should go away if we switched
834 * completely to new multibus support.
835 */
836#if defined(CONFIG_SYS_I2C) || defined(CONFIG_I2C_MULTI_BUS)
837# if !defined(CONFIG_SYS_MAX_I2C_BUS)
838# define CONFIG_SYS_MAX_I2C_BUS 2
839# endif
Łukasz Majewskiea0f73a2013-08-16 15:31:45 +0200840# define I2C_MULTI_BUS 1
Heiko Schocher385c9ef2012-01-16 21:12:23 +0000841#else
842# define CONFIG_SYS_MAX_I2C_BUS 1
843# define I2C_MULTI_BUS 0
844#endif
Ben Warrenbb99ad62006-09-07 16:50:54 -0400845
Marek Vasutcd7b4e82011-10-25 11:40:57 +0200846/* NOTE: These two functions MUST be always_inline to avoid code growth! */
847static inline unsigned int I2C_GET_BUS(void) __attribute__((always_inline));
848static inline unsigned int I2C_GET_BUS(void)
849{
850 return I2C_MULTI_BUS ? i2c_get_bus_num() : 0;
851}
852
853static inline void I2C_SET_BUS(unsigned int bus) __attribute__((always_inline));
854static inline void I2C_SET_BUS(unsigned int bus)
855{
856 if (I2C_MULTI_BUS)
857 i2c_set_bus_num(bus);
858}
859
Łukasz Majewski7ca8f732012-09-04 23:15:20 +0000860/* Multi I2C definitions */
861enum {
862 I2C_0, I2C_1, I2C_2, I2C_3, I2C_4, I2C_5, I2C_6, I2C_7,
863 I2C_8, I2C_9, I2C_10,
864};
865
866/* Multi I2C busses handling */
867#ifdef CONFIG_SOFT_I2C_MULTI_BUS
868extern int get_multi_scl_pin(void);
869extern int get_multi_sda_pin(void);
870extern int multi_i2c_init(void);
871#endif
Rajeshwari Shindea9d2ae72012-12-26 20:03:12 +0000872
873/**
874 * Get FDT values for i2c bus.
875 *
876 * @param blob Device tree blbo
877 * @return the number of I2C bus
878 */
879void board_i2c_init(const void *blob);
880
881/**
882 * Find the I2C bus number by given a FDT I2C node.
883 *
884 * @param blob Device tree blbo
885 * @param node FDT I2C node to find
886 * @return the number of I2C bus (zero based), or -1 on error
887 */
888int i2c_get_bus_num_fdt(int node);
889
890/**
891 * Reset the I2C bus represented by the given a FDT I2C node.
892 *
893 * @param blob Device tree blbo
894 * @param node FDT I2C node to find
895 * @return 0 if port was reset, -1 if not found
896 */
897int i2c_reset_port_fdt(const void *blob, int node);
Simon Glassc6202d82014-12-10 08:55:47 -0700898
899#endif /* !CONFIG_DM_I2C */
900
wdenk1f045212002-03-10 14:37:15 +0000901#endif /* _I2C_H_ */