blob: dd178838f6b664fbe5be9fb4acc66e01f47dab1c [file] [log] [blame]
Tom Rini83d290c2018-05-06 17:58:06 -04001// SPDX-License-Identifier: GPL-2.0+
Simon Glass1938f4a2013-03-11 06:49:53 +00002/*
3 * Copyright (c) 2011 The Chromium OS Authors.
4 * (C) Copyright 2002-2006
5 * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
6 *
7 * (C) Copyright 2002
8 * Sysgo Real-Time Solutions, GmbH <www.elinos.com>
9 * Marius Groeger <mgroeger@sysgo.de>
Simon Glass1938f4a2013-03-11 06:49:53 +000010 */
11
12#include <common.h>
Simon Glassf0293d32018-11-15 18:43:52 -070013#include <bloblist.h>
Simon Glass52f24232020-05-10 11:40:00 -060014#include <bootstage.h>
Simon Glassd96c2602019-12-28 10:44:58 -070015#include <clock_legacy.h>
Simon Glass24b852a2015-11-08 23:47:45 -070016#include <console.h>
Mario Six5d6c61a2018-08-06 10:23:41 +020017#include <cpu.h>
Simon Glass30c7c432019-11-14 12:57:34 -070018#include <cpu_func.h>
Stefan Roese70545642022-09-02 13:57:50 +020019#include <cyclic.h>
Simon Glass4e4bf942022-07-31 12:28:48 -060020#include <display_options.h>
Simon Glassab7cd622014-07-23 06:55:04 -060021#include <dm.h>
Simon Glass4bfd1f52019-08-01 09:46:43 -060022#include <env.h>
Simon Glassf3998fd2019-08-02 09:44:25 -060023#include <env_internal.h>
Simon Glass5a421902022-03-04 08:43:02 -070024#include <event.h>
Simon Glass1938f4a2013-03-11 06:49:53 +000025#include <fdtdec.h>
Simon Glassf828bf22013-04-20 08:42:41 +000026#include <fs.h>
Simon Glassdb41d652019-12-28 10:45:07 -070027#include <hang.h>
Simon Glasse4fef6c2013-03-11 14:30:42 +000028#include <i2c.h>
Simon Glass67c4e9f2019-11-14 12:57:45 -070029#include <init.h>
Simon Glass1938f4a2013-03-11 06:49:53 +000030#include <initcall.h>
Simon Glassf7ae49f2020-05-10 11:40:05 -060031#include <log.h>
Simon Glassfb5cf7f2015-02-27 22:06:36 -070032#include <malloc.h>
Joe Hershberger0eb25b62015-03-22 17:08:59 -050033#include <mapmem.h>
Simon Glassa733b062013-04-26 02:53:43 +000034#include <os.h>
Simon Glass1938f4a2013-03-11 06:49:53 +000035#include <post.h>
Simon Glasse47b2d62017-03-31 08:40:38 -060036#include <relocate.h>
Simon Glassb03e0512019-11-14 12:57:24 -070037#include <serial.h>
Simon Glassb0edea32018-11-15 18:44:09 -070038#include <spl.h>
Jeroen Hofsteec5d40012014-06-23 23:20:19 +020039#include <status_led.h>
Mario Six23471ae2018-08-06 10:23:34 +020040#include <sysreset.h>
Simon Glass1057e6c2016-02-24 09:14:50 -070041#include <timer.h>
Simon Glass71c52db2013-06-11 11:14:42 -070042#include <trace.h>
Simon Glass5a541942016-01-18 19:52:21 -070043#include <video.h>
Simon Glasse4fef6c2013-03-11 14:30:42 +000044#include <watchdog.h>
Simon Glass90526e92020-05-10 11:39:56 -060045#include <asm/cache.h>
Simon Glass401d1c42020-10-30 21:38:53 -060046#include <asm/global_data.h>
Simon Glass1938f4a2013-03-11 06:49:53 +000047#include <asm/io.h>
48#include <asm/sections.h>
Simon Glassab7cd622014-07-23 06:55:04 -060049#include <dm/root.h>
Simon Glass056285f2017-03-31 08:40:35 -060050#include <linux/errno.h>
Pali Rohár236f7392022-09-18 13:23:27 +020051#include <linux/log2.h>
Bo Lv96a66d02023-05-12 19:18:22 +080052#include <linux/string.h>
xia.jin958d2932024-06-07 03:12:53 +000053#ifdef CONFIG_ARMV8_MULTIENTRY
54#include <asm/arch-meson/smp.h>
55#endif
Simon Glass1938f4a2013-03-11 06:49:53 +000056
Simon Glass1938f4a2013-03-11 06:49:53 +000057DECLARE_GLOBAL_DATA_PTR;
Simon Glass1938f4a2013-03-11 06:49:53 +000058
59/*
Simon Glass4c509342015-04-28 20:25:03 -060060 * TODO(sjg@chromium.org): IMO this code should be
Simon Glass1938f4a2013-03-11 06:49:53 +000061 * refactored to a single function, something like:
62 *
63 * void led_set_state(enum led_colour_t colour, int on);
64 */
65/************************************************************************
66 * Coloured LED functionality
67 ************************************************************************
68 * May be supplied by boards if desired
69 */
Jeroen Hofsteec5d40012014-06-23 23:20:19 +020070__weak void coloured_LED_init(void) {}
71__weak void red_led_on(void) {}
72__weak void red_led_off(void) {}
73__weak void green_led_on(void) {}
74__weak void green_led_off(void) {}
75__weak void yellow_led_on(void) {}
76__weak void yellow_led_off(void) {}
77__weak void blue_led_on(void) {}
78__weak void blue_led_off(void) {}
Simon Glass1938f4a2013-03-11 06:49:53 +000079
80/*
81 * Why is gd allocated a register? Prior to reloc it might be better to
82 * just pass it around to each function in this file?
83 *
84 * After reloc one could argue that it is hardly used and doesn't need
85 * to be in a register. Or if it is it should perhaps hold pointers to all
86 * global data for all modules, so that post-reloc we can avoid the massive
87 * literal pool we get on ARM. Or perhaps just encourage each module to use
88 * a structure...
89 */
90
Sonic Zhangd54d7eb2014-07-17 19:01:34 +080091#if defined(CONFIG_WATCHDOG) || defined(CONFIG_HW_WATCHDOG)
Simon Glasse4fef6c2013-03-11 14:30:42 +000092static int init_func_watchdog_init(void)
93{
Tom Riniea3310e2017-03-14 11:08:10 -040094# if defined(CONFIG_HW_WATCHDOG) && \
95 (defined(CONFIG_M68K) || defined(CONFIG_MICROBLAZE) || \
Prasanthi Chellakumar1473f6a2018-10-09 11:46:40 -070096 defined(CONFIG_SH) || \
Anatolij Gustschin46d7a3b2016-06-13 14:24:23 +020097 defined(CONFIG_DESIGNWARE_WATCHDOG) || \
Stefan Roese14a380a2015-03-10 08:04:36 +010098 defined(CONFIG_IMX_WATCHDOG))
Sonic Zhangd54d7eb2014-07-17 19:01:34 +080099 hw_watchdog_init();
Simon Glasse4fef6c2013-03-11 14:30:42 +0000100 puts(" Watchdog enabled\n");
Anatolij Gustschinba169d92016-06-13 14:24:24 +0200101# endif
Stefan Roese29caf932022-09-02 14:10:46 +0200102 schedule();
Simon Glasse4fef6c2013-03-11 14:30:42 +0000103
104 return 0;
105}
106
107int init_func_watchdog_reset(void)
108{
Stefan Roese29caf932022-09-02 14:10:46 +0200109 schedule();
Simon Glasse4fef6c2013-03-11 14:30:42 +0000110
111 return 0;
112}
113#endif /* CONFIG_WATCHDOG */
114
Jeroen Hofsteedd2a6cd2014-10-08 22:57:22 +0200115__weak void board_add_ram_info(int use_default)
Simon Glasse4fef6c2013-03-11 14:30:42 +0000116{
117 /* please define platform specific board_add_ram_info() */
118}
119
Simon Glass1938f4a2013-03-11 06:49:53 +0000120static int init_baud_rate(void)
121{
Simon Glassbfebc8c2017-08-03 12:22:13 -0600122 gd->baudrate = env_get_ulong("baudrate", 10, CONFIG_BAUDRATE);
Simon Glass1938f4a2013-03-11 06:49:53 +0000123 return 0;
124}
125
126static int display_text_info(void)
127{
Ben Stoltz9b217492015-07-31 09:31:37 -0600128#if !defined(CONFIG_SANDBOX) && !defined(CONFIG_EFI_APP)
Daniel Schwierzeck9fdee7d2014-11-15 23:46:53 +0100129 ulong bss_start, bss_end, text_base;
Simon Glass1938f4a2013-03-11 06:49:53 +0000130
Simon Glass632efa72013-03-11 07:06:48 +0000131 bss_start = (ulong)&__bss_start;
132 bss_end = (ulong)&__bss_end;
Albert ARIBAUDb60eff32014-02-22 17:53:43 +0100133
Simon Glass98463902022-10-20 18:22:39 -0600134#ifdef CONFIG_TEXT_BASE
135 text_base = CONFIG_TEXT_BASE;
Sonic Zhangd54d7eb2014-07-17 19:01:34 +0800136#else
Daniel Schwierzeck9fdee7d2014-11-15 23:46:53 +0100137 text_base = CONFIG_SYS_MONITOR_BASE;
Sonic Zhangd54d7eb2014-07-17 19:01:34 +0800138#endif
Daniel Schwierzeck9fdee7d2014-11-15 23:46:53 +0100139
140 debug("U-Boot code: %08lX -> %08lX BSS: -> %08lX\n",
Mario Six16ef1472018-01-15 11:10:02 +0100141 text_base, bss_start, bss_end);
Simon Glassa733b062013-04-26 02:53:43 +0000142#endif
Simon Glass1938f4a2013-03-11 06:49:53 +0000143
Simon Glass1938f4a2013-03-11 06:49:53 +0000144 return 0;
145}
146
Mario Six23471ae2018-08-06 10:23:34 +0200147#ifdef CONFIG_SYSRESET
148static int print_resetinfo(void)
149{
150 struct udevice *dev;
151 char status[256];
Michal Suchanek9259bd12022-10-10 20:29:40 +0200152 bool status_printed = false;
Mario Six23471ae2018-08-06 10:23:34 +0200153 int ret;
154
Michal Suchanek9259bd12022-10-10 20:29:40 +0200155 /* Not all boards have sysreset drivers available during early
156 * boot, so don't fail if one can't be found.
157 */
158 for (ret = uclass_first_device_check(UCLASS_SYSRESET, &dev); dev;
159 ret = uclass_next_device_check(&dev)) {
160 if (ret) {
161 debug("%s: %s sysreset device (error: %d)\n",
162 __func__, dev->name, ret);
163 continue;
164 }
Mario Six23471ae2018-08-06 10:23:34 +0200165
Michal Suchanek9259bd12022-10-10 20:29:40 +0200166 if (!sysreset_get_status(dev, status, sizeof(status))) {
167 printf("%s%s", status_printed ? " " : "", status);
168 status_printed = true;
169 }
170 }
171 if (status_printed)
172 printf("\n");
Mario Six23471ae2018-08-06 10:23:34 +0200173
174 return 0;
175}
176#endif
177
Mario Six5d6c61a2018-08-06 10:23:41 +0200178#if defined(CONFIG_DISPLAY_CPUINFO) && CONFIG_IS_ENABLED(CPU)
179static int print_cpuinfo(void)
180{
181 struct udevice *dev;
182 char desc[512];
183 int ret;
184
Ye Lif5b66af2020-05-03 21:58:50 +0800185 dev = cpu_get_current_dev();
186 if (!dev) {
187 debug("%s: Could not get CPU device\n",
188 __func__);
189 return -ENODEV;
Mario Six5d6c61a2018-08-06 10:23:41 +0200190 }
191
192 ret = cpu_get_desc(dev, desc, sizeof(desc));
193 if (ret) {
194 debug("%s: Could not get CPU description (err = %d)\n",
195 dev->name, ret);
196 return ret;
197 }
198
Bin Mengecfe6632018-10-10 22:06:55 -0700199 printf("CPU: %s\n", desc);
Mario Six5d6c61a2018-08-06 10:23:41 +0200200
201 return 0;
202}
203#endif
204
Simon Glass1938f4a2013-03-11 06:49:53 +0000205static int announce_dram_init(void)
206{
207 puts("DRAM: ");
208 return 0;
209}
210
Pali Rohár236f7392022-09-18 13:23:27 +0200211/*
212 * From input size calculate its nearest rounded unit scale (multiply of 2^10)
213 * and value in calculated unit scale multiplied by 10 (as fractional fixed
214 * point number with one decimal digit), which is human natural format,
215 * same what uses print_size() function for displaying. Mathematically it is:
216 * round_nearest(val * 2^scale) = size * 10; where: 10 <= val < 10240.
217 *
218 * For example for size=87654321 we calculate scale=20 and val=836 which means
219 * that input has natural human format 83.6 M (mega = 2^20).
220 */
221#define compute_size_scale_val(size, scale, val) do { \
222 scale = ilog2(size) / 10 * 10; \
223 val = (10 * size + ((1ULL << scale) >> 1)) >> scale; \
224 if (val == 10240) { val = 10; scale += 10; } \
225} while (0)
226
227/*
228 * Check if the sizes in their natural units written in decimal format with
229 * one fraction number are same.
230 */
231static int sizes_near(unsigned long long size1, unsigned long long size2)
232{
233 unsigned int size1_scale, size1_val, size2_scale, size2_val;
234
235 compute_size_scale_val(size1, size1_scale, size1_val);
236 compute_size_scale_val(size2, size2_scale, size2_val);
237
238 return size1_scale == size2_scale && size1_val == size2_val;
239}
240
Simon Glass1938f4a2013-03-11 06:49:53 +0000241static int show_dram_config(void)
242{
York Sunfa39ffe2014-05-02 17:28:05 -0700243 unsigned long long size;
Simon Glass1938f4a2013-03-11 06:49:53 +0000244 int i;
245
246 debug("\nRAM Configuration:\n");
247 for (i = size = 0; i < CONFIG_NR_DRAM_BANKS; i++) {
248 size += gd->bd->bi_dram[i].size;
Bin Meng715f5992015-08-06 01:31:20 -0700249 debug("Bank #%d: %llx ", i,
250 (unsigned long long)(gd->bd->bi_dram[i].start));
Simon Glass1938f4a2013-03-11 06:49:53 +0000251#ifdef DEBUG
252 print_size(gd->bd->bi_dram[i].size, "\n");
253#endif
254 }
255 debug("\nDRAM: ");
Simon Glass1938f4a2013-03-11 06:49:53 +0000256
Pali Rohár236f7392022-09-18 13:23:27 +0200257 print_size(gd->ram_size, "");
258 if (!sizes_near(gd->ram_size, size)) {
259 printf(" (effective ");
260 print_size(size, ")");
261 }
Simon Glasse4fef6c2013-03-11 14:30:42 +0000262 board_add_ram_info(0);
263 putc('\n');
Simon Glass1938f4a2013-03-11 06:49:53 +0000264
265 return 0;
266}
267
Simon Glass76b00ac2017-03-31 08:40:32 -0600268__weak int dram_init_banksize(void)
Simon Glass1938f4a2013-03-11 06:49:53 +0000269{
Stefan Roesef120aa72020-08-12 13:02:39 +0200270 gd->bd->bi_dram[0].start = gd->ram_base;
Simon Glass1938f4a2013-03-11 06:49:53 +0000271 gd->bd->bi_dram[0].size = get_effective_memsize();
Simon Glass76b00ac2017-03-31 08:40:32 -0600272
273 return 0;
Simon Glass1938f4a2013-03-11 06:49:53 +0000274}
275
Tom Rini55dabcc2021-08-18 23:12:24 -0400276#if CONFIG_IS_ENABLED(SYS_I2C_LEGACY)
Simon Glasse4fef6c2013-03-11 14:30:42 +0000277static int init_func_i2c(void)
278{
279 puts("I2C: ");
trem815a76f2013-09-21 18:13:34 +0200280 i2c_init_all();
Simon Glasse4fef6c2013-03-11 14:30:42 +0000281 puts("ready\n");
282 return 0;
283}
284#endif
285
Rajesh Bhagat1fab98f2018-01-17 16:13:08 +0530286#if defined(CONFIG_VID)
287__weak int init_func_vid(void)
288{
289 return 0;
290}
291#endif
292
Simon Glass1938f4a2013-03-11 06:49:53 +0000293static int setup_mon_len(void)
294{
benlong.zhouf0969fb2023-10-26 16:42:01 +0800295#ifdef CONFIG_AMLOGIC_MODIFY
296#ifdef CONFIG_AMLOGIC_TIME_PROFILE
297 printf("uboot start TE: %d us\n", get_time());
298#endif
299#endif
Michal Simeke945f6d2014-05-08 16:08:44 +0200300#if defined(__ARM__) || defined(__MICROBLAZE__)
Albert ARIBAUDb60eff32014-02-22 17:53:43 +0100301 gd->mon_len = (ulong)&__bss_end - (ulong)_start;
Heinrich Schuchardt3c9fc232021-05-19 12:02:39 +0200302#elif defined(CONFIG_SANDBOX)
303 gd->mon_len = 0;
304#elif defined(CONFIG_EFI_APP)
Simon Glassa733b062013-04-26 02:53:43 +0000305 gd->mon_len = (ulong)&_end - (ulong)_init;
Tom Riniea3310e2017-03-14 11:08:10 -0400306#elif defined(CONFIG_NIOS2) || defined(CONFIG_XTENSA)
Sonic Zhangd54d7eb2014-07-17 19:01:34 +0800307 gd->mon_len = CONFIG_SYS_MONITOR_LEN;
Tom Rini11232132022-04-06 09:21:25 -0400308#elif defined(CONFIG_SH) || defined(CONFIG_RISCV)
Kun-Hua Huang2e88bb22015-08-24 14:52:35 +0800309 gd->mon_len = (ulong)(&__bss_end) - (ulong)(&_start);
Simon Glassb0b35952016-05-14 18:49:28 -0600310#elif defined(CONFIG_SYS_MONITOR_BASE)
Simon Glasse4fef6c2013-03-11 14:30:42 +0000311 /* TODO: use (ulong)&__bss_end - (ulong)&__text_start; ? */
312 gd->mon_len = (ulong)&__bss_end - CONFIG_SYS_MONITOR_BASE;
Simon Glass632efa72013-03-11 07:06:48 +0000313#endif
Simon Glass1938f4a2013-03-11 06:49:53 +0000314 return 0;
315}
316
Simon Glassb0edea32018-11-15 18:44:09 -0700317static int setup_spl_handoff(void)
318{
319#if CONFIG_IS_ENABLED(HANDOFF)
Simon Glass7f3b79a2022-01-12 19:26:17 -0700320 gd->spl_handoff = bloblist_find(BLOBLISTT_U_BOOT_SPL_HANDOFF,
Simon Glassb0edea32018-11-15 18:44:09 -0700321 sizeof(struct spl_handoff));
322 debug("Found SPL hand-off info %p\n", gd->spl_handoff);
323#endif
324
325 return 0;
326}
327
Simon Glass1938f4a2013-03-11 06:49:53 +0000328__weak int arch_cpu_init(void)
329{
330 return 0;
331}
332
Paul Burton8ebf5062016-09-21 11:18:46 +0100333__weak int mach_cpu_init(void)
334{
335 return 0;
336}
337
Simon Glass1938f4a2013-03-11 06:49:53 +0000338/* Get the top of usable RAM */
Pali Rohár049704f2022-09-09 17:32:40 +0200339__weak phys_size_t board_get_usable_ram_top(phys_size_t total_size)
Simon Glass1938f4a2013-03-11 06:49:53 +0000340{
Heinrich Schuchardt54280962020-05-09 21:21:14 +0200341#if defined(CONFIG_SYS_SDRAM_BASE) && CONFIG_SYS_SDRAM_BASE > 0
Stephen Warren1e4d11a2014-12-23 10:34:49 -0700342 /*
Simon Glass4c509342015-04-28 20:25:03 -0600343 * Detect whether we have so much RAM that it goes past the end of our
Stephen Warren1e4d11a2014-12-23 10:34:49 -0700344 * 32-bit address space. If so, clip the usable RAM so it doesn't.
345 */
346 if (gd->ram_top < CONFIG_SYS_SDRAM_BASE)
347 /*
348 * Will wrap back to top of 32-bit space when reservations
349 * are made.
350 */
351 return 0;
352#endif
Simon Glass1938f4a2013-03-11 06:49:53 +0000353 return gd->ram_top;
354}
355
Ovidiu Panaitd63fc992022-09-13 21:31:28 +0300356__weak int arch_setup_dest_addr(void)
357{
358 return 0;
359}
360
Simon Glass1938f4a2013-03-11 06:49:53 +0000361static int setup_dest_addr(void)
362{
363 debug("Monitor len: %08lX\n", gd->mon_len);
364 /*
365 * Ram is setup, size stored in gd !!
366 */
Pali Rohárd92aee52022-09-09 17:32:41 +0200367 debug("Ram size: %08llX\n", (unsigned long long)gd->ram_size);
Tom Rini24c904f2022-04-06 10:33:32 -0400368#if CONFIG_VAL(SYS_MEM_TOP_HIDE)
Simon Glass1938f4a2013-03-11 06:49:53 +0000369 /*
370 * Subtract specified amount of memory to hide so that it won't
371 * get "touched" at all by U-Boot. By fixing up gd->ram_size
372 * the Linux kernel should now get passed the now "corrected"
York Sun36cc0de2017-03-06 09:02:28 -0800373 * memory size and won't touch it either. This should work
374 * for arch/ppc and arch/powerpc. Only Linux board ports in
375 * arch/powerpc with bootwrapper support, that recalculate the
376 * memory size from the SDRAM controller setup will have to
377 * get fixed.
Simon Glass1938f4a2013-03-11 06:49:53 +0000378 */
York Sun36cc0de2017-03-06 09:02:28 -0800379 gd->ram_size -= CONFIG_SYS_MEM_TOP_HIDE;
380#endif
Simon Glass1938f4a2013-03-11 06:49:53 +0000381#ifdef CONFIG_SYS_SDRAM_BASE
Siva Durga Prasad Paladugu1473b122018-07-16 15:56:10 +0530382 gd->ram_base = CONFIG_SYS_SDRAM_BASE;
Simon Glass1938f4a2013-03-11 06:49:53 +0000383#endif
Siva Durga Prasad Paladugu1473b122018-07-16 15:56:10 +0530384 gd->ram_top = gd->ram_base + get_effective_memsize();
Simon Glass1938f4a2013-03-11 06:49:53 +0000385 gd->ram_top = board_get_usable_ram_top(gd->mon_len);
Masahiro Yamadaa0ba2792013-05-27 00:37:30 +0000386 gd->relocaddr = gd->ram_top;
Pali Rohárd92aee52022-09-09 17:32:41 +0200387 debug("Ram top: %08llX\n", (unsigned long long)gd->ram_top);
Ovidiu Panaitd63fc992022-09-13 21:31:28 +0300388
389 return arch_setup_dest_addr();
Simon Glass1938f4a2013-03-11 06:49:53 +0000390}
391
Simon Glass1938f4a2013-03-11 06:49:53 +0000392#ifdef CONFIG_PRAM
393/* reserve protected RAM */
394static int reserve_pram(void)
395{
396 ulong reg;
397
Simon Glassbfebc8c2017-08-03 12:22:13 -0600398 reg = env_get_ulong("pram", 10, CONFIG_PRAM);
Masahiro Yamadaa0ba2792013-05-27 00:37:30 +0000399 gd->relocaddr -= (reg << 10); /* size is in kB */
Simon Glass1938f4a2013-03-11 06:49:53 +0000400 debug("Reserving %ldk for protected RAM at %08lx\n", reg,
Masahiro Yamadaa0ba2792013-05-27 00:37:30 +0000401 gd->relocaddr);
Simon Glass1938f4a2013-03-11 06:49:53 +0000402 return 0;
403}
404#endif /* CONFIG_PRAM */
405
406/* Round memory pointer down to next 4 kB limit */
407static int reserve_round_4k(void)
408{
Masahiro Yamadaa0ba2792013-05-27 00:37:30 +0000409 gd->relocaddr &= ~(4096 - 1);
Simon Glass1938f4a2013-03-11 06:49:53 +0000410 return 0;
411}
412
Bo Lv96a66d02023-05-12 19:18:22 +0800413#ifdef CONFIG_AML_UASAN
414void record_section_red_zone(unsigned long addr)
415{
416 int i;
417
418 uasan_poison_object(addr,
419 MEM_SECTION_RED_ZONE_SIZE,
420 UASAN_PAGE_REDZONE);
421 for (i = 0; i < SECTION_RED_ZONE_NUM; i++) {
422 if (!gd->section_red_zones[i]) {
423 gd->section_red_zones[i] = addr;
424 return;
425 }
426 }
427 printf("[UASAN] red zone section full, ignore addr:%lx\n", addr);
428}
429
430static void uasan_global_init(void)
431{
432 ctor_fn_t *fn = (ctor_fn_t *)__init_array_start;
433
434 for (; fn < (ctor_fn_t *)__init_array_end; fn++) {
435 debug("%s, fn:%lx, func:%lx\n",
436 __func__, (unsigned long)fn, (unsigned long)*fn);
437 (*fn)();
438 }
439}
440
441static int reserve_uasan(void)
442{
443 int i;
444 unsigned long used_size, size;
445 unsigned long addr;
446
447 /*
448 * check if malloc size + hide top is larger than 256MB, reserve 10MB
449 * for uboot code size/bss/stacks
450 */
451#ifdef CONFIG_SYS_MEM_TOP_HIDE
452 BUILD_BUG_ON(CONFIG_SYS_MEM_TOP_HIDE +
453 CONFIG_SYS_MALLOC_LEN + sizeof(*gd) >=
454 (0x10000000 - 0x00A00000));
455#else
456 BUILD_BUG_ON(CONFIG_SYS_MALLOC_LEN + sizeof(*gd) >=
457 (0x10000000 - 0x00A00000));
458#endif
459
460 /* pad last red zone */
461 addr = gd->start_addr_sp - UASAN_STACK_SIZE - MEM_SECTION_RED_ZONE_SIZE;
462 if (addr < gd->ram_top - UASAN_UBOOT_SIZE) {
463 printf("[UASAN] ERROR: used memory overlap with shadow\n");
464 return -1;
465 }
466 gd->use_mem_end = addr;
467 printf("[UASAN] reserve [%08lx - %08lx] for stack\n",
468 addr, gd->start_addr_sp);
469 record_section_red_zone(addr);
470
471 used_size = gd->ram_top - gd->start_addr_sp +
472 UASAN_STACK_SIZE + MEM_SECTION_RED_ZONE_SIZE;
473 gd->use_mem_size = used_size;
474
475 /* clear all shadows */
476 size = UASAN_UBOOT_SIZE >> UASAN_SHADOW_SCALE_SHIFT;
477 gd->shadow_size = size;
478#ifdef CONFIG_SYS_MEM_TOP_HIDE
479 gd->phy_mem_low = gd->ram_top - UASAN_UBOOT_SIZE + CONFIG_SYS_MEM_TOP_HIDE;
480 gd->phy_mem_high = gd->ram_top + CONFIG_SYS_MEM_TOP_HIDE;
481#else
482 gd->phy_mem_low = gd->ram_top - UASAN_UBOOT_SIZE;
483 gd->phy_mem_high = gd->ram_top;
484#endif
485 gd->shadow_addr = gd->phy_mem_low - size;
486
487 printf("[UASAN] memory: %08lx - %08llx\n", gd->use_mem_end, gd->ram_top);
488 printf("[UASAN] shadow: %08lx - %08lx\n", gd->shadow_addr,
489 gd->shadow_addr + size);
490 /* 2, clear shadow first */
491 __memset((void *)gd->shadow_addr, 0, gd->shadow_size);
492
493 /* 3, initialize red-zones */
494 for (i = 0; i < SECTION_RED_ZONE_NUM; i++) {
495 if (gd->section_red_zones[i]) {
496 addr = mem_to_shadow((void *)gd->section_red_zones[i]);
497 size = MEM_SECTION_RED_ZONE_SIZE >>
498 UASAN_SHADOW_SCALE_SHIFT;
499 if (addr) {
500 __memset((void *)addr, UASAN_PAGE_REDZONE, size);
501 printf("[UASAN] red zone: %08lx - %08lx\n",
502 addr, addr + size);
503 }
504 }
505 }
506
507 /* 4, create shadow for globals */
508 uasan_global_init();
509
510 gd->uasan_enabled = 1;
511 printf("[UASAN] Enable UASAN\n");
512 return 0;
513}
514#endif
515
Ovidiu Panait79926e42020-03-29 20:57:41 +0300516__weak int arch_reserve_mmu(void)
517{
518 return 0;
519}
520
Simon Glass5a541942016-01-18 19:52:21 -0700521static int reserve_video(void)
522{
Simon Glassb86986c2022-10-18 07:46:31 -0600523 if (IS_ENABLED(CONFIG_VIDEO)) {
Simon Glassf9b7bd72022-10-16 15:57:41 -0600524 ulong addr;
525 int ret;
Simon Glass5a541942016-01-18 19:52:21 -0700526
Simon Glassf9b7bd72022-10-16 15:57:41 -0600527 addr = gd->relocaddr;
528 ret = video_reserve(&addr);
529 if (ret)
530 return ret;
531 debug("Reserving %luk for video at: %08lx\n",
532 ((unsigned long)gd->relocaddr - addr) >> 10, addr);
533 gd->relocaddr = addr;
534 }
Simon Glass8703ef32016-01-18 19:52:20 -0700535
536 return 0;
537}
Simon Glass8703ef32016-01-18 19:52:20 -0700538
Simon Glass71c52db2013-06-11 11:14:42 -0700539static int reserve_trace(void)
540{
541#ifdef CONFIG_TRACE
542 gd->relocaddr -= CONFIG_TRACE_BUFFER_SIZE;
543 gd->trace_buff = map_sysmem(gd->relocaddr, CONFIG_TRACE_BUFFER_SIZE);
Heinrich Schuchardt7ea33572019-06-14 21:52:22 +0200544 debug("Reserving %luk for trace data at: %08lx\n",
545 (unsigned long)CONFIG_TRACE_BUFFER_SIZE >> 10, gd->relocaddr);
Simon Glass71c52db2013-06-11 11:14:42 -0700546#endif
547
548 return 0;
549}
550
Simon Glass1938f4a2013-03-11 06:49:53 +0000551static int reserve_uboot(void)
552{
Alexey Brodkinff2b2ba2018-05-25 16:08:14 +0300553 if (!(gd->flags & GD_FLG_SKIP_RELOC)) {
554 /*
555 * reserve memory for U-Boot code, data & bss
556 * round down to next 4 kB limit
557 */
558 gd->relocaddr -= gd->mon_len;
559 gd->relocaddr &= ~(4096 - 1);
560 #if defined(CONFIG_E500) || defined(CONFIG_MIPS)
561 /* round down to next 64 kB limit so that IVPR stays aligned */
562 gd->relocaddr &= ~(65536 - 1);
563 #endif
Simon Glass1938f4a2013-03-11 06:49:53 +0000564
Alexey Brodkinff2b2ba2018-05-25 16:08:14 +0300565 debug("Reserving %ldk for U-Boot at: %08lx\n",
566 gd->mon_len >> 10, gd->relocaddr);
567 }
Masahiro Yamadaa0ba2792013-05-27 00:37:30 +0000568
569 gd->start_addr_sp = gd->relocaddr;
570
Bo Lv96a66d02023-05-12 19:18:22 +0800571#ifdef CONFIG_AML_UASAN
572 /* insert red zone */
573 printf("[UASAN] reserve [%08lx - %08lx] for uboot\n",
574 gd->start_addr_sp, gd->relocaddr + gd->mon_len);
575 gd->start_addr_sp -= MEM_SECTION_RED_ZONE_SIZE;
576 record_section_red_zone(gd->start_addr_sp);
577#endif
578
Simon Glass1938f4a2013-03-11 06:49:53 +0000579 return 0;
580}
581
Patrick Delaunay65c141e2020-03-10 10:15:05 +0100582/*
583 * reserve after start_addr_sp the requested size and make the stack pointer
584 * 16-byte aligned, this alignment is needed for cast on the reserved memory
585 * ref = x86_64 ABI: https://reviews.llvm.org/D30049: 16 bytes
586 * = ARMv8 Instruction Set Overview: quad word, 16 bytes
587 */
588static unsigned long reserve_stack_aligned(size_t size)
589{
590 return ALIGN_DOWN(gd->start_addr_sp - size, 16);
591}
592
Vikas Manocha5f7adb52019-08-16 09:57:44 -0700593#ifdef CONFIG_SYS_NONCACHED_MEMORY
594static int reserve_noncached(void)
595{
Stephen Warren5e0404f2019-08-27 11:54:31 -0600596 /*
597 * The value of gd->start_addr_sp must match the value of malloc_start
Tom Rini02f5a012022-10-28 20:27:09 -0400598 * calculated in board_r.c:initr_malloc(), which is passed to
599 * dlmalloc.c:mem_malloc_init() and then used by
Stephen Warren5e0404f2019-08-27 11:54:31 -0600600 * cache.c:noncached_init()
601 *
602 * These calculations must match the code in cache.c:noncached_init()
603 */
604 gd->start_addr_sp = ALIGN(gd->start_addr_sp, MMU_SECTION_SIZE) -
605 MMU_SECTION_SIZE;
606 gd->start_addr_sp -= ALIGN(CONFIG_SYS_NONCACHED_MEMORY,
607 MMU_SECTION_SIZE);
Vikas Manocha5f7adb52019-08-16 09:57:44 -0700608 debug("Reserving %dM for noncached_alloc() at: %08lx\n",
609 CONFIG_SYS_NONCACHED_MEMORY >> 20, gd->start_addr_sp);
610
611 return 0;
612}
613#endif
614
Simon Glass1938f4a2013-03-11 06:49:53 +0000615/* reserve memory for malloc() area */
616static int reserve_malloc(void)
617{
Patrick Delaunay65c141e2020-03-10 10:15:05 +0100618 gd->start_addr_sp = reserve_stack_aligned(TOTAL_MALLOC_LEN);
Simon Glass1938f4a2013-03-11 06:49:53 +0000619 debug("Reserving %dk for malloc() at: %08lx\n",
Mario Six16ef1472018-01-15 11:10:02 +0100620 TOTAL_MALLOC_LEN >> 10, gd->start_addr_sp);
Vikas Manocha5f7adb52019-08-16 09:57:44 -0700621#ifdef CONFIG_SYS_NONCACHED_MEMORY
622 reserve_noncached();
623#endif
624
Bo Lv96a66d02023-05-12 19:18:22 +0800625#ifdef CONFIG_AML_UASAN
626 printf("[UASAN] reserve [%08lx - %08lx] for malloc\n",
627 gd->start_addr_sp, gd->start_addr_sp + TOTAL_MALLOC_LEN);
628 /* insert red zone */
629 gd->start_addr_sp -= MEM_SECTION_RED_ZONE_SIZE;
630 record_section_red_zone(gd->start_addr_sp);
631#endif
632
Simon Glass1938f4a2013-03-11 06:49:53 +0000633 return 0;
634}
635
636/* (permanently) allocate a Board Info struct */
637static int reserve_board(void)
638{
Sonic Zhangd54d7eb2014-07-17 19:01:34 +0800639 if (!gd->bd) {
Masahiro Yamadab75d8dc2020-06-26 15:13:33 +0900640 gd->start_addr_sp = reserve_stack_aligned(sizeof(struct bd_info));
641 gd->bd = (struct bd_info *)map_sysmem(gd->start_addr_sp,
642 sizeof(struct bd_info));
643 memset(gd->bd, '\0', sizeof(struct bd_info));
Sonic Zhangd54d7eb2014-07-17 19:01:34 +0800644 debug("Reserving %zu Bytes for Board Info at: %08lx\n",
Masahiro Yamadab75d8dc2020-06-26 15:13:33 +0900645 sizeof(struct bd_info), gd->start_addr_sp);
Bo Lv96a66d02023-05-12 19:18:22 +0800646 #ifdef CONFIG_AML_UASAN
647 printf("[UASAN] reserve [%08lx - %08lx] for board\n",
648 gd->start_addr_sp, gd->start_addr_sp + sizeof(bd_t));
649 /* insert red zone */
650 gd->start_addr_sp -= MEM_SECTION_RED_ZONE_SIZE;
651 record_section_red_zone(gd->start_addr_sp);
652 #endif
Sonic Zhangd54d7eb2014-07-17 19:01:34 +0800653 }
Simon Glass1938f4a2013-03-11 06:49:53 +0000654 return 0;
655}
656
Simon Glass1938f4a2013-03-11 06:49:53 +0000657static int reserve_global_data(void)
658{
Patrick Delaunay65c141e2020-03-10 10:15:05 +0100659 gd->start_addr_sp = reserve_stack_aligned(sizeof(gd_t));
Masahiro Yamadaa0ba2792013-05-27 00:37:30 +0000660 gd->new_gd = (gd_t *)map_sysmem(gd->start_addr_sp, sizeof(gd_t));
Simon Glass1938f4a2013-03-11 06:49:53 +0000661 debug("Reserving %zu Bytes for Global Data at: %08lx\n",
Mario Six16ef1472018-01-15 11:10:02 +0100662 sizeof(gd_t), gd->start_addr_sp);
Bo Lv96a66d02023-05-12 19:18:22 +0800663#ifdef CONFIG_AML_UASAN
664 printf("[UASAN] reserve [%08lx - %08lx] for global_data\n",
665 gd->start_addr_sp, gd->start_addr_sp + sizeof(gd_t));
666 /* insert red zone */
667 gd->start_addr_sp -= MEM_SECTION_RED_ZONE_SIZE;
668 record_section_red_zone(gd->start_addr_sp);
669#endif
Simon Glass1938f4a2013-03-11 06:49:53 +0000670 return 0;
671}
672
673static int reserve_fdt(void)
674{
Ovidiu Panait19b18da2020-11-28 10:43:07 +0200675 if (!IS_ENABLED(CONFIG_OF_EMBED)) {
676 /*
677 * If the device tree is sitting immediately above our image
678 * then we must relocate it. If it is embedded in the data
679 * section, then it will be relocated with other data.
680 */
681 if (gd->fdt_blob) {
682 gd->fdt_size = ALIGN(fdt_totalsize(gd->fdt_blob), 32);
Simon Glass1938f4a2013-03-11 06:49:53 +0000683
Ovidiu Panait19b18da2020-11-28 10:43:07 +0200684 gd->start_addr_sp = reserve_stack_aligned(gd->fdt_size);
685 gd->new_fdt = map_sysmem(gd->start_addr_sp, gd->fdt_size);
686 debug("Reserving %lu Bytes for FDT at: %08lx\n",
687 gd->fdt_size, gd->start_addr_sp);
688 }
Simon Glass1938f4a2013-03-11 06:49:53 +0000689 }
690
691 return 0;
692}
693
Simon Glass25e7dc62017-05-22 05:05:30 -0600694static int reserve_bootstage(void)
695{
696#ifdef CONFIG_BOOTSTAGE
697 int size = bootstage_get_size();
698
Patrick Delaunay65c141e2020-03-10 10:15:05 +0100699 gd->start_addr_sp = reserve_stack_aligned(size);
Simon Glass25e7dc62017-05-22 05:05:30 -0600700 gd->new_bootstage = map_sysmem(gd->start_addr_sp, size);
701 debug("Reserving %#x Bytes for bootstage at: %08lx\n", size,
702 gd->start_addr_sp);
703#endif
704
705 return 0;
706}
707
Patrick Delaunayd6f87712018-03-13 13:57:00 +0100708__weak int arch_reserve_stacks(void)
Andreas Bießmann68145d42015-02-06 23:06:45 +0100709{
710 return 0;
711}
712
Simon Glass1938f4a2013-03-11 06:49:53 +0000713static int reserve_stacks(void)
714{
Andreas Bießmann68145d42015-02-06 23:06:45 +0100715 /* make stack pointer 16-byte aligned */
Patrick Delaunay65c141e2020-03-10 10:15:05 +0100716 gd->start_addr_sp = reserve_stack_aligned(16);
xia.jin958d2932024-06-07 03:12:53 +0000717#ifdef CONFIG_ARMV8_MULTIENTRY
718 gd->start_addr_sp -= ((NR_CPUS - 1) * secondary_sp_size);
719#endif
Simon Glass1938f4a2013-03-11 06:49:53 +0000720 /*
Simon Glass4c509342015-04-28 20:25:03 -0600721 * let the architecture-specific code tailor gd->start_addr_sp and
Andreas Bießmann68145d42015-02-06 23:06:45 +0100722 * gd->irq_sp
Simon Glass1938f4a2013-03-11 06:49:53 +0000723 */
Andreas Bießmann68145d42015-02-06 23:06:45 +0100724 return arch_reserve_stacks();
Simon Glass1938f4a2013-03-11 06:49:53 +0000725}
726
Simon Glassf0293d32018-11-15 18:43:52 -0700727static int reserve_bloblist(void)
728{
729#ifdef CONFIG_BLOBLIST
Simon Glass4a08fae2020-09-27 18:46:18 -0600730 /* Align to a 4KB boundary for easier reading of addresses */
Simon Glass9fe06462021-01-13 20:29:43 -0700731 gd->start_addr_sp = ALIGN_DOWN(gd->start_addr_sp -
732 CONFIG_BLOBLIST_SIZE_RELOC, 0x1000);
733 gd->new_bloblist = map_sysmem(gd->start_addr_sp,
734 CONFIG_BLOBLIST_SIZE_RELOC);
Simon Glassf0293d32018-11-15 18:43:52 -0700735#endif
736
737 return 0;
738}
739
Simon Glass1938f4a2013-03-11 06:49:53 +0000740static int display_new_sp(void)
741{
Masahiro Yamadaa0ba2792013-05-27 00:37:30 +0000742 debug("New Stack Pointer is: %08lx\n", gd->start_addr_sp);
Simon Glass1938f4a2013-03-11 06:49:53 +0000743
744 return 0;
745}
746
Ovidiu Panait81e7cb12020-07-24 14:12:15 +0300747__weak int arch_setup_bdinfo(void)
Ovidiu Panaitba743102020-07-24 14:12:14 +0300748{
749 return 0;
750}
751
Ovidiu Panait81e7cb12020-07-24 14:12:15 +0300752int setup_bdinfo(void)
753{
Ovidiu Panaita4aa1882020-07-24 14:12:16 +0300754 struct bd_info *bd = gd->bd;
755
Ovidiu Panait49122242020-07-24 14:12:17 +0300756 if (IS_ENABLED(CONFIG_SYS_HAS_SRAM)) {
757 bd->bi_sramstart = CONFIG_SYS_SRAM_BASE; /* start of SRAM */
758 bd->bi_sramsize = CONFIG_SYS_SRAM_SIZE; /* size of SRAM */
759 }
760
Ovidiu Panait81e7cb12020-07-24 14:12:15 +0300761 return arch_setup_bdinfo();
762}
763
Simon Glass1938f4a2013-03-11 06:49:53 +0000764#ifdef CONFIG_POST
765static int init_post(void)
766{
767 post_bootmode_init();
768 post_run(NULL, POST_ROM | post_bootmode_get(0));
769
770 return 0;
771}
772#endif
773
Simon Glass1938f4a2013-03-11 06:49:53 +0000774static int reloc_fdt(void)
775{
Ovidiu Panait19b18da2020-11-28 10:43:07 +0200776 if (!IS_ENABLED(CONFIG_OF_EMBED)) {
777 if (gd->flags & GD_FLG_SKIP_RELOC)
778 return 0;
779 if (gd->new_fdt) {
780 memcpy(gd->new_fdt, gd->fdt_blob,
781 fdt_totalsize(gd->fdt_blob));
782 gd->fdt_blob = gd->new_fdt;
783 }
Simon Glass1938f4a2013-03-11 06:49:53 +0000784 }
785
786 return 0;
787}
788
Simon Glass25e7dc62017-05-22 05:05:30 -0600789static int reloc_bootstage(void)
790{
791#ifdef CONFIG_BOOTSTAGE
792 if (gd->flags & GD_FLG_SKIP_RELOC)
793 return 0;
794 if (gd->new_bootstage) {
795 int size = bootstage_get_size();
796
797 debug("Copying bootstage from %p to %p, size %x\n",
798 gd->bootstage, gd->new_bootstage, size);
799 memcpy(gd->new_bootstage, gd->bootstage, size);
800 gd->bootstage = gd->new_bootstage;
Simon Glassac9cd482019-10-21 17:26:50 -0600801 bootstage_relocate();
Simon Glass25e7dc62017-05-22 05:05:30 -0600802 }
803#endif
804
805 return 0;
806}
807
Simon Glassf0293d32018-11-15 18:43:52 -0700808static int reloc_bloblist(void)
809{
810#ifdef CONFIG_BLOBLIST
Simon Glassd5b6e912021-11-03 21:09:20 -0600811 /*
812 * Relocate only if we are supposed to send it
813 */
814 if ((gd->flags & GD_FLG_SKIP_RELOC) &&
815 CONFIG_BLOBLIST_SIZE == CONFIG_BLOBLIST_SIZE_RELOC) {
816 debug("Not relocating bloblist\n");
Simon Glassf0293d32018-11-15 18:43:52 -0700817 return 0;
Simon Glassd5b6e912021-11-03 21:09:20 -0600818 }
Simon Glassf0293d32018-11-15 18:43:52 -0700819 if (gd->new_bloblist) {
820 int size = CONFIG_BLOBLIST_SIZE;
821
822 debug("Copying bloblist from %p to %p, size %x\n",
823 gd->bloblist, gd->new_bloblist, size);
Simon Glass9fe06462021-01-13 20:29:43 -0700824 bloblist_reloc(gd->new_bloblist, CONFIG_BLOBLIST_SIZE_RELOC,
825 gd->bloblist, size);
Simon Glassf0293d32018-11-15 18:43:52 -0700826 gd->bloblist = gd->new_bloblist;
827 }
828#endif
829
830 return 0;
831}
832
Simon Glass1938f4a2013-03-11 06:49:53 +0000833static int setup_reloc(void)
834{
Marek Vasut47d7d032021-11-13 18:34:04 +0100835 if (!(gd->flags & GD_FLG_SKIP_RELOC)) {
Simon Glass98463902022-10-20 18:22:39 -0600836#ifdef CONFIG_TEXT_BASE
Lothar Waßmann53207bf2017-06-08 10:18:25 +0200837#ifdef ARM
Marek Vasut47d7d032021-11-13 18:34:04 +0100838 gd->reloc_off = gd->relocaddr - (unsigned long)__image_copy_start;
Michal Simekd58c0072022-06-24 14:15:01 +0200839#elif defined(CONFIG_MICROBLAZE)
840 gd->reloc_off = gd->relocaddr - (u32)_start;
Lothar Waßmann53207bf2017-06-08 10:18:25 +0200841#elif defined(CONFIG_M68K)
Marek Vasut47d7d032021-11-13 18:34:04 +0100842 /*
843 * On all ColdFire arch cpu, monitor code starts always
844 * just after the default vector table location, so at 0x400
845 */
Simon Glass98463902022-10-20 18:22:39 -0600846 gd->reloc_off = gd->relocaddr - (CONFIG_TEXT_BASE + 0x400);
Simon Glass001d1882019-04-08 13:20:41 -0600847#elif !defined(CONFIG_SANDBOX)
Simon Glass98463902022-10-20 18:22:39 -0600848 gd->reloc_off = gd->relocaddr - CONFIG_TEXT_BASE;
angelo@sysam.ite310b932015-02-12 01:40:17 +0100849#endif
Sonic Zhangd54d7eb2014-07-17 19:01:34 +0800850#endif
Marek Vasut47d7d032021-11-13 18:34:04 +0100851 }
852
Simon Glass1938f4a2013-03-11 06:49:53 +0000853 memcpy(gd->new_gd, (char *)gd, sizeof(gd_t));
854
Marek Vasut47d7d032021-11-13 18:34:04 +0100855 if (gd->flags & GD_FLG_SKIP_RELOC) {
856 debug("Skipping relocation due to flag\n");
857 } else {
858 debug("Relocation Offset is: %08lx\n", gd->reloc_off);
859 debug("Relocating to %08lx, new gd at %08lx, sp at %08lx\n",
860 gd->relocaddr, (ulong)map_to_sysmem(gd->new_gd),
861 gd->start_addr_sp);
862 }
Simon Glass1938f4a2013-03-11 06:49:53 +0000863
864 return 0;
865}
866
mario.six@gdsys.cc2a792752017-02-22 16:07:22 +0100867#ifdef CONFIG_OF_BOARD_FIXUP
868static int fix_fdt(void)
869{
870 return board_fix_fdt((void *)gd->fdt_blob);
871}
872#endif
873
Simon Glass1938f4a2013-03-11 06:49:53 +0000874/* ARM calls relocate_code from its crt0.S */
Simon Glass530f27e2017-01-16 07:03:49 -0700875#if !defined(CONFIG_ARM) && !defined(CONFIG_SANDBOX) && \
876 !CONFIG_IS_ENABLED(X86_64)
Simon Glass1938f4a2013-03-11 06:49:53 +0000877
878static int jump_to_copy(void)
879{
Simon Glassf05ad9b2015-08-04 12:33:39 -0600880 if (gd->flags & GD_FLG_SKIP_RELOC)
881 return 0;
Simon Glass48a33802013-03-05 14:39:52 +0000882 /*
883 * x86 is special, but in a nice way. It uses a trampoline which
884 * enables the dcache if possible.
885 *
886 * For now, other archs use relocate_code(), which is implemented
887 * similarly for all archs. When we do generic relocation, hopefully
888 * we can make all archs enable the dcache prior to relocation.
889 */
Alexey Brodkin3fb80162015-02-24 19:40:36 +0300890#if defined(CONFIG_X86) || defined(CONFIG_ARC)
Simon Glass48a33802013-03-05 14:39:52 +0000891 /*
892 * SDRAM and console are now initialised. The final stack can now
893 * be setup in SDRAM. Code execution will continue in Flash, but
894 * with the stack in SDRAM and Global Data in temporary memory
895 * (CPU cache)
896 */
Simon Glassf0c7d9c2015-08-10 20:44:32 -0600897 arch_setup_gd(gd->new_gd);
Simon Glass48a33802013-03-05 14:39:52 +0000898 board_init_f_r_trampoline(gd->start_addr_sp);
899#else
Masahiro Yamadaa0ba2792013-05-27 00:37:30 +0000900 relocate_code(gd->start_addr_sp, gd->new_gd, gd->relocaddr);
Simon Glass48a33802013-03-05 14:39:52 +0000901#endif
Simon Glass1938f4a2013-03-11 06:49:53 +0000902
903 return 0;
904}
905#endif
906
907/* Record the board_init_f() bootstage (after arch_cpu_init()) */
Simon Glassb383d6c2017-05-22 05:05:25 -0600908static int initf_bootstage(void)
Simon Glass1938f4a2013-03-11 06:49:53 +0000909{
Simon Glassbaa7d342017-06-07 10:28:46 -0600910 bool from_spl = IS_ENABLED(CONFIG_SPL_BOOTSTAGE) &&
911 IS_ENABLED(CONFIG_BOOTSTAGE_STASH);
Simon Glassb383d6c2017-05-22 05:05:25 -0600912 int ret;
913
Simon Glass824bb1b2017-05-22 05:05:35 -0600914 ret = bootstage_init(!from_spl);
Simon Glassb383d6c2017-05-22 05:05:25 -0600915 if (ret)
916 return ret;
Simon Glass824bb1b2017-05-22 05:05:35 -0600917 if (from_spl) {
918 const void *stash = map_sysmem(CONFIG_BOOTSTAGE_STASH_ADDR,
919 CONFIG_BOOTSTAGE_STASH_SIZE);
920
921 ret = bootstage_unstash(stash, CONFIG_BOOTSTAGE_STASH_SIZE);
922 if (ret && ret != -ENOENT) {
923 debug("Failed to unstash bootstage: err=%d\n", ret);
924 return ret;
925 }
926 }
Simon Glassb383d6c2017-05-22 05:05:25 -0600927
Simon Glass1938f4a2013-03-11 06:49:53 +0000928 bootstage_mark_name(BOOTSTAGE_ID_START_UBOOT_F, "board_init_f");
929
930 return 0;
931}
932
Simon Glassab7cd622014-07-23 06:55:04 -0600933static int initf_dm(void)
934{
Andy Yanf1896c42017-07-24 17:43:34 +0800935#if defined(CONFIG_DM) && CONFIG_VAL(SYS_MALLOC_F_LEN)
Simon Glassab7cd622014-07-23 06:55:04 -0600936 int ret;
937
Simon Glassb67eefd2020-05-10 11:39:59 -0600938 bootstage_start(BOOTSTAGE_ID_ACCUM_DM_F, "dm_f");
Simon Glassab7cd622014-07-23 06:55:04 -0600939 ret = dm_init_and_scan(true);
Simon Glassb67eefd2020-05-10 11:39:59 -0600940 bootstage_accum(BOOTSTAGE_ID_ACCUM_DM_F);
Simon Glassab7cd622014-07-23 06:55:04 -0600941 if (ret)
942 return ret;
Ovidiu Panait4b9a1212020-11-28 10:43:05 +0200943
944 if (IS_ENABLED(CONFIG_TIMER_EARLY)) {
945 ret = dm_timer_init();
946 if (ret)
947 return ret;
948 }
Simon Glass1057e6c2016-02-24 09:14:50 -0700949#endif
Simon Glassab7cd622014-07-23 06:55:04 -0600950
951 return 0;
952}
953
Simon Glass146251f2015-01-19 22:16:12 -0700954/* Architecture-specific memory reservation */
955__weak int reserve_arch(void)
956{
957 return 0;
958}
959
Ovidiu Panait016e4ae2020-01-22 22:28:25 +0200960__weak int checkcpu(void)
961{
962 return 0;
963}
964
Ovidiu Panaitfbf9c152020-02-05 08:54:42 +0200965__weak int clear_bss(void)
966{
967 return 0;
968}
969
Simon Glass42fdceb2022-03-04 08:43:04 -0700970static int misc_init_f(void)
971{
972 return event_notify_null(EVT_MISC_INIT_F);
973}
974
Simon Glass4acff452017-01-16 07:03:50 -0700975static const init_fnc_t init_sequence_f[] = {
Simon Glass1938f4a2013-03-11 06:49:53 +0000976 setup_mon_len,
Simon Glassb45122f2015-02-27 22:06:34 -0700977#ifdef CONFIG_OF_CONTROL
Simon Glass08793612015-02-27 22:06:35 -0700978 fdtdec_setup,
Simon Glassb45122f2015-02-27 22:06:34 -0700979#endif
Heinrich Schuchardt7ef8e9b2019-06-02 00:53:24 +0200980#ifdef CONFIG_TRACE_EARLY
Simon Glass71c52db2013-06-11 11:14:42 -0700981 trace_early_init,
Kevin Hilmand2107182014-12-09 15:03:58 -0800982#endif
Simon Glass768e0f52014-11-10 18:00:18 -0700983 initf_malloc,
Simon Glassaf1bc0c2017-12-04 13:48:28 -0700984 log_init,
Simon Glass5ac44a52017-05-22 05:05:31 -0600985 initf_bootstage, /* uses its own timer, so does not need DM */
Simon Glass5a421902022-03-04 08:43:02 -0700986 event_init,
Simon Glassf0293d32018-11-15 18:43:52 -0700987#ifdef CONFIG_BLOBLIST
988 bloblist_init,
989#endif
Simon Glassb0edea32018-11-15 18:44:09 -0700990 setup_spl_handoff,
Ovidiu Panait8e8d45e2020-11-28 10:43:04 +0200991#if defined(CONFIG_CONSOLE_RECORD_INIT_F)
992 console_record_init,
993#endif
Simon Glass671549e2017-03-28 10:27:18 -0600994#if defined(CONFIG_HAVE_FSP)
995 arch_fsp_init,
Bin Menga52a0682015-08-20 06:40:18 -0700996#endif
Simon Glass1938f4a2013-03-11 06:49:53 +0000997 arch_cpu_init, /* basic arch cpu dependent setup */
Paul Burton8ebf5062016-09-21 11:18:46 +0100998 mach_cpu_init, /* SoC/machine dependent CPU setup */
Simon Glass3ea09532014-09-03 17:36:59 -0600999 initf_dm,
Simon Glass1938f4a2013-03-11 06:49:53 +00001000#if defined(CONFIG_BOARD_EARLY_INIT_F)
1001 board_early_init_f,
1002#endif
Simon Glass727e94a2017-03-28 10:27:26 -06001003#if defined(CONFIG_PPC) || defined(CONFIG_SYS_FSL_CLK) || defined(CONFIG_M68K)
Simon Glassc252c062017-03-28 10:27:19 -06001004 /* get CPU and bus clocks according to the environment variable */
Simon Glasse4fef6c2013-03-11 14:30:42 +00001005 get_clocks, /* get CPU and bus clocks (etc.) */
Simon Glass1793e782017-03-28 10:27:23 -06001006#endif
Angelo Dureghello0ce45282017-05-10 23:58:06 +02001007#if !defined(CONFIG_M68K)
Simon Glass1938f4a2013-03-11 06:49:53 +00001008 timer_init, /* initialize timer */
Angelo Dureghello0ce45282017-05-10 23:58:06 +02001009#endif
Simon Glasse4fef6c2013-03-11 14:30:42 +00001010#if defined(CONFIG_BOARD_POSTCLK_INIT)
1011 board_postclk_init,
1012#endif
Simon Glass1938f4a2013-03-11 06:49:53 +00001013 env_init, /* initialize environment */
1014 init_baud_rate, /* initialze baudrate settings */
1015 serial_init, /* serial communications setup */
1016 console_init_f, /* stage 1 init of console */
1017 display_options, /* say that we are here */
1018 display_text_info, /* show debugging info if required */
Simon Glasse4fef6c2013-03-11 14:30:42 +00001019 checkcpu,
Mario Six23471ae2018-08-06 10:23:34 +02001020#if defined(CONFIG_SYSRESET)
1021 print_resetinfo,
1022#endif
Simon Glasscc664002017-01-23 13:31:25 -07001023#if defined(CONFIG_DISPLAY_CPUINFO)
Simon Glass1938f4a2013-03-11 06:49:53 +00001024 print_cpuinfo, /* display cpu info (and speed) */
Simon Glasscc664002017-01-23 13:31:25 -07001025#endif
Cooper Jr., Franklinaf9e6ad2017-06-16 17:25:12 -05001026#if defined(CONFIG_DTB_RESELECT)
1027 embedded_dtb_select,
1028#endif
Simon Glass1938f4a2013-03-11 06:49:53 +00001029#if defined(CONFIG_DISPLAY_BOARDINFO)
Masahiro Yamada0365ffc2015-01-14 17:07:05 +09001030 show_board_info,
Simon Glass1938f4a2013-03-11 06:49:53 +00001031#endif
Simon Glasse4fef6c2013-03-11 14:30:42 +00001032 INIT_FUNC_WATCHDOG_INIT
Simon Glasse4fef6c2013-03-11 14:30:42 +00001033 misc_init_f,
Simon Glasse4fef6c2013-03-11 14:30:42 +00001034 INIT_FUNC_WATCHDOG_RESET
Tom Rini55dabcc2021-08-18 23:12:24 -04001035#if CONFIG_IS_ENABLED(SYS_I2C_LEGACY)
Simon Glasse4fef6c2013-03-11 14:30:42 +00001036 init_func_i2c,
1037#endif
Rajesh Bhagat1fab98f2018-01-17 16:13:08 +05301038#if defined(CONFIG_VID) && !defined(CONFIG_SPL)
1039 init_func_vid,
1040#endif
Simon Glass1938f4a2013-03-11 06:49:53 +00001041 announce_dram_init,
Simon Glass1938f4a2013-03-11 06:49:53 +00001042 dram_init, /* configure available RAM banks */
Simon Glasse4fef6c2013-03-11 14:30:42 +00001043#ifdef CONFIG_POST
1044 post_init_f,
1045#endif
1046 INIT_FUNC_WATCHDOG_RESET
1047#if defined(CONFIG_SYS_DRAM_TEST)
1048 testdram,
1049#endif /* CONFIG_SYS_DRAM_TEST */
1050 INIT_FUNC_WATCHDOG_RESET
1051
Simon Glass1938f4a2013-03-11 06:49:53 +00001052#ifdef CONFIG_POST
1053 init_post,
1054#endif
Simon Glasse4fef6c2013-03-11 14:30:42 +00001055 INIT_FUNC_WATCHDOG_RESET
Simon Glass1938f4a2013-03-11 06:49:53 +00001056 /*
1057 * Now that we have DRAM mapped and working, we can
1058 * relocate the code and continue running from DRAM.
1059 *
1060 * Reserve memory at end of RAM for (top down in that order):
1061 * - area that won't get touched by U-Boot and Linux (optional)
1062 * - kernel log buffer
1063 * - protected RAM
1064 * - LCD framebuffer
1065 * - monitor code
1066 * - board info struct
1067 */
1068 setup_dest_addr,
Pragnesh Patel313981c2020-08-13 10:12:26 +05301069#ifdef CONFIG_OF_BOARD_FIXUP
1070 fix_fdt,
1071#endif
Simon Glass1938f4a2013-03-11 06:49:53 +00001072#ifdef CONFIG_PRAM
1073 reserve_pram,
1074#endif
1075 reserve_round_4k,
Ovidiu Panait79926e42020-03-29 20:57:41 +03001076 arch_reserve_mmu,
Simon Glass5a541942016-01-18 19:52:21 -07001077 reserve_video,
Simon Glass8703ef32016-01-18 19:52:20 -07001078 reserve_trace,
Simon Glass1938f4a2013-03-11 06:49:53 +00001079 reserve_uboot,
1080 reserve_malloc,
1081 reserve_board,
Simon Glass1938f4a2013-03-11 06:49:53 +00001082 reserve_global_data,
1083 reserve_fdt,
Simon Glass25e7dc62017-05-22 05:05:30 -06001084 reserve_bootstage,
Simon Glassf0293d32018-11-15 18:43:52 -07001085 reserve_bloblist,
Simon Glass146251f2015-01-19 22:16:12 -07001086 reserve_arch,
Simon Glass1938f4a2013-03-11 06:49:53 +00001087 reserve_stacks,
Bo Lv96a66d02023-05-12 19:18:22 +08001088#ifdef CONFIG_AML_UASAN
1089 reserve_uasan,
1090#endif
Simon Glass76b00ac2017-03-31 08:40:32 -06001091 dram_init_banksize,
Simon Glass1938f4a2013-03-11 06:49:53 +00001092 show_dram_config,
Simon Glasse4fef6c2013-03-11 14:30:42 +00001093 INIT_FUNC_WATCHDOG_RESET
Ovidiu Panait15328852020-07-24 14:12:20 +03001094 setup_bdinfo,
Simon Glass1938f4a2013-03-11 06:49:53 +00001095 display_new_sp,
Simon Glasse4fef6c2013-03-11 14:30:42 +00001096 INIT_FUNC_WATCHDOG_RESET
Simon Glass1938f4a2013-03-11 06:49:53 +00001097 reloc_fdt,
Simon Glass25e7dc62017-05-22 05:05:30 -06001098 reloc_bootstage,
Simon Glassf0293d32018-11-15 18:43:52 -07001099 reloc_bloblist,
Simon Glass1938f4a2013-03-11 06:49:53 +00001100 setup_reloc,
Alexey Brodkin3fb80162015-02-24 19:40:36 +03001101#if defined(CONFIG_X86) || defined(CONFIG_ARC)
Simon Glass313aef32015-01-01 16:18:09 -07001102 copy_uboot_to_ram,
Simon Glass313aef32015-01-01 16:18:09 -07001103 do_elf_reloc_fixups,
1104#endif
Chris Zankelde5e5ce2016-08-10 18:36:43 +03001105 clear_bss,
Rasmus Villemoes50128ae2022-10-28 13:50:54 +02001106 /*
1107 * Deregister all cyclic functions before relocation, so that
1108 * gd->cyclic_list does not contain any references to pre-relocation
1109 * devices. Drivers will register their cyclic functions anew when the
1110 * devices are probed again.
1111 *
1112 * This should happen as late as possible so that the window where a
1113 * watchdog device is not serviced is as small as possible.
1114 */
1115 cyclic_unregister_all,
Simon Glass530f27e2017-01-16 07:03:49 -07001116#if !defined(CONFIG_ARM) && !defined(CONFIG_SANDBOX) && \
1117 !CONFIG_IS_ENABLED(X86_64)
Simon Glass1938f4a2013-03-11 06:49:53 +00001118 jump_to_copy,
1119#endif
1120 NULL,
1121};
1122
1123void board_init_f(ulong boot_flags)
1124{
Simon Glass1938f4a2013-03-11 06:49:53 +00001125 gd->flags = boot_flags;
Alexey Brodkin9aed5a22013-11-27 22:32:40 +04001126 gd->have_console = 0;
Simon Glass1938f4a2013-03-11 06:49:53 +00001127
1128 if (initcall_run_list(init_sequence_f))
1129 hang();
1130
Ben Stoltz9b217492015-07-31 09:31:37 -06001131#if !defined(CONFIG_ARM) && !defined(CONFIG_SANDBOX) && \
Alexey Brodkin264d2982015-12-16 19:24:10 +03001132 !defined(CONFIG_EFI_APP) && !CONFIG_IS_ENABLED(X86_64) && \
1133 !defined(CONFIG_ARC)
Simon Glass1938f4a2013-03-11 06:49:53 +00001134 /* NOTREACHED - jump_to_copy() does not return */
1135 hang();
1136#endif
1137}
1138
Alexey Brodkin3fb80162015-02-24 19:40:36 +03001139#if defined(CONFIG_X86) || defined(CONFIG_ARC)
Simon Glass48a33802013-03-05 14:39:52 +00001140/*
1141 * For now this code is only used on x86.
1142 *
1143 * init_sequence_f_r is the list of init functions which are run when
1144 * U-Boot is executing from Flash with a semi-limited 'C' environment.
1145 * The following limitations must be considered when implementing an
1146 * '_f_r' function:
1147 * - 'static' variables are read-only
1148 * - Global Data (gd->xxx) is read/write
1149 *
1150 * The '_f_r' sequence must, as a minimum, copy U-Boot to RAM (if
1151 * supported). It _should_, if possible, copy global data to RAM and
1152 * initialise the CPU caches (to speed up the relocation process)
1153 *
1154 * NOTE: At present only x86 uses this route, but it is intended that
1155 * all archs will move to this when generic relocation is implemented.
1156 */
Simon Glass4acff452017-01-16 07:03:50 -07001157static const init_fnc_t init_sequence_f_r[] = {
Simon Glass530f27e2017-01-16 07:03:49 -07001158#if !CONFIG_IS_ENABLED(X86_64)
Simon Glass48a33802013-03-05 14:39:52 +00001159 init_cache_f_r,
Simon Glass530f27e2017-01-16 07:03:49 -07001160#endif
Simon Glass48a33802013-03-05 14:39:52 +00001161
1162 NULL,
1163};
1164
1165void board_init_f_r(void)
1166{
1167 if (initcall_run_list(init_sequence_f_r))
1168 hang();
1169
1170 /*
Simon Glasse4d6ab02016-03-11 22:06:51 -07001171 * The pre-relocation drivers may be using memory that has now gone
1172 * away. Mark serial as unavailable - this will fall back to the debug
1173 * UART if available.
Simon Glassaf1bc0c2017-12-04 13:48:28 -07001174 *
1175 * Do the same with log drivers since the memory may not be available.
Simon Glasse4d6ab02016-03-11 22:06:51 -07001176 */
Simon Glassaf1bc0c2017-12-04 13:48:28 -07001177 gd->flags &= ~(GD_FLG_SERIAL_READY | GD_FLG_LOG_READY);
Simon Glass5ee94b42017-09-05 19:49:45 -06001178#ifdef CONFIG_TIMER
1179 gd->timer = NULL;
1180#endif
Simon Glasse4d6ab02016-03-11 22:06:51 -07001181
1182 /*
Simon Glass48a33802013-03-05 14:39:52 +00001183 * U-Boot has been copied into SDRAM, the BSS has been cleared etc.
1184 * Transfer execution from Flash to RAM by calculating the address
1185 * of the in-RAM copy of board_init_r() and calling it
1186 */
Alexey Brodkin7bf9f202015-02-25 17:59:02 +03001187 (board_init_r + gd->reloc_off)((gd_t *)gd, gd->relocaddr);
Simon Glass48a33802013-03-05 14:39:52 +00001188
1189 /* NOTREACHED - board_init_r() does not return */
1190 hang();
1191}
Alexey Brodkin5bcd19a2015-03-24 11:12:47 +03001192#endif /* CONFIG_X86 */