blob: 8f685358288e78494159717748d78b57e008520c [file] [log] [blame]
Bo Lv72d0e902023-01-02 14:27:34 +00001/* SPDX-License-Identifier: (GPL-2.0+ OR MIT) */
2/*
3 * Copyright (c) 2019 Amlogic, Inc. All rights reserved.
4 */
5
6#ifndef CANVAS_H
7#define CANVAS_H
8
9#define CANVAS_ADDR_LMASK 0x1fffffff
10#define CANVAS_WIDTH_LMASK 0x7
11#define CANVAS_WIDTH_LWID 3
12#define CANVAS_WIDTH_LBIT 29
13
14#define CANVAS_WIDTH_HMASK 0x1ff
15#define CANVAS_WIDTH_HBIT 0
16#define CANVAS_HEIGHT_MASK 0x1fff
17#define CANVAS_HEIGHT_BIT 9
18#define CANVAS_YWRAP (1<<23)
19#define CANVAS_XWRAP (1<<22)
20#define CANVAS_ADDR_NOWRAP 0x00
21#define CANVAS_ADDR_WRAPX 0x01
22#define CANVAS_ADDR_WRAPY 0x02
23#define CANVAS_BLKMODE_MASK 3
24#define CANVAS_BLKMODE_BIT 24
25#define CANVAS_BLKMODE_LINEAR 0x00
26#define CANVAS_BLKMODE_32X32 0x01
27#define CANVAS_BLKMODE_64X32 0x02
28
29#define CANVAS_LUT_INDEX_BIT 0
30#define CANVAS_LUT_INDEX_MASK 0x7
31#define CANVAS_LUT_WR_EN (0x2 << 8)
32#define CANVAS_LUT_RD_EN (0x1 << 8)
33
34typedef struct {
35 ulong addr;
36 u32 width;
37 u32 height;
38 u32 wrap;
39 u32 blkmode;
40} canvas_t;
41
42#define OSD1_CANVAS_INDEX 0x40
43#define OSD2_CANVAS_INDEX 0x43
44
45extern void canvas_init(void);
46
47extern void canvas_config(u32 index, ulong addr, u32 width,
48 u32 height, u32 wrap, u32 blkmode);
49
50extern void canvas_read(u32 index, canvas_t *p);
51
52extern void canvas_copy(unsigned src, unsigned dst);
53
54extern void canvas_update_addr(u32 index, u32 addr);
55
56extern unsigned int canvas_get_addr(u32 index);
57
58#endif /* CANVAS_H */