blob: 592f961b5de58132d5c421237fdbb75119496ff4 [file] [log] [blame]
Bard Liao5e8351d2014-06-30 20:31:13 +08001/*
2 * rt5670.c -- RT5670 ALSA SoC audio codec driver
3 *
4 * Copyright 2014 Realtek Semiconductor Corp.
5 * Author: Bard Liao <bardliao@realtek.com>
6 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License version 2 as
9 * published by the Free Software Foundation.
10 */
11
12#include <linux/module.h>
13#include <linux/moduleparam.h>
14#include <linux/init.h>
15#include <linux/delay.h>
16#include <linux/pm.h>
Bard Liao64e89e52014-12-15 15:42:33 +080017#include <linux/pm_runtime.h>
Bard Liao5e8351d2014-06-30 20:31:13 +080018#include <linux/i2c.h>
19#include <linux/platform_device.h>
Mengdong Lin06058152014-11-14 15:51:34 +080020#include <linux/acpi.h>
Bard Liao5e8351d2014-06-30 20:31:13 +080021#include <linux/spi/spi.h>
Bard Liao223c0552014-12-18 11:32:52 +080022#include <linux/dmi.h>
Bard Liao5e8351d2014-06-30 20:31:13 +080023#include <sound/core.h>
24#include <sound/pcm.h>
25#include <sound/pcm_params.h>
26#include <sound/jack.h>
27#include <sound/soc.h>
28#include <sound/soc-dapm.h>
29#include <sound/initval.h>
30#include <sound/tlv.h>
31#include <sound/rt5670.h>
32
33#include "rl6231.h"
34#include "rt5670.h"
35#include "rt5670-dsp.h"
36
37#define RT5670_DEVICE_ID 0x6271
38
39#define RT5670_PR_RANGE_BASE (0xff + 1)
40#define RT5670_PR_SPACING 0x100
41
42#define RT5670_PR_BASE (RT5670_PR_RANGE_BASE + (0 * RT5670_PR_SPACING))
43
44static const struct regmap_range_cfg rt5670_ranges[] = {
45 { .name = "PR", .range_min = RT5670_PR_BASE,
46 .range_max = RT5670_PR_BASE + 0xf8,
47 .selector_reg = RT5670_PRIV_INDEX,
48 .selector_mask = 0xff,
49 .selector_shift = 0x0,
50 .window_start = RT5670_PRIV_DATA,
51 .window_len = 0x1, },
52};
53
54static struct reg_default init_list[] = {
55 { RT5670_PR_BASE + 0x14, 0x9a8a },
56 { RT5670_PR_BASE + 0x38, 0x3ba1 },
57 { RT5670_PR_BASE + 0x3d, 0x3640 },
58};
59#define RT5670_INIT_REG_LEN ARRAY_SIZE(init_list)
60
61static const struct reg_default rt5670_reg[] = {
62 { 0x00, 0x0000 },
63 { 0x02, 0x8888 },
64 { 0x03, 0x8888 },
65 { 0x0a, 0x0001 },
66 { 0x0b, 0x0827 },
67 { 0x0c, 0x0000 },
68 { 0x0d, 0x0008 },
69 { 0x0e, 0x0000 },
70 { 0x0f, 0x0808 },
71 { 0x19, 0xafaf },
72 { 0x1a, 0xafaf },
73 { 0x1b, 0x0011 },
74 { 0x1c, 0x2f2f },
75 { 0x1d, 0x2f2f },
76 { 0x1e, 0x0000 },
77 { 0x1f, 0x2f2f },
78 { 0x20, 0x0000 },
79 { 0x26, 0x7860 },
80 { 0x27, 0x7860 },
81 { 0x28, 0x7871 },
82 { 0x29, 0x8080 },
83 { 0x2a, 0x5656 },
84 { 0x2b, 0x5454 },
85 { 0x2c, 0xaaa0 },
86 { 0x2d, 0x0000 },
87 { 0x2e, 0x2f2f },
88 { 0x2f, 0x1002 },
89 { 0x30, 0x0000 },
90 { 0x31, 0x5f00 },
91 { 0x32, 0x0000 },
92 { 0x33, 0x0000 },
93 { 0x34, 0x0000 },
94 { 0x35, 0x0000 },
95 { 0x36, 0x0000 },
96 { 0x37, 0x0000 },
97 { 0x38, 0x0000 },
98 { 0x3b, 0x0000 },
99 { 0x3c, 0x007f },
100 { 0x3d, 0x0000 },
101 { 0x3e, 0x007f },
102 { 0x45, 0xe00f },
103 { 0x4c, 0x5380 },
104 { 0x4f, 0x0073 },
105 { 0x52, 0x00d3 },
Bard Liaoac87f222014-11-06 12:23:52 +0800106 { 0x53, 0xf000 },
Bard Liao5e8351d2014-06-30 20:31:13 +0800107 { 0x61, 0x0000 },
108 { 0x62, 0x0001 },
109 { 0x63, 0x00c3 },
110 { 0x64, 0x0000 },
Bard Liaoac87f222014-11-06 12:23:52 +0800111 { 0x65, 0x0001 },
Bard Liao5e8351d2014-06-30 20:31:13 +0800112 { 0x66, 0x0000 },
113 { 0x6f, 0x8000 },
114 { 0x70, 0x8000 },
115 { 0x71, 0x8000 },
116 { 0x72, 0x8000 },
Bard Liaoac87f222014-11-06 12:23:52 +0800117 { 0x73, 0x7770 },
Bard Liao5e8351d2014-06-30 20:31:13 +0800118 { 0x74, 0x0e00 },
119 { 0x75, 0x1505 },
120 { 0x76, 0x0015 },
121 { 0x77, 0x0c00 },
122 { 0x78, 0x4000 },
123 { 0x79, 0x0123 },
124 { 0x7f, 0x1100 },
125 { 0x80, 0x0000 },
126 { 0x81, 0x0000 },
127 { 0x82, 0x0000 },
128 { 0x83, 0x0000 },
129 { 0x84, 0x0000 },
130 { 0x85, 0x0000 },
Bard Liaoac87f222014-11-06 12:23:52 +0800131 { 0x86, 0x0004 },
Bard Liao5e8351d2014-06-30 20:31:13 +0800132 { 0x87, 0x0000 },
133 { 0x88, 0x0000 },
134 { 0x89, 0x0000 },
135 { 0x8a, 0x0000 },
136 { 0x8b, 0x0000 },
Bard Liaoac87f222014-11-06 12:23:52 +0800137 { 0x8c, 0x0003 },
Bard Liao5e8351d2014-06-30 20:31:13 +0800138 { 0x8d, 0x0000 },
139 { 0x8e, 0x0004 },
140 { 0x8f, 0x1100 },
141 { 0x90, 0x0646 },
142 { 0x91, 0x0c06 },
143 { 0x93, 0x0000 },
Bard Liaoac87f222014-11-06 12:23:52 +0800144 { 0x94, 0x1270 },
145 { 0x95, 0x1000 },
Bard Liao5e8351d2014-06-30 20:31:13 +0800146 { 0x97, 0x0000 },
147 { 0x98, 0x0000 },
148 { 0x99, 0x0000 },
149 { 0x9a, 0x2184 },
150 { 0x9b, 0x010a },
151 { 0x9c, 0x0aea },
152 { 0x9d, 0x000c },
153 { 0x9e, 0x0400 },
154 { 0xae, 0x7000 },
155 { 0xaf, 0x0000 },
Bard Liaoac87f222014-11-06 12:23:52 +0800156 { 0xb0, 0x7000 },
Bard Liao5e8351d2014-06-30 20:31:13 +0800157 { 0xb1, 0x0000 },
158 { 0xb2, 0x0000 },
159 { 0xb3, 0x001f },
Bard Liaoac87f222014-11-06 12:23:52 +0800160 { 0xb4, 0x220c },
Bard Liao5e8351d2014-06-30 20:31:13 +0800161 { 0xb5, 0x1f00 },
162 { 0xb6, 0x0000 },
163 { 0xb7, 0x0000 },
164 { 0xbb, 0x0000 },
165 { 0xbc, 0x0000 },
166 { 0xbd, 0x0000 },
167 { 0xbe, 0x0000 },
168 { 0xbf, 0x0000 },
169 { 0xc0, 0x0000 },
170 { 0xc1, 0x0000 },
171 { 0xc2, 0x0000 },
172 { 0xcd, 0x0000 },
173 { 0xce, 0x0000 },
174 { 0xcf, 0x1813 },
175 { 0xd0, 0x0690 },
176 { 0xd1, 0x1c17 },
Bard Liaoac87f222014-11-06 12:23:52 +0800177 { 0xd3, 0xa220 },
Bard Liao5e8351d2014-06-30 20:31:13 +0800178 { 0xd4, 0x0000 },
179 { 0xd6, 0x0400 },
180 { 0xd9, 0x0809 },
181 { 0xda, 0x0000 },
182 { 0xdb, 0x0001 },
183 { 0xdc, 0x0049 },
Bard Liaoac87f222014-11-06 12:23:52 +0800184 { 0xdd, 0x0024 },
Bard Liao5e8351d2014-06-30 20:31:13 +0800185 { 0xe6, 0x8000 },
186 { 0xe7, 0x0000 },
Bard Liaoac87f222014-11-06 12:23:52 +0800187 { 0xec, 0xa200 },
Bard Liao5e8351d2014-06-30 20:31:13 +0800188 { 0xed, 0x0000 },
Bard Liaoac87f222014-11-06 12:23:52 +0800189 { 0xee, 0xa200 },
Bard Liao5e8351d2014-06-30 20:31:13 +0800190 { 0xef, 0x0000 },
191 { 0xf8, 0x0000 },
192 { 0xf9, 0x0000 },
193 { 0xfa, 0x8010 },
194 { 0xfb, 0x0033 },
Bard Liaoac87f222014-11-06 12:23:52 +0800195 { 0xfc, 0x0100 },
Bard Liao5e8351d2014-06-30 20:31:13 +0800196};
197
198static bool rt5670_volatile_register(struct device *dev, unsigned int reg)
199{
200 int i;
201
202 for (i = 0; i < ARRAY_SIZE(rt5670_ranges); i++) {
203 if ((reg >= rt5670_ranges[i].window_start &&
204 reg <= rt5670_ranges[i].window_start +
205 rt5670_ranges[i].window_len) ||
206 (reg >= rt5670_ranges[i].range_min &&
207 reg <= rt5670_ranges[i].range_max)) {
208 return true;
209 }
210 }
211
212 switch (reg) {
213 case RT5670_RESET:
214 case RT5670_PDM_DATA_CTRL1:
215 case RT5670_PDM1_DATA_CTRL4:
216 case RT5670_PDM2_DATA_CTRL4:
217 case RT5670_PRIV_DATA:
218 case RT5670_ASRC_5:
219 case RT5670_CJ_CTRL1:
220 case RT5670_CJ_CTRL2:
221 case RT5670_CJ_CTRL3:
222 case RT5670_A_JD_CTRL1:
223 case RT5670_A_JD_CTRL2:
224 case RT5670_VAD_CTRL5:
225 case RT5670_ADC_EQ_CTRL1:
226 case RT5670_EQ_CTRL1:
227 case RT5670_ALC_CTRL_1:
228 case RT5670_IRQ_CTRL1:
229 case RT5670_IRQ_CTRL2:
230 case RT5670_INT_IRQ_ST:
231 case RT5670_IL_CMD:
232 case RT5670_DSP_CTRL1:
233 case RT5670_DSP_CTRL2:
234 case RT5670_DSP_CTRL3:
235 case RT5670_DSP_CTRL4:
236 case RT5670_DSP_CTRL5:
237 case RT5670_VENDOR_ID:
238 case RT5670_VENDOR_ID1:
239 case RT5670_VENDOR_ID2:
240 return true;
241 default:
242 return false;
243 }
244}
245
246static bool rt5670_readable_register(struct device *dev, unsigned int reg)
247{
248 int i;
249
250 for (i = 0; i < ARRAY_SIZE(rt5670_ranges); i++) {
251 if ((reg >= rt5670_ranges[i].window_start &&
252 reg <= rt5670_ranges[i].window_start +
253 rt5670_ranges[i].window_len) ||
254 (reg >= rt5670_ranges[i].range_min &&
255 reg <= rt5670_ranges[i].range_max)) {
256 return true;
257 }
258 }
259
260 switch (reg) {
261 case RT5670_RESET:
262 case RT5670_HP_VOL:
263 case RT5670_LOUT1:
264 case RT5670_CJ_CTRL1:
265 case RT5670_CJ_CTRL2:
266 case RT5670_CJ_CTRL3:
267 case RT5670_IN2:
268 case RT5670_INL1_INR1_VOL:
269 case RT5670_DAC1_DIG_VOL:
270 case RT5670_DAC2_DIG_VOL:
271 case RT5670_DAC_CTRL:
272 case RT5670_STO1_ADC_DIG_VOL:
273 case RT5670_MONO_ADC_DIG_VOL:
274 case RT5670_STO2_ADC_DIG_VOL:
275 case RT5670_ADC_BST_VOL1:
276 case RT5670_ADC_BST_VOL2:
277 case RT5670_STO2_ADC_MIXER:
278 case RT5670_STO1_ADC_MIXER:
279 case RT5670_MONO_ADC_MIXER:
280 case RT5670_AD_DA_MIXER:
281 case RT5670_STO_DAC_MIXER:
282 case RT5670_DD_MIXER:
283 case RT5670_DIG_MIXER:
284 case RT5670_DSP_PATH1:
285 case RT5670_DSP_PATH2:
286 case RT5670_DIG_INF1_DATA:
287 case RT5670_DIG_INF2_DATA:
288 case RT5670_PDM_OUT_CTRL:
289 case RT5670_PDM_DATA_CTRL1:
290 case RT5670_PDM1_DATA_CTRL2:
291 case RT5670_PDM1_DATA_CTRL3:
292 case RT5670_PDM1_DATA_CTRL4:
293 case RT5670_PDM2_DATA_CTRL2:
294 case RT5670_PDM2_DATA_CTRL3:
295 case RT5670_PDM2_DATA_CTRL4:
296 case RT5670_REC_L1_MIXER:
297 case RT5670_REC_L2_MIXER:
298 case RT5670_REC_R1_MIXER:
299 case RT5670_REC_R2_MIXER:
300 case RT5670_HPO_MIXER:
301 case RT5670_MONO_MIXER:
302 case RT5670_OUT_L1_MIXER:
303 case RT5670_OUT_R1_MIXER:
304 case RT5670_LOUT_MIXER:
305 case RT5670_PWR_DIG1:
306 case RT5670_PWR_DIG2:
307 case RT5670_PWR_ANLG1:
308 case RT5670_PWR_ANLG2:
309 case RT5670_PWR_MIXER:
310 case RT5670_PWR_VOL:
311 case RT5670_PRIV_INDEX:
312 case RT5670_PRIV_DATA:
313 case RT5670_I2S4_SDP:
314 case RT5670_I2S1_SDP:
315 case RT5670_I2S2_SDP:
316 case RT5670_I2S3_SDP:
317 case RT5670_ADDA_CLK1:
318 case RT5670_ADDA_CLK2:
319 case RT5670_DMIC_CTRL1:
320 case RT5670_DMIC_CTRL2:
321 case RT5670_TDM_CTRL_1:
322 case RT5670_TDM_CTRL_2:
323 case RT5670_TDM_CTRL_3:
324 case RT5670_DSP_CLK:
325 case RT5670_GLB_CLK:
326 case RT5670_PLL_CTRL1:
327 case RT5670_PLL_CTRL2:
328 case RT5670_ASRC_1:
329 case RT5670_ASRC_2:
330 case RT5670_ASRC_3:
331 case RT5670_ASRC_4:
332 case RT5670_ASRC_5:
333 case RT5670_ASRC_7:
334 case RT5670_ASRC_8:
335 case RT5670_ASRC_9:
336 case RT5670_ASRC_10:
337 case RT5670_ASRC_11:
338 case RT5670_ASRC_12:
339 case RT5670_ASRC_13:
340 case RT5670_ASRC_14:
341 case RT5670_DEPOP_M1:
342 case RT5670_DEPOP_M2:
343 case RT5670_DEPOP_M3:
344 case RT5670_CHARGE_PUMP:
345 case RT5670_MICBIAS:
346 case RT5670_A_JD_CTRL1:
347 case RT5670_A_JD_CTRL2:
348 case RT5670_VAD_CTRL1:
349 case RT5670_VAD_CTRL2:
350 case RT5670_VAD_CTRL3:
351 case RT5670_VAD_CTRL4:
352 case RT5670_VAD_CTRL5:
353 case RT5670_ADC_EQ_CTRL1:
354 case RT5670_ADC_EQ_CTRL2:
355 case RT5670_EQ_CTRL1:
356 case RT5670_EQ_CTRL2:
357 case RT5670_ALC_DRC_CTRL1:
358 case RT5670_ALC_DRC_CTRL2:
359 case RT5670_ALC_CTRL_1:
360 case RT5670_ALC_CTRL_2:
361 case RT5670_ALC_CTRL_3:
362 case RT5670_JD_CTRL:
363 case RT5670_IRQ_CTRL1:
364 case RT5670_IRQ_CTRL2:
365 case RT5670_INT_IRQ_ST:
366 case RT5670_GPIO_CTRL1:
367 case RT5670_GPIO_CTRL2:
368 case RT5670_GPIO_CTRL3:
369 case RT5670_SCRABBLE_FUN:
370 case RT5670_SCRABBLE_CTRL:
371 case RT5670_BASE_BACK:
372 case RT5670_MP3_PLUS1:
373 case RT5670_MP3_PLUS2:
374 case RT5670_ADJ_HPF1:
375 case RT5670_ADJ_HPF2:
376 case RT5670_HP_CALIB_AMP_DET:
377 case RT5670_SV_ZCD1:
378 case RT5670_SV_ZCD2:
379 case RT5670_IL_CMD:
380 case RT5670_IL_CMD2:
381 case RT5670_IL_CMD3:
382 case RT5670_DRC_HL_CTRL1:
383 case RT5670_DRC_HL_CTRL2:
384 case RT5670_ADC_MONO_HP_CTRL1:
385 case RT5670_ADC_MONO_HP_CTRL2:
386 case RT5670_ADC_STO2_HP_CTRL1:
387 case RT5670_ADC_STO2_HP_CTRL2:
388 case RT5670_JD_CTRL3:
389 case RT5670_JD_CTRL4:
390 case RT5670_DIG_MISC:
391 case RT5670_DSP_CTRL1:
392 case RT5670_DSP_CTRL2:
393 case RT5670_DSP_CTRL3:
394 case RT5670_DSP_CTRL4:
395 case RT5670_DSP_CTRL5:
396 case RT5670_GEN_CTRL2:
397 case RT5670_GEN_CTRL3:
398 case RT5670_VENDOR_ID:
399 case RT5670_VENDOR_ID1:
400 case RT5670_VENDOR_ID2:
401 return true;
402 default:
403 return false;
404 }
405}
406
407static const DECLARE_TLV_DB_SCALE(out_vol_tlv, -4650, 150, 0);
408static const DECLARE_TLV_DB_SCALE(dac_vol_tlv, -65625, 375, 0);
409static const DECLARE_TLV_DB_SCALE(in_vol_tlv, -3450, 150, 0);
410static const DECLARE_TLV_DB_SCALE(adc_vol_tlv, -17625, 375, 0);
411static const DECLARE_TLV_DB_SCALE(adc_bst_tlv, 0, 1200, 0);
412
413/* {0, +20, +24, +30, +35, +40, +44, +50, +52} dB */
414static unsigned int bst_tlv[] = {
415 TLV_DB_RANGE_HEAD(7),
416 0, 0, TLV_DB_SCALE_ITEM(0, 0, 0),
417 1, 1, TLV_DB_SCALE_ITEM(2000, 0, 0),
418 2, 2, TLV_DB_SCALE_ITEM(2400, 0, 0),
419 3, 5, TLV_DB_SCALE_ITEM(3000, 500, 0),
420 6, 6, TLV_DB_SCALE_ITEM(4400, 0, 0),
421 7, 7, TLV_DB_SCALE_ITEM(5000, 0, 0),
422 8, 8, TLV_DB_SCALE_ITEM(5200, 0, 0),
423};
424
425/* Interface data select */
426static const char * const rt5670_data_select[] = {
427 "Normal", "Swap", "left copy to right", "right copy to left"
428};
429
Mark Brown01957572014-08-01 17:30:38 +0100430static SOC_ENUM_SINGLE_DECL(rt5670_if2_dac_enum, RT5670_DIG_INF1_DATA,
Bard Liao5e8351d2014-06-30 20:31:13 +0800431 RT5670_IF2_DAC_SEL_SFT, rt5670_data_select);
432
Mark Brown01957572014-08-01 17:30:38 +0100433static SOC_ENUM_SINGLE_DECL(rt5670_if2_adc_enum, RT5670_DIG_INF1_DATA,
Bard Liao5e8351d2014-06-30 20:31:13 +0800434 RT5670_IF2_ADC_SEL_SFT, rt5670_data_select);
435
436static const struct snd_kcontrol_new rt5670_snd_controls[] = {
437 /* Headphone Output Volume */
438 SOC_DOUBLE("HP Playback Switch", RT5670_HP_VOL,
439 RT5670_L_MUTE_SFT, RT5670_R_MUTE_SFT, 1, 1),
440 SOC_DOUBLE_TLV("HP Playback Volume", RT5670_HP_VOL,
441 RT5670_L_VOL_SFT, RT5670_R_VOL_SFT,
442 39, 0, out_vol_tlv),
443 /* OUTPUT Control */
444 SOC_DOUBLE("OUT Channel Switch", RT5670_LOUT1,
445 RT5670_VOL_L_SFT, RT5670_VOL_R_SFT, 1, 1),
446 SOC_DOUBLE_TLV("OUT Playback Volume", RT5670_LOUT1,
447 RT5670_L_VOL_SFT, RT5670_R_VOL_SFT, 39, 1, out_vol_tlv),
448 /* DAC Digital Volume */
449 SOC_DOUBLE("DAC2 Playback Switch", RT5670_DAC_CTRL,
450 RT5670_M_DAC_L2_VOL_SFT, RT5670_M_DAC_R2_VOL_SFT, 1, 1),
451 SOC_DOUBLE_TLV("DAC1 Playback Volume", RT5670_DAC1_DIG_VOL,
452 RT5670_L_VOL_SFT, RT5670_R_VOL_SFT,
453 175, 0, dac_vol_tlv),
454 SOC_DOUBLE_TLV("Mono DAC Playback Volume", RT5670_DAC2_DIG_VOL,
455 RT5670_L_VOL_SFT, RT5670_R_VOL_SFT,
456 175, 0, dac_vol_tlv),
457 /* IN1/IN2 Control */
458 SOC_SINGLE_TLV("IN1 Boost Volume", RT5670_CJ_CTRL1,
459 RT5670_BST_SFT1, 8, 0, bst_tlv),
460 SOC_SINGLE_TLV("IN2 Boost Volume", RT5670_IN2,
461 RT5670_BST_SFT1, 8, 0, bst_tlv),
462 /* INL/INR Volume Control */
463 SOC_DOUBLE_TLV("IN Capture Volume", RT5670_INL1_INR1_VOL,
464 RT5670_INL_VOL_SFT, RT5670_INR_VOL_SFT,
465 31, 1, in_vol_tlv),
466 /* ADC Digital Volume Control */
467 SOC_DOUBLE("ADC Capture Switch", RT5670_STO1_ADC_DIG_VOL,
468 RT5670_L_MUTE_SFT, RT5670_R_MUTE_SFT, 1, 1),
469 SOC_DOUBLE_TLV("ADC Capture Volume", RT5670_STO1_ADC_DIG_VOL,
470 RT5670_L_VOL_SFT, RT5670_R_VOL_SFT,
471 127, 0, adc_vol_tlv),
472
473 SOC_DOUBLE_TLV("Mono ADC Capture Volume", RT5670_MONO_ADC_DIG_VOL,
474 RT5670_L_VOL_SFT, RT5670_R_VOL_SFT,
475 127, 0, adc_vol_tlv),
476
477 /* ADC Boost Volume Control */
478 SOC_DOUBLE_TLV("STO1 ADC Boost Gain Volume", RT5670_ADC_BST_VOL1,
479 RT5670_STO1_ADC_L_BST_SFT, RT5670_STO1_ADC_R_BST_SFT,
480 3, 0, adc_bst_tlv),
481
482 SOC_DOUBLE_TLV("STO2 ADC Boost Gain Volume", RT5670_ADC_BST_VOL1,
483 RT5670_STO2_ADC_L_BST_SFT, RT5670_STO2_ADC_R_BST_SFT,
484 3, 0, adc_bst_tlv),
485
486 SOC_ENUM("ADC IF2 Data Switch", rt5670_if2_adc_enum),
487 SOC_ENUM("DAC IF2 Data Switch", rt5670_if2_dac_enum),
488};
489
490/**
491 * set_dmic_clk - Set parameter of dmic.
492 *
493 * @w: DAPM widget.
494 * @kcontrol: The kcontrol of this widget.
495 * @event: Event id.
496 *
497 * Choose dmic clock between 1MHz and 3MHz.
498 * It is better for clock to approximate 3MHz.
499 */
500static int set_dmic_clk(struct snd_soc_dapm_widget *w,
501 struct snd_kcontrol *kcontrol, int event)
502{
503 struct snd_soc_codec *codec = w->codec;
504 struct rt5670_priv *rt5670 = snd_soc_codec_get_drvdata(codec);
505 int idx = -EINVAL;
506
507 idx = rl6231_calc_dmic_clk(rt5670->sysclk);
508
509 if (idx < 0)
510 dev_err(codec->dev, "Failed to set DMIC clock\n");
511 else
512 snd_soc_update_bits(codec, RT5670_DMIC_CTRL1,
513 RT5670_DMIC_CLK_MASK, idx << RT5670_DMIC_CLK_SFT);
514 return idx;
515}
516
517static int is_sys_clk_from_pll(struct snd_soc_dapm_widget *source,
518 struct snd_soc_dapm_widget *sink)
519{
520 unsigned int val;
521
522 val = snd_soc_read(source->codec, RT5670_GLB_CLK);
523 val &= RT5670_SCLK_SRC_MASK;
524 if (val == RT5670_SCLK_SRC_PLL1)
525 return 1;
526 else
527 return 0;
528}
529
530static int is_using_asrc(struct snd_soc_dapm_widget *source,
531 struct snd_soc_dapm_widget *sink)
532{
533 unsigned int reg, shift, val;
534
535 switch (source->shift) {
536 case 0:
537 reg = RT5670_ASRC_3;
538 shift = 0;
539 break;
540 case 1:
541 reg = RT5670_ASRC_3;
542 shift = 4;
543 break;
544 case 2:
545 reg = RT5670_ASRC_5;
546 shift = 12;
547 break;
548 case 3:
549 reg = RT5670_ASRC_2;
550 shift = 0;
551 break;
552 case 8:
553 reg = RT5670_ASRC_2;
554 shift = 4;
555 break;
556 case 9:
557 reg = RT5670_ASRC_2;
558 shift = 8;
559 break;
560 case 10:
561 reg = RT5670_ASRC_2;
562 shift = 12;
563 break;
564 default:
565 return 0;
566 }
567
568 val = (snd_soc_read(source->codec, reg) >> shift) & 0xf;
569 switch (val) {
570 case 1:
571 case 2:
572 case 3:
573 case 4:
574 return 1;
575 default:
576 return 0;
577 }
578
579}
580
Bard Liaoe50334d2014-11-17 15:27:21 +0800581static int can_use_asrc(struct snd_soc_dapm_widget *source,
582 struct snd_soc_dapm_widget *sink)
583{
584 struct snd_soc_codec *codec = snd_soc_dapm_to_codec(source->dapm);
585 struct rt5670_priv *rt5670 = snd_soc_codec_get_drvdata(codec);
586
587 if (rt5670->sysclk > rt5670->lrck[RT5670_AIF1] * 384)
588 return 1;
589
590 return 0;
591}
592
Mengdong Linea232b32015-01-07 10:19:12 +0800593
594/**
595 * rt5670_sel_asrc_clk_src - select ASRC clock source for a set of filters
596 * @codec: SoC audio codec device.
597 * @filter_mask: mask of filters.
598 * @clk_src: clock source
599 *
600 * The ASRC function is for asynchronous MCLK and LRCK. Also, since RT5670 can
601 * only support standard 32fs or 64fs i2s format, ASRC should be enabled to
602 * support special i2s clock format such as Intel's 100fs(100 * sampling rate).
603 * ASRC function will track i2s clock and generate a corresponding system clock
604 * for codec. This function provides an API to select the clock source for a
605 * set of filters specified by the mask. And the codec driver will turn on ASRC
606 * for these filters if ASRC is selected as their clock source.
607 */
608int rt5670_sel_asrc_clk_src(struct snd_soc_codec *codec,
609 unsigned int filter_mask, unsigned int clk_src)
610{
611 unsigned int asrc2_mask = 0, asrc2_value = 0;
612 unsigned int asrc3_mask = 0, asrc3_value = 0;
613
614 if (clk_src > RT5670_CLK_SEL_SYS3)
615 return -EINVAL;
616
617 if (filter_mask & RT5670_DA_STEREO_FILTER) {
618 asrc2_mask |= RT5670_DA_STO_CLK_SEL_MASK;
619 asrc2_value = (asrc2_value & ~RT5670_DA_STO_CLK_SEL_MASK)
620 | (clk_src << RT5670_DA_STO_CLK_SEL_SFT);
621 }
622
623 if (filter_mask & RT5670_DA_MONO_L_FILTER) {
624 asrc2_mask |= RT5670_DA_MONOL_CLK_SEL_MASK;
625 asrc2_value = (asrc2_value & ~RT5670_DA_MONOL_CLK_SEL_MASK)
626 | (clk_src << RT5670_DA_MONOL_CLK_SEL_SFT);
627 }
628
629 if (filter_mask & RT5670_DA_MONO_R_FILTER) {
630 asrc2_mask |= RT5670_DA_MONOR_CLK_SEL_MASK;
631 asrc2_value = (asrc2_value & ~RT5670_DA_MONOR_CLK_SEL_MASK)
632 | (clk_src << RT5670_DA_MONOR_CLK_SEL_SFT);
633 }
634
635 if (filter_mask & RT5670_AD_STEREO_FILTER) {
636 asrc2_mask |= RT5670_AD_STO1_CLK_SEL_MASK;
637 asrc2_value = (asrc2_value & ~RT5670_AD_STO1_CLK_SEL_MASK)
638 | (clk_src << RT5670_AD_STO1_CLK_SEL_SFT);
639 }
640
641 if (filter_mask & RT5670_AD_MONO_L_FILTER) {
642 asrc3_mask |= RT5670_AD_MONOL_CLK_SEL_MASK;
643 asrc3_value = (asrc3_value & ~RT5670_AD_MONOL_CLK_SEL_MASK)
644 | (clk_src << RT5670_AD_MONOL_CLK_SEL_SFT);
645 }
646
647 if (filter_mask & RT5670_AD_MONO_R_FILTER) {
648 asrc3_mask |= RT5670_AD_MONOR_CLK_SEL_MASK;
649 asrc3_value = (asrc3_value & ~RT5670_AD_MONOR_CLK_SEL_MASK)
650 | (clk_src << RT5670_AD_MONOR_CLK_SEL_SFT);
651 }
652
653 if (filter_mask & RT5670_UP_RATE_FILTER) {
654 asrc3_mask |= RT5670_UP_CLK_SEL_MASK;
655 asrc3_value = (asrc3_value & ~RT5670_UP_CLK_SEL_MASK)
656 | (clk_src << RT5670_UP_CLK_SEL_SFT);
657 }
658
659 if (filter_mask & RT5670_DOWN_RATE_FILTER) {
660 asrc3_mask |= RT5670_DOWN_CLK_SEL_MASK;
661 asrc3_value = (asrc3_value & ~RT5670_DOWN_CLK_SEL_MASK)
662 | (clk_src << RT5670_DOWN_CLK_SEL_SFT);
663 }
664
665 if (asrc2_mask)
666 snd_soc_update_bits(codec, RT5670_ASRC_2,
667 asrc2_mask, asrc2_value);
668
669 if (asrc3_mask)
670 snd_soc_update_bits(codec, RT5670_ASRC_3,
671 asrc3_mask, asrc3_value);
672 return 0;
673}
674EXPORT_SYMBOL_GPL(rt5670_sel_asrc_clk_src);
675
Bard Liao5e8351d2014-06-30 20:31:13 +0800676/* Digital Mixer */
677static const struct snd_kcontrol_new rt5670_sto1_adc_l_mix[] = {
678 SOC_DAPM_SINGLE("ADC1 Switch", RT5670_STO1_ADC_MIXER,
679 RT5670_M_ADC_L1_SFT, 1, 1),
680 SOC_DAPM_SINGLE("ADC2 Switch", RT5670_STO1_ADC_MIXER,
681 RT5670_M_ADC_L2_SFT, 1, 1),
682};
683
684static const struct snd_kcontrol_new rt5670_sto1_adc_r_mix[] = {
685 SOC_DAPM_SINGLE("ADC1 Switch", RT5670_STO1_ADC_MIXER,
686 RT5670_M_ADC_R1_SFT, 1, 1),
687 SOC_DAPM_SINGLE("ADC2 Switch", RT5670_STO1_ADC_MIXER,
688 RT5670_M_ADC_R2_SFT, 1, 1),
689};
690
691static const struct snd_kcontrol_new rt5670_sto2_adc_l_mix[] = {
692 SOC_DAPM_SINGLE("ADC1 Switch", RT5670_STO2_ADC_MIXER,
693 RT5670_M_ADC_L1_SFT, 1, 1),
694 SOC_DAPM_SINGLE("ADC2 Switch", RT5670_STO2_ADC_MIXER,
695 RT5670_M_ADC_L2_SFT, 1, 1),
696};
697
698static const struct snd_kcontrol_new rt5670_sto2_adc_r_mix[] = {
699 SOC_DAPM_SINGLE("ADC1 Switch", RT5670_STO2_ADC_MIXER,
700 RT5670_M_ADC_R1_SFT, 1, 1),
701 SOC_DAPM_SINGLE("ADC2 Switch", RT5670_STO2_ADC_MIXER,
702 RT5670_M_ADC_R2_SFT, 1, 1),
703};
704
705static const struct snd_kcontrol_new rt5670_mono_adc_l_mix[] = {
706 SOC_DAPM_SINGLE("ADC1 Switch", RT5670_MONO_ADC_MIXER,
707 RT5670_M_MONO_ADC_L1_SFT, 1, 1),
708 SOC_DAPM_SINGLE("ADC2 Switch", RT5670_MONO_ADC_MIXER,
709 RT5670_M_MONO_ADC_L2_SFT, 1, 1),
710};
711
712static const struct snd_kcontrol_new rt5670_mono_adc_r_mix[] = {
713 SOC_DAPM_SINGLE("ADC1 Switch", RT5670_MONO_ADC_MIXER,
714 RT5670_M_MONO_ADC_R1_SFT, 1, 1),
715 SOC_DAPM_SINGLE("ADC2 Switch", RT5670_MONO_ADC_MIXER,
716 RT5670_M_MONO_ADC_R2_SFT, 1, 1),
717};
718
719static const struct snd_kcontrol_new rt5670_dac_l_mix[] = {
720 SOC_DAPM_SINGLE("Stereo ADC Switch", RT5670_AD_DA_MIXER,
721 RT5670_M_ADCMIX_L_SFT, 1, 1),
722 SOC_DAPM_SINGLE("DAC1 Switch", RT5670_AD_DA_MIXER,
723 RT5670_M_DAC1_L_SFT, 1, 1),
724};
725
726static const struct snd_kcontrol_new rt5670_dac_r_mix[] = {
727 SOC_DAPM_SINGLE("Stereo ADC Switch", RT5670_AD_DA_MIXER,
728 RT5670_M_ADCMIX_R_SFT, 1, 1),
729 SOC_DAPM_SINGLE("DAC1 Switch", RT5670_AD_DA_MIXER,
730 RT5670_M_DAC1_R_SFT, 1, 1),
731};
732
733static const struct snd_kcontrol_new rt5670_sto_dac_l_mix[] = {
734 SOC_DAPM_SINGLE("DAC L1 Switch", RT5670_STO_DAC_MIXER,
735 RT5670_M_DAC_L1_SFT, 1, 1),
736 SOC_DAPM_SINGLE("DAC L2 Switch", RT5670_STO_DAC_MIXER,
737 RT5670_M_DAC_L2_SFT, 1, 1),
738 SOC_DAPM_SINGLE("DAC R1 Switch", RT5670_STO_DAC_MIXER,
739 RT5670_M_DAC_R1_STO_L_SFT, 1, 1),
740};
741
742static const struct snd_kcontrol_new rt5670_sto_dac_r_mix[] = {
743 SOC_DAPM_SINGLE("DAC R1 Switch", RT5670_STO_DAC_MIXER,
744 RT5670_M_DAC_R1_SFT, 1, 1),
745 SOC_DAPM_SINGLE("DAC R2 Switch", RT5670_STO_DAC_MIXER,
746 RT5670_M_DAC_R2_SFT, 1, 1),
747 SOC_DAPM_SINGLE("DAC L1 Switch", RT5670_STO_DAC_MIXER,
748 RT5670_M_DAC_L1_STO_R_SFT, 1, 1),
749};
750
751static const struct snd_kcontrol_new rt5670_mono_dac_l_mix[] = {
752 SOC_DAPM_SINGLE("DAC L1 Switch", RT5670_DD_MIXER,
753 RT5670_M_DAC_L1_MONO_L_SFT, 1, 1),
754 SOC_DAPM_SINGLE("DAC L2 Switch", RT5670_DD_MIXER,
755 RT5670_M_DAC_L2_MONO_L_SFT, 1, 1),
756 SOC_DAPM_SINGLE("DAC R2 Switch", RT5670_DD_MIXER,
757 RT5670_M_DAC_R2_MONO_L_SFT, 1, 1),
758};
759
760static const struct snd_kcontrol_new rt5670_mono_dac_r_mix[] = {
761 SOC_DAPM_SINGLE("DAC R1 Switch", RT5670_DD_MIXER,
762 RT5670_M_DAC_R1_MONO_R_SFT, 1, 1),
763 SOC_DAPM_SINGLE("DAC R2 Switch", RT5670_DD_MIXER,
764 RT5670_M_DAC_R2_MONO_R_SFT, 1, 1),
765 SOC_DAPM_SINGLE("DAC L2 Switch", RT5670_DD_MIXER,
766 RT5670_M_DAC_L2_MONO_R_SFT, 1, 1),
767};
768
769static const struct snd_kcontrol_new rt5670_dig_l_mix[] = {
770 SOC_DAPM_SINGLE("Sto DAC Mix L Switch", RT5670_DIG_MIXER,
771 RT5670_M_STO_L_DAC_L_SFT, 1, 1),
772 SOC_DAPM_SINGLE("DAC L2 Switch", RT5670_DIG_MIXER,
773 RT5670_M_DAC_L2_DAC_L_SFT, 1, 1),
774 SOC_DAPM_SINGLE("DAC R2 Switch", RT5670_DIG_MIXER,
775 RT5670_M_DAC_R2_DAC_L_SFT, 1, 1),
776};
777
778static const struct snd_kcontrol_new rt5670_dig_r_mix[] = {
779 SOC_DAPM_SINGLE("Sto DAC Mix R Switch", RT5670_DIG_MIXER,
780 RT5670_M_STO_R_DAC_R_SFT, 1, 1),
781 SOC_DAPM_SINGLE("DAC R2 Switch", RT5670_DIG_MIXER,
782 RT5670_M_DAC_R2_DAC_R_SFT, 1, 1),
783 SOC_DAPM_SINGLE("DAC L2 Switch", RT5670_DIG_MIXER,
784 RT5670_M_DAC_L2_DAC_R_SFT, 1, 1),
785};
786
787/* Analog Input Mixer */
788static const struct snd_kcontrol_new rt5670_rec_l_mix[] = {
789 SOC_DAPM_SINGLE("INL Switch", RT5670_REC_L2_MIXER,
790 RT5670_M_IN_L_RM_L_SFT, 1, 1),
791 SOC_DAPM_SINGLE("BST2 Switch", RT5670_REC_L2_MIXER,
792 RT5670_M_BST2_RM_L_SFT, 1, 1),
793 SOC_DAPM_SINGLE("BST1 Switch", RT5670_REC_L2_MIXER,
794 RT5670_M_BST1_RM_L_SFT, 1, 1),
795};
796
797static const struct snd_kcontrol_new rt5670_rec_r_mix[] = {
798 SOC_DAPM_SINGLE("INR Switch", RT5670_REC_R2_MIXER,
799 RT5670_M_IN_R_RM_R_SFT, 1, 1),
800 SOC_DAPM_SINGLE("BST2 Switch", RT5670_REC_R2_MIXER,
801 RT5670_M_BST2_RM_R_SFT, 1, 1),
802 SOC_DAPM_SINGLE("BST1 Switch", RT5670_REC_R2_MIXER,
803 RT5670_M_BST1_RM_R_SFT, 1, 1),
804};
805
806static const struct snd_kcontrol_new rt5670_out_l_mix[] = {
807 SOC_DAPM_SINGLE("BST1 Switch", RT5670_OUT_L1_MIXER,
808 RT5670_M_BST1_OM_L_SFT, 1, 1),
809 SOC_DAPM_SINGLE("INL Switch", RT5670_OUT_L1_MIXER,
810 RT5670_M_IN_L_OM_L_SFT, 1, 1),
811 SOC_DAPM_SINGLE("DAC L2 Switch", RT5670_OUT_L1_MIXER,
812 RT5670_M_DAC_L2_OM_L_SFT, 1, 1),
813 SOC_DAPM_SINGLE("DAC L1 Switch", RT5670_OUT_L1_MIXER,
814 RT5670_M_DAC_L1_OM_L_SFT, 1, 1),
815};
816
817static const struct snd_kcontrol_new rt5670_out_r_mix[] = {
818 SOC_DAPM_SINGLE("BST2 Switch", RT5670_OUT_R1_MIXER,
819 RT5670_M_BST2_OM_R_SFT, 1, 1),
820 SOC_DAPM_SINGLE("INR Switch", RT5670_OUT_R1_MIXER,
821 RT5670_M_IN_R_OM_R_SFT, 1, 1),
822 SOC_DAPM_SINGLE("DAC R2 Switch", RT5670_OUT_R1_MIXER,
823 RT5670_M_DAC_R2_OM_R_SFT, 1, 1),
824 SOC_DAPM_SINGLE("DAC R1 Switch", RT5670_OUT_R1_MIXER,
825 RT5670_M_DAC_R1_OM_R_SFT, 1, 1),
826};
827
828static const struct snd_kcontrol_new rt5670_hpo_mix[] = {
829 SOC_DAPM_SINGLE("DAC1 Switch", RT5670_HPO_MIXER,
830 RT5670_M_DAC1_HM_SFT, 1, 1),
831 SOC_DAPM_SINGLE("HPVOL Switch", RT5670_HPO_MIXER,
832 RT5670_M_HPVOL_HM_SFT, 1, 1),
833};
834
835static const struct snd_kcontrol_new rt5670_hpvoll_mix[] = {
836 SOC_DAPM_SINGLE("DAC1 Switch", RT5670_HPO_MIXER,
837 RT5670_M_DACL1_HML_SFT, 1, 1),
838 SOC_DAPM_SINGLE("INL Switch", RT5670_HPO_MIXER,
839 RT5670_M_INL1_HML_SFT, 1, 1),
840};
841
842static const struct snd_kcontrol_new rt5670_hpvolr_mix[] = {
843 SOC_DAPM_SINGLE("DAC1 Switch", RT5670_HPO_MIXER,
844 RT5670_M_DACR1_HMR_SFT, 1, 1),
845 SOC_DAPM_SINGLE("INR Switch", RT5670_HPO_MIXER,
846 RT5670_M_INR1_HMR_SFT, 1, 1),
847};
848
849static const struct snd_kcontrol_new rt5670_lout_mix[] = {
850 SOC_DAPM_SINGLE("DAC L1 Switch", RT5670_LOUT_MIXER,
851 RT5670_M_DAC_L1_LM_SFT, 1, 1),
852 SOC_DAPM_SINGLE("DAC R1 Switch", RT5670_LOUT_MIXER,
853 RT5670_M_DAC_R1_LM_SFT, 1, 1),
854 SOC_DAPM_SINGLE("OUTMIX L Switch", RT5670_LOUT_MIXER,
855 RT5670_M_OV_L_LM_SFT, 1, 1),
856 SOC_DAPM_SINGLE("OUTMIX R Switch", RT5670_LOUT_MIXER,
857 RT5670_M_OV_R_LM_SFT, 1, 1),
858};
859
860static const struct snd_kcontrol_new rt5670_hpl_mix[] = {
861 SOC_DAPM_SINGLE("DAC L1 Switch", RT5670_HPO_MIXER,
862 RT5670_M_DACL1_HML_SFT, 1, 1),
863 SOC_DAPM_SINGLE("INL1 Switch", RT5670_HPO_MIXER,
864 RT5670_M_INL1_HML_SFT, 1, 1),
865};
866
867static const struct snd_kcontrol_new rt5670_hpr_mix[] = {
868 SOC_DAPM_SINGLE("DAC R1 Switch", RT5670_HPO_MIXER,
869 RT5670_M_DACR1_HMR_SFT, 1, 1),
870 SOC_DAPM_SINGLE("INR1 Switch", RT5670_HPO_MIXER,
871 RT5670_M_INR1_HMR_SFT, 1, 1),
872};
873
874static const struct snd_kcontrol_new lout_l_enable_control =
875 SOC_DAPM_SINGLE_AUTODISABLE("Switch", RT5670_LOUT1,
876 RT5670_L_MUTE_SFT, 1, 1);
877
878static const struct snd_kcontrol_new lout_r_enable_control =
879 SOC_DAPM_SINGLE_AUTODISABLE("Switch", RT5670_LOUT1,
880 RT5670_R_MUTE_SFT, 1, 1);
881
882/* DAC1 L/R source */ /* MX-29 [9:8] [11:10] */
883static const char * const rt5670_dac1_src[] = {
884 "IF1 DAC", "IF2 DAC"
885};
886
Mark Brown01957572014-08-01 17:30:38 +0100887static SOC_ENUM_SINGLE_DECL(rt5670_dac1l_enum, RT5670_AD_DA_MIXER,
Bard Liao5e8351d2014-06-30 20:31:13 +0800888 RT5670_DAC1_L_SEL_SFT, rt5670_dac1_src);
889
890static const struct snd_kcontrol_new rt5670_dac1l_mux =
891 SOC_DAPM_ENUM("DAC1 L source", rt5670_dac1l_enum);
892
Mark Brown01957572014-08-01 17:30:38 +0100893static SOC_ENUM_SINGLE_DECL(rt5670_dac1r_enum, RT5670_AD_DA_MIXER,
Bard Liao5e8351d2014-06-30 20:31:13 +0800894 RT5670_DAC1_R_SEL_SFT, rt5670_dac1_src);
895
896static const struct snd_kcontrol_new rt5670_dac1r_mux =
897 SOC_DAPM_ENUM("DAC1 R source", rt5670_dac1r_enum);
898
899/*DAC2 L/R source*/ /* MX-1B [6:4] [2:0] */
900/* TODO Use SOC_VALUE_ENUM_SINGLE_DECL */
901static const char * const rt5670_dac12_src[] = {
902 "IF1 DAC", "IF2 DAC", "IF3 DAC", "TxDC DAC",
903 "Bass", "VAD_ADC", "IF4 DAC"
904};
905
Mark Brown01957572014-08-01 17:30:38 +0100906static SOC_ENUM_SINGLE_DECL(rt5670_dac2l_enum, RT5670_DAC_CTRL,
Bard Liao5e8351d2014-06-30 20:31:13 +0800907 RT5670_DAC2_L_SEL_SFT, rt5670_dac12_src);
908
909static const struct snd_kcontrol_new rt5670_dac_l2_mux =
910 SOC_DAPM_ENUM("DAC2 L source", rt5670_dac2l_enum);
911
912static const char * const rt5670_dacr2_src[] = {
913 "IF1 DAC", "IF2 DAC", "IF3 DAC", "TxDC DAC", "TxDP ADC", "IF4 DAC"
914};
915
Mark Brown01957572014-08-01 17:30:38 +0100916static SOC_ENUM_SINGLE_DECL(rt5670_dac2r_enum, RT5670_DAC_CTRL,
Bard Liao5e8351d2014-06-30 20:31:13 +0800917 RT5670_DAC2_R_SEL_SFT, rt5670_dacr2_src);
918
919static const struct snd_kcontrol_new rt5670_dac_r2_mux =
920 SOC_DAPM_ENUM("DAC2 R source", rt5670_dac2r_enum);
921
922/*RxDP source*/ /* MX-2D [15:13] */
923static const char * const rt5670_rxdp_src[] = {
924 "IF2 DAC", "IF1 DAC", "STO1 ADC Mixer", "STO2 ADC Mixer",
925 "Mono ADC Mixer L", "Mono ADC Mixer R", "DAC1"
926};
927
Mark Brown01957572014-08-01 17:30:38 +0100928static SOC_ENUM_SINGLE_DECL(rt5670_rxdp_enum, RT5670_DSP_PATH1,
Bard Liao5e8351d2014-06-30 20:31:13 +0800929 RT5670_RXDP_SEL_SFT, rt5670_rxdp_src);
930
931static const struct snd_kcontrol_new rt5670_rxdp_mux =
932 SOC_DAPM_ENUM("DAC2 L source", rt5670_rxdp_enum);
933
934/* MX-2D [1] [0] */
935static const char * const rt5670_dsp_bypass_src[] = {
936 "DSP", "Bypass"
937};
938
Mark Brown01957572014-08-01 17:30:38 +0100939static SOC_ENUM_SINGLE_DECL(rt5670_dsp_ul_enum, RT5670_DSP_PATH1,
Bard Liao5e8351d2014-06-30 20:31:13 +0800940 RT5670_DSP_UL_SFT, rt5670_dsp_bypass_src);
941
942static const struct snd_kcontrol_new rt5670_dsp_ul_mux =
943 SOC_DAPM_ENUM("DSP UL source", rt5670_dsp_ul_enum);
944
Mark Brown01957572014-08-01 17:30:38 +0100945static SOC_ENUM_SINGLE_DECL(rt5670_dsp_dl_enum, RT5670_DSP_PATH1,
Bard Liao5e8351d2014-06-30 20:31:13 +0800946 RT5670_DSP_DL_SFT, rt5670_dsp_bypass_src);
947
948static const struct snd_kcontrol_new rt5670_dsp_dl_mux =
949 SOC_DAPM_ENUM("DSP DL source", rt5670_dsp_dl_enum);
950
951/* Stereo2 ADC source */
952/* MX-26 [15] */
953static const char * const rt5670_stereo2_adc_lr_src[] = {
954 "L", "LR"
955};
956
Mark Brown01957572014-08-01 17:30:38 +0100957static SOC_ENUM_SINGLE_DECL(rt5670_stereo2_adc_lr_enum, RT5670_STO2_ADC_MIXER,
Bard Liao5e8351d2014-06-30 20:31:13 +0800958 RT5670_STO2_ADC_SRC_SFT, rt5670_stereo2_adc_lr_src);
959
960static const struct snd_kcontrol_new rt5670_sto2_adc_lr_mux =
961 SOC_DAPM_ENUM("Stereo2 ADC LR source", rt5670_stereo2_adc_lr_enum);
962
963/* Stereo1 ADC source */
964/* MX-27 MX-26 [12] */
965static const char * const rt5670_stereo_adc1_src[] = {
966 "DAC MIX", "ADC"
967};
968
Mark Brown01957572014-08-01 17:30:38 +0100969static SOC_ENUM_SINGLE_DECL(rt5670_stereo1_adc1_enum, RT5670_STO1_ADC_MIXER,
Bard Liao5e8351d2014-06-30 20:31:13 +0800970 RT5670_ADC_1_SRC_SFT, rt5670_stereo_adc1_src);
971
972static const struct snd_kcontrol_new rt5670_sto_adc_l1_mux =
973 SOC_DAPM_ENUM("Stereo1 ADC L1 source", rt5670_stereo1_adc1_enum);
974
975static const struct snd_kcontrol_new rt5670_sto_adc_r1_mux =
976 SOC_DAPM_ENUM("Stereo1 ADC R1 source", rt5670_stereo1_adc1_enum);
977
Mark Brown01957572014-08-01 17:30:38 +0100978static SOC_ENUM_SINGLE_DECL(rt5670_stereo2_adc1_enum, RT5670_STO2_ADC_MIXER,
Bard Liao5e8351d2014-06-30 20:31:13 +0800979 RT5670_ADC_1_SRC_SFT, rt5670_stereo_adc1_src);
980
981static const struct snd_kcontrol_new rt5670_sto2_adc_l1_mux =
982 SOC_DAPM_ENUM("Stereo2 ADC L1 source", rt5670_stereo2_adc1_enum);
983
984static const struct snd_kcontrol_new rt5670_sto2_adc_r1_mux =
985 SOC_DAPM_ENUM("Stereo2 ADC R1 source", rt5670_stereo2_adc1_enum);
986
987/* MX-27 MX-26 [11] */
988static const char * const rt5670_stereo_adc2_src[] = {
989 "DAC MIX", "DMIC"
990};
991
Mark Brown01957572014-08-01 17:30:38 +0100992static SOC_ENUM_SINGLE_DECL(rt5670_stereo1_adc2_enum, RT5670_STO1_ADC_MIXER,
Bard Liao5e8351d2014-06-30 20:31:13 +0800993 RT5670_ADC_2_SRC_SFT, rt5670_stereo_adc2_src);
994
995static const struct snd_kcontrol_new rt5670_sto_adc_l2_mux =
996 SOC_DAPM_ENUM("Stereo1 ADC L2 source", rt5670_stereo1_adc2_enum);
997
998static const struct snd_kcontrol_new rt5670_sto_adc_r2_mux =
999 SOC_DAPM_ENUM("Stereo1 ADC R2 source", rt5670_stereo1_adc2_enum);
1000
Mark Brown01957572014-08-01 17:30:38 +01001001static SOC_ENUM_SINGLE_DECL(rt5670_stereo2_adc2_enum, RT5670_STO2_ADC_MIXER,
Bard Liao5e8351d2014-06-30 20:31:13 +08001002 RT5670_ADC_2_SRC_SFT, rt5670_stereo_adc2_src);
1003
1004static const struct snd_kcontrol_new rt5670_sto2_adc_l2_mux =
1005 SOC_DAPM_ENUM("Stereo2 ADC L2 source", rt5670_stereo2_adc2_enum);
1006
1007static const struct snd_kcontrol_new rt5670_sto2_adc_r2_mux =
1008 SOC_DAPM_ENUM("Stereo2 ADC R2 source", rt5670_stereo2_adc2_enum);
1009
1010/* MX-27 MX26 [10] */
1011static const char * const rt5670_stereo_adc_src[] = {
1012 "ADC1L ADC2R", "ADC3"
1013};
1014
Mark Brown01957572014-08-01 17:30:38 +01001015static SOC_ENUM_SINGLE_DECL(rt5670_stereo1_adc_enum, RT5670_STO1_ADC_MIXER,
Bard Liao5e8351d2014-06-30 20:31:13 +08001016 RT5670_ADC_SRC_SFT, rt5670_stereo_adc_src);
1017
1018static const struct snd_kcontrol_new rt5670_sto_adc_mux =
1019 SOC_DAPM_ENUM("Stereo1 ADC source", rt5670_stereo1_adc_enum);
1020
Mark Brown01957572014-08-01 17:30:38 +01001021static SOC_ENUM_SINGLE_DECL(rt5670_stereo2_adc_enum, RT5670_STO2_ADC_MIXER,
Bard Liao5e8351d2014-06-30 20:31:13 +08001022 RT5670_ADC_SRC_SFT, rt5670_stereo_adc_src);
1023
1024static const struct snd_kcontrol_new rt5670_sto2_adc_mux =
1025 SOC_DAPM_ENUM("Stereo2 ADC source", rt5670_stereo2_adc_enum);
1026
1027/* MX-27 MX-26 [9:8] */
1028static const char * const rt5670_stereo_dmic_src[] = {
1029 "DMIC1", "DMIC2", "DMIC3"
1030};
1031
Mark Brown01957572014-08-01 17:30:38 +01001032static SOC_ENUM_SINGLE_DECL(rt5670_stereo1_dmic_enum, RT5670_STO1_ADC_MIXER,
Bard Liao5e8351d2014-06-30 20:31:13 +08001033 RT5670_DMIC_SRC_SFT, rt5670_stereo_dmic_src);
1034
1035static const struct snd_kcontrol_new rt5670_sto1_dmic_mux =
1036 SOC_DAPM_ENUM("Stereo1 DMIC source", rt5670_stereo1_dmic_enum);
1037
Mark Brown01957572014-08-01 17:30:38 +01001038static SOC_ENUM_SINGLE_DECL(rt5670_stereo2_dmic_enum, RT5670_STO2_ADC_MIXER,
Bard Liao5e8351d2014-06-30 20:31:13 +08001039 RT5670_DMIC_SRC_SFT, rt5670_stereo_dmic_src);
1040
1041static const struct snd_kcontrol_new rt5670_sto2_dmic_mux =
1042 SOC_DAPM_ENUM("Stereo2 DMIC source", rt5670_stereo2_dmic_enum);
1043
1044/* MX-27 [0] */
1045static const char * const rt5670_stereo_dmic3_src[] = {
1046 "DMIC3", "PDM ADC"
1047};
1048
Mark Brown01957572014-08-01 17:30:38 +01001049static SOC_ENUM_SINGLE_DECL(rt5670_stereo_dmic3_enum, RT5670_STO1_ADC_MIXER,
Bard Liao5e8351d2014-06-30 20:31:13 +08001050 RT5670_DMIC3_SRC_SFT, rt5670_stereo_dmic3_src);
1051
1052static const struct snd_kcontrol_new rt5670_sto_dmic3_mux =
1053 SOC_DAPM_ENUM("Stereo DMIC3 source", rt5670_stereo_dmic3_enum);
1054
1055/* Mono ADC source */
1056/* MX-28 [12] */
1057static const char * const rt5670_mono_adc_l1_src[] = {
1058 "Mono DAC MIXL", "ADC1"
1059};
1060
Mark Brown01957572014-08-01 17:30:38 +01001061static SOC_ENUM_SINGLE_DECL(rt5670_mono_adc_l1_enum, RT5670_MONO_ADC_MIXER,
Bard Liao5e8351d2014-06-30 20:31:13 +08001062 RT5670_MONO_ADC_L1_SRC_SFT, rt5670_mono_adc_l1_src);
1063
1064static const struct snd_kcontrol_new rt5670_mono_adc_l1_mux =
1065 SOC_DAPM_ENUM("Mono ADC1 left source", rt5670_mono_adc_l1_enum);
1066/* MX-28 [11] */
1067static const char * const rt5670_mono_adc_l2_src[] = {
1068 "Mono DAC MIXL", "DMIC"
1069};
1070
Mark Brown01957572014-08-01 17:30:38 +01001071static SOC_ENUM_SINGLE_DECL(rt5670_mono_adc_l2_enum, RT5670_MONO_ADC_MIXER,
Bard Liao5e8351d2014-06-30 20:31:13 +08001072 RT5670_MONO_ADC_L2_SRC_SFT, rt5670_mono_adc_l2_src);
1073
1074static const struct snd_kcontrol_new rt5670_mono_adc_l2_mux =
1075 SOC_DAPM_ENUM("Mono ADC2 left source", rt5670_mono_adc_l2_enum);
1076
1077/* MX-28 [9:8] */
1078static const char * const rt5670_mono_dmic_src[] = {
1079 "DMIC1", "DMIC2", "DMIC3"
1080};
1081
Mark Brown01957572014-08-01 17:30:38 +01001082static SOC_ENUM_SINGLE_DECL(rt5670_mono_dmic_l_enum, RT5670_MONO_ADC_MIXER,
Bard Liao5e8351d2014-06-30 20:31:13 +08001083 RT5670_MONO_DMIC_L_SRC_SFT, rt5670_mono_dmic_src);
1084
1085static const struct snd_kcontrol_new rt5670_mono_dmic_l_mux =
1086 SOC_DAPM_ENUM("Mono DMIC left source", rt5670_mono_dmic_l_enum);
1087/* MX-28 [1:0] */
Mark Brown01957572014-08-01 17:30:38 +01001088static SOC_ENUM_SINGLE_DECL(rt5670_mono_dmic_r_enum, RT5670_MONO_ADC_MIXER,
Bard Liao5e8351d2014-06-30 20:31:13 +08001089 RT5670_MONO_DMIC_R_SRC_SFT, rt5670_mono_dmic_src);
1090
1091static const struct snd_kcontrol_new rt5670_mono_dmic_r_mux =
1092 SOC_DAPM_ENUM("Mono DMIC Right source", rt5670_mono_dmic_r_enum);
1093/* MX-28 [4] */
1094static const char * const rt5670_mono_adc_r1_src[] = {
1095 "Mono DAC MIXR", "ADC2"
1096};
1097
Mark Brown01957572014-08-01 17:30:38 +01001098static SOC_ENUM_SINGLE_DECL(rt5670_mono_adc_r1_enum, RT5670_MONO_ADC_MIXER,
Bard Liao5e8351d2014-06-30 20:31:13 +08001099 RT5670_MONO_ADC_R1_SRC_SFT, rt5670_mono_adc_r1_src);
1100
1101static const struct snd_kcontrol_new rt5670_mono_adc_r1_mux =
1102 SOC_DAPM_ENUM("Mono ADC1 right source", rt5670_mono_adc_r1_enum);
1103/* MX-28 [3] */
1104static const char * const rt5670_mono_adc_r2_src[] = {
1105 "Mono DAC MIXR", "DMIC"
1106};
1107
Mark Brown01957572014-08-01 17:30:38 +01001108static SOC_ENUM_SINGLE_DECL(rt5670_mono_adc_r2_enum, RT5670_MONO_ADC_MIXER,
Bard Liao5e8351d2014-06-30 20:31:13 +08001109 RT5670_MONO_ADC_R2_SRC_SFT, rt5670_mono_adc_r2_src);
1110
1111static const struct snd_kcontrol_new rt5670_mono_adc_r2_mux =
1112 SOC_DAPM_ENUM("Mono ADC2 right source", rt5670_mono_adc_r2_enum);
1113
1114/* MX-2D [3:2] */
1115static const char * const rt5670_txdp_slot_src[] = {
1116 "Slot 0-1", "Slot 2-3", "Slot 4-5", "Slot 6-7"
1117};
1118
Mark Brown01957572014-08-01 17:30:38 +01001119static SOC_ENUM_SINGLE_DECL(rt5670_txdp_slot_enum, RT5670_DSP_PATH1,
Bard Liao5e8351d2014-06-30 20:31:13 +08001120 RT5670_TXDP_SLOT_SEL_SFT, rt5670_txdp_slot_src);
1121
1122static const struct snd_kcontrol_new rt5670_txdp_slot_mux =
1123 SOC_DAPM_ENUM("TxDP Slot source", rt5670_txdp_slot_enum);
1124
1125/* MX-2F [15] */
1126static const char * const rt5670_if1_adc2_in_src[] = {
1127 "IF_ADC2", "VAD_ADC"
1128};
1129
Mark Brown01957572014-08-01 17:30:38 +01001130static SOC_ENUM_SINGLE_DECL(rt5670_if1_adc2_in_enum, RT5670_DIG_INF1_DATA,
Bard Liao5e8351d2014-06-30 20:31:13 +08001131 RT5670_IF1_ADC2_IN_SFT, rt5670_if1_adc2_in_src);
1132
1133static const struct snd_kcontrol_new rt5670_if1_adc2_in_mux =
1134 SOC_DAPM_ENUM("IF1 ADC2 IN source", rt5670_if1_adc2_in_enum);
1135
1136/* MX-2F [14:12] */
1137static const char * const rt5670_if2_adc_in_src[] = {
1138 "IF_ADC1", "IF_ADC2", "IF_ADC3", "TxDC_DAC", "TxDP_ADC", "VAD_ADC"
1139};
1140
Mark Brown01957572014-08-01 17:30:38 +01001141static SOC_ENUM_SINGLE_DECL(rt5670_if2_adc_in_enum, RT5670_DIG_INF1_DATA,
Bard Liao5e8351d2014-06-30 20:31:13 +08001142 RT5670_IF2_ADC_IN_SFT, rt5670_if2_adc_in_src);
1143
1144static const struct snd_kcontrol_new rt5670_if2_adc_in_mux =
1145 SOC_DAPM_ENUM("IF2 ADC IN source", rt5670_if2_adc_in_enum);
1146
1147/* MX-30 [5:4] */
1148static const char * const rt5670_if4_adc_in_src[] = {
1149 "IF_ADC1", "IF_ADC2", "IF_ADC3"
1150};
1151
Mark Brown01957572014-08-01 17:30:38 +01001152static SOC_ENUM_SINGLE_DECL(rt5670_if4_adc_in_enum, RT5670_DIG_INF2_DATA,
Bard Liao5e8351d2014-06-30 20:31:13 +08001153 RT5670_IF4_ADC_IN_SFT, rt5670_if4_adc_in_src);
1154
1155static const struct snd_kcontrol_new rt5670_if4_adc_in_mux =
1156 SOC_DAPM_ENUM("IF4 ADC IN source", rt5670_if4_adc_in_enum);
1157
1158/* MX-31 [15] [13] [11] [9] */
1159static const char * const rt5670_pdm_src[] = {
1160 "Mono DAC", "Stereo DAC"
1161};
1162
Mark Brown01957572014-08-01 17:30:38 +01001163static SOC_ENUM_SINGLE_DECL(rt5670_pdm1_l_enum, RT5670_PDM_OUT_CTRL,
Bard Liao5e8351d2014-06-30 20:31:13 +08001164 RT5670_PDM1_L_SFT, rt5670_pdm_src);
1165
1166static const struct snd_kcontrol_new rt5670_pdm1_l_mux =
1167 SOC_DAPM_ENUM("PDM1 L source", rt5670_pdm1_l_enum);
1168
Mark Brown01957572014-08-01 17:30:38 +01001169static SOC_ENUM_SINGLE_DECL(rt5670_pdm1_r_enum, RT5670_PDM_OUT_CTRL,
Bard Liao5e8351d2014-06-30 20:31:13 +08001170 RT5670_PDM1_R_SFT, rt5670_pdm_src);
1171
1172static const struct snd_kcontrol_new rt5670_pdm1_r_mux =
1173 SOC_DAPM_ENUM("PDM1 R source", rt5670_pdm1_r_enum);
1174
Mark Brown01957572014-08-01 17:30:38 +01001175static SOC_ENUM_SINGLE_DECL(rt5670_pdm2_l_enum, RT5670_PDM_OUT_CTRL,
Bard Liao5e8351d2014-06-30 20:31:13 +08001176 RT5670_PDM2_L_SFT, rt5670_pdm_src);
1177
1178static const struct snd_kcontrol_new rt5670_pdm2_l_mux =
1179 SOC_DAPM_ENUM("PDM2 L source", rt5670_pdm2_l_enum);
1180
Mark Brown01957572014-08-01 17:30:38 +01001181static SOC_ENUM_SINGLE_DECL(rt5670_pdm2_r_enum, RT5670_PDM_OUT_CTRL,
Bard Liao5e8351d2014-06-30 20:31:13 +08001182 RT5670_PDM2_R_SFT, rt5670_pdm_src);
1183
1184static const struct snd_kcontrol_new rt5670_pdm2_r_mux =
1185 SOC_DAPM_ENUM("PDM2 R source", rt5670_pdm2_r_enum);
1186
1187/* MX-FA [12] */
1188static const char * const rt5670_if1_adc1_in1_src[] = {
1189 "IF_ADC1", "IF1_ADC3"
1190};
1191
Mark Brown01957572014-08-01 17:30:38 +01001192static SOC_ENUM_SINGLE_DECL(rt5670_if1_adc1_in1_enum, RT5670_DIG_MISC,
Bard Liao5e8351d2014-06-30 20:31:13 +08001193 RT5670_IF1_ADC1_IN1_SFT, rt5670_if1_adc1_in1_src);
1194
1195static const struct snd_kcontrol_new rt5670_if1_adc1_in1_mux =
1196 SOC_DAPM_ENUM("IF1 ADC1 IN1 source", rt5670_if1_adc1_in1_enum);
1197
1198/* MX-FA [11] */
1199static const char * const rt5670_if1_adc1_in2_src[] = {
1200 "IF1_ADC1_IN1", "IF1_ADC4"
1201};
1202
Mark Brown01957572014-08-01 17:30:38 +01001203static SOC_ENUM_SINGLE_DECL(rt5670_if1_adc1_in2_enum, RT5670_DIG_MISC,
Bard Liao5e8351d2014-06-30 20:31:13 +08001204 RT5670_IF1_ADC1_IN2_SFT, rt5670_if1_adc1_in2_src);
1205
1206static const struct snd_kcontrol_new rt5670_if1_adc1_in2_mux =
1207 SOC_DAPM_ENUM("IF1 ADC1 IN2 source", rt5670_if1_adc1_in2_enum);
1208
1209/* MX-FA [10] */
1210static const char * const rt5670_if1_adc2_in1_src[] = {
1211 "IF1_ADC2_IN", "IF1_ADC4"
1212};
1213
Mark Brown01957572014-08-01 17:30:38 +01001214static SOC_ENUM_SINGLE_DECL(rt5670_if1_adc2_in1_enum, RT5670_DIG_MISC,
Bard Liao5e8351d2014-06-30 20:31:13 +08001215 RT5670_IF1_ADC2_IN1_SFT, rt5670_if1_adc2_in1_src);
1216
1217static const struct snd_kcontrol_new rt5670_if1_adc2_in1_mux =
1218 SOC_DAPM_ENUM("IF1 ADC2 IN1 source", rt5670_if1_adc2_in1_enum);
1219
1220/* MX-9D [9:8] */
1221static const char * const rt5670_vad_adc_src[] = {
1222 "Sto1 ADC L", "Mono ADC L", "Mono ADC R", "Sto2 ADC L"
1223};
1224
Mark Brown01957572014-08-01 17:30:38 +01001225static SOC_ENUM_SINGLE_DECL(rt5670_vad_adc_enum, RT5670_VAD_CTRL4,
Bard Liao5e8351d2014-06-30 20:31:13 +08001226 RT5670_VAD_SEL_SFT, rt5670_vad_adc_src);
1227
1228static const struct snd_kcontrol_new rt5670_vad_adc_mux =
1229 SOC_DAPM_ENUM("VAD ADC source", rt5670_vad_adc_enum);
1230
1231static int rt5670_hp_power_event(struct snd_soc_dapm_widget *w,
1232 struct snd_kcontrol *kcontrol, int event)
1233{
1234 struct snd_soc_codec *codec = w->codec;
1235 struct rt5670_priv *rt5670 = snd_soc_codec_get_drvdata(codec);
1236
1237 switch (event) {
1238 case SND_SOC_DAPM_POST_PMU:
1239 regmap_update_bits(rt5670->regmap, RT5670_CHARGE_PUMP,
1240 RT5670_PM_HP_MASK, RT5670_PM_HP_HV);
1241 regmap_update_bits(rt5670->regmap, RT5670_GEN_CTRL2,
1242 0x0400, 0x0400);
1243 /* headphone amp power on */
1244 regmap_update_bits(rt5670->regmap, RT5670_PWR_ANLG1,
1245 RT5670_PWR_HA | RT5670_PWR_FV1 |
1246 RT5670_PWR_FV2, RT5670_PWR_HA |
1247 RT5670_PWR_FV1 | RT5670_PWR_FV2);
1248 /* depop parameters */
1249 regmap_write(rt5670->regmap, RT5670_DEPOP_M2, 0x3100);
1250 regmap_write(rt5670->regmap, RT5670_DEPOP_M1, 0x8009);
1251 regmap_write(rt5670->regmap, RT5670_PR_BASE +
1252 RT5670_HP_DCC_INT1, 0x9f00);
1253 mdelay(20);
1254 regmap_write(rt5670->regmap, RT5670_DEPOP_M1, 0x8019);
1255 break;
1256 case SND_SOC_DAPM_PRE_PMD:
1257 regmap_write(rt5670->regmap, RT5670_DEPOP_M1, 0x0004);
1258 msleep(30);
1259 break;
1260 default:
1261 return 0;
1262 }
1263
1264 return 0;
1265}
1266
1267static int rt5670_hp_event(struct snd_soc_dapm_widget *w,
1268 struct snd_kcontrol *kcontrol, int event)
1269{
1270 struct snd_soc_codec *codec = w->codec;
1271 struct rt5670_priv *rt5670 = snd_soc_codec_get_drvdata(codec);
1272
1273 switch (event) {
1274 case SND_SOC_DAPM_POST_PMU:
1275 /* headphone unmute sequence */
1276 regmap_write(rt5670->regmap, RT5670_PR_BASE +
1277 RT5670_MAMP_INT_REG2, 0xb400);
1278 regmap_write(rt5670->regmap, RT5670_DEPOP_M3, 0x0772);
1279 regmap_write(rt5670->regmap, RT5670_DEPOP_M1, 0x805d);
1280 regmap_write(rt5670->regmap, RT5670_DEPOP_M1, 0x831d);
1281 regmap_update_bits(rt5670->regmap, RT5670_GEN_CTRL2,
1282 0x0300, 0x0300);
1283 regmap_update_bits(rt5670->regmap, RT5670_HP_VOL,
1284 RT5670_L_MUTE | RT5670_R_MUTE, 0);
1285 msleep(80);
1286 regmap_write(rt5670->regmap, RT5670_DEPOP_M1, 0x8019);
1287 break;
1288
1289 case SND_SOC_DAPM_PRE_PMD:
1290 /* headphone mute sequence */
1291 regmap_write(rt5670->regmap, RT5670_PR_BASE +
1292 RT5670_MAMP_INT_REG2, 0xb400);
1293 regmap_write(rt5670->regmap, RT5670_DEPOP_M3, 0x0772);
1294 regmap_write(rt5670->regmap, RT5670_DEPOP_M1, 0x803d);
1295 mdelay(10);
1296 regmap_write(rt5670->regmap, RT5670_DEPOP_M1, 0x831d);
1297 mdelay(10);
1298 regmap_update_bits(rt5670->regmap, RT5670_HP_VOL,
1299 RT5670_L_MUTE | RT5670_R_MUTE,
1300 RT5670_L_MUTE | RT5670_R_MUTE);
1301 msleep(20);
1302 regmap_update_bits(rt5670->regmap,
1303 RT5670_GEN_CTRL2, 0x0300, 0x0);
1304 regmap_write(rt5670->regmap, RT5670_DEPOP_M1, 0x8019);
1305 regmap_write(rt5670->regmap, RT5670_DEPOP_M3, 0x0707);
1306 regmap_write(rt5670->regmap, RT5670_PR_BASE +
1307 RT5670_MAMP_INT_REG2, 0xfc00);
1308 break;
1309
1310 default:
1311 return 0;
1312 }
1313
1314 return 0;
1315}
1316
1317static int rt5670_bst1_event(struct snd_soc_dapm_widget *w,
1318 struct snd_kcontrol *kcontrol, int event)
1319{
1320 struct snd_soc_codec *codec = w->codec;
1321
1322 switch (event) {
1323 case SND_SOC_DAPM_POST_PMU:
1324 snd_soc_update_bits(codec, RT5670_PWR_ANLG2,
1325 RT5670_PWR_BST1_P, RT5670_PWR_BST1_P);
1326 break;
1327
1328 case SND_SOC_DAPM_PRE_PMD:
1329 snd_soc_update_bits(codec, RT5670_PWR_ANLG2,
1330 RT5670_PWR_BST1_P, 0);
1331 break;
1332
1333 default:
1334 return 0;
1335 }
1336
1337 return 0;
1338}
1339
1340static int rt5670_bst2_event(struct snd_soc_dapm_widget *w,
1341 struct snd_kcontrol *kcontrol, int event)
1342{
1343 struct snd_soc_codec *codec = w->codec;
1344
1345 switch (event) {
1346 case SND_SOC_DAPM_POST_PMU:
1347 snd_soc_update_bits(codec, RT5670_PWR_ANLG2,
1348 RT5670_PWR_BST2_P, RT5670_PWR_BST2_P);
1349 break;
1350
1351 case SND_SOC_DAPM_PRE_PMD:
1352 snd_soc_update_bits(codec, RT5670_PWR_ANLG2,
1353 RT5670_PWR_BST2_P, 0);
1354 break;
1355
1356 default:
1357 return 0;
1358 }
1359
1360 return 0;
1361}
1362
1363static const struct snd_soc_dapm_widget rt5670_dapm_widgets[] = {
1364 SND_SOC_DAPM_SUPPLY("PLL1", RT5670_PWR_ANLG2,
1365 RT5670_PWR_PLL_BIT, 0, NULL, 0),
1366 SND_SOC_DAPM_SUPPLY("I2S DSP", RT5670_PWR_DIG2,
1367 RT5670_PWR_I2S_DSP_BIT, 0, NULL, 0),
1368 SND_SOC_DAPM_SUPPLY("Mic Det Power", RT5670_PWR_VOL,
1369 RT5670_PWR_MIC_DET_BIT, 0, NULL, 0),
1370
1371 /* ASRC */
1372 SND_SOC_DAPM_SUPPLY_S("I2S1 ASRC", 1, RT5670_ASRC_1,
1373 11, 0, NULL, 0),
1374 SND_SOC_DAPM_SUPPLY_S("I2S2 ASRC", 1, RT5670_ASRC_1,
1375 12, 0, NULL, 0),
1376 SND_SOC_DAPM_SUPPLY_S("DAC STO ASRC", 1, RT5670_ASRC_1,
1377 10, 0, NULL, 0),
1378 SND_SOC_DAPM_SUPPLY_S("DAC MONO L ASRC", 1, RT5670_ASRC_1,
1379 9, 0, NULL, 0),
1380 SND_SOC_DAPM_SUPPLY_S("DAC MONO R ASRC", 1, RT5670_ASRC_1,
1381 8, 0, NULL, 0),
Bard Liaoff4541c2014-11-17 15:27:22 +08001382 SND_SOC_DAPM_SUPPLY_S("DMIC STO1 ASRC", 1, RT5670_ASRC_1,
1383 7, 0, NULL, 0),
1384 SND_SOC_DAPM_SUPPLY_S("DMIC STO2 ASRC", 1, RT5670_ASRC_1,
1385 6, 0, NULL, 0),
1386 SND_SOC_DAPM_SUPPLY_S("DMIC MONO L ASRC", 1, RT5670_ASRC_1,
1387 5, 0, NULL, 0),
1388 SND_SOC_DAPM_SUPPLY_S("DMIC MONO R ASRC", 1, RT5670_ASRC_1,
1389 4, 0, NULL, 0),
Bard Liao5e8351d2014-06-30 20:31:13 +08001390 SND_SOC_DAPM_SUPPLY_S("ADC STO1 ASRC", 1, RT5670_ASRC_1,
1391 3, 0, NULL, 0),
1392 SND_SOC_DAPM_SUPPLY_S("ADC STO2 ASRC", 1, RT5670_ASRC_1,
1393 2, 0, NULL, 0),
1394 SND_SOC_DAPM_SUPPLY_S("ADC MONO L ASRC", 1, RT5670_ASRC_1,
1395 1, 0, NULL, 0),
1396 SND_SOC_DAPM_SUPPLY_S("ADC MONO R ASRC", 1, RT5670_ASRC_1,
1397 0, 0, NULL, 0),
1398
1399 /* Input Side */
1400 /* micbias */
1401 SND_SOC_DAPM_SUPPLY("MICBIAS1", RT5670_PWR_ANLG2,
1402 RT5670_PWR_MB1_BIT, 0, NULL, 0),
1403
1404 /* Input Lines */
1405 SND_SOC_DAPM_INPUT("DMIC L1"),
1406 SND_SOC_DAPM_INPUT("DMIC R1"),
1407 SND_SOC_DAPM_INPUT("DMIC L2"),
1408 SND_SOC_DAPM_INPUT("DMIC R2"),
1409 SND_SOC_DAPM_INPUT("DMIC L3"),
1410 SND_SOC_DAPM_INPUT("DMIC R3"),
1411
1412 SND_SOC_DAPM_INPUT("IN1P"),
1413 SND_SOC_DAPM_INPUT("IN1N"),
1414 SND_SOC_DAPM_INPUT("IN2P"),
1415 SND_SOC_DAPM_INPUT("IN2N"),
1416
1417 SND_SOC_DAPM_PGA("DMIC1", SND_SOC_NOPM, 0, 0, NULL, 0),
1418 SND_SOC_DAPM_PGA("DMIC2", SND_SOC_NOPM, 0, 0, NULL, 0),
1419 SND_SOC_DAPM_PGA("DMIC3", SND_SOC_NOPM, 0, 0, NULL, 0),
1420
1421 SND_SOC_DAPM_SUPPLY("DMIC CLK", SND_SOC_NOPM, 0, 0,
1422 set_dmic_clk, SND_SOC_DAPM_PRE_PMU),
1423 SND_SOC_DAPM_SUPPLY("DMIC1 Power", RT5670_DMIC_CTRL1,
1424 RT5670_DMIC_1_EN_SFT, 0, NULL, 0),
1425 SND_SOC_DAPM_SUPPLY("DMIC2 Power", RT5670_DMIC_CTRL1,
1426 RT5670_DMIC_2_EN_SFT, 0, NULL, 0),
1427 SND_SOC_DAPM_SUPPLY("DMIC3 Power", RT5670_DMIC_CTRL1,
1428 RT5670_DMIC_3_EN_SFT, 0, NULL, 0),
1429 /* Boost */
1430 SND_SOC_DAPM_PGA_E("BST1", RT5670_PWR_ANLG2, RT5670_PWR_BST1_BIT,
1431 0, NULL, 0, rt5670_bst1_event,
1432 SND_SOC_DAPM_PRE_PMD | SND_SOC_DAPM_POST_PMU),
1433 SND_SOC_DAPM_PGA_E("BST2", RT5670_PWR_ANLG2, RT5670_PWR_BST2_BIT,
1434 0, NULL, 0, rt5670_bst2_event,
1435 SND_SOC_DAPM_PRE_PMD | SND_SOC_DAPM_POST_PMU),
1436 /* Input Volume */
1437 SND_SOC_DAPM_PGA("INL VOL", RT5670_PWR_VOL,
1438 RT5670_PWR_IN_L_BIT, 0, NULL, 0),
1439 SND_SOC_DAPM_PGA("INR VOL", RT5670_PWR_VOL,
1440 RT5670_PWR_IN_R_BIT, 0, NULL, 0),
1441
1442 /* REC Mixer */
1443 SND_SOC_DAPM_MIXER("RECMIXL", RT5670_PWR_MIXER, RT5670_PWR_RM_L_BIT, 0,
1444 rt5670_rec_l_mix, ARRAY_SIZE(rt5670_rec_l_mix)),
1445 SND_SOC_DAPM_MIXER("RECMIXR", RT5670_PWR_MIXER, RT5670_PWR_RM_R_BIT, 0,
1446 rt5670_rec_r_mix, ARRAY_SIZE(rt5670_rec_r_mix)),
1447 /* ADCs */
1448 SND_SOC_DAPM_ADC("ADC 1", NULL, SND_SOC_NOPM, 0, 0),
1449 SND_SOC_DAPM_ADC("ADC 2", NULL, SND_SOC_NOPM, 0, 0),
1450
1451 SND_SOC_DAPM_PGA("ADC 1_2", SND_SOC_NOPM, 0, 0, NULL, 0),
1452
1453 SND_SOC_DAPM_SUPPLY("ADC 1 power", RT5670_PWR_DIG1,
1454 RT5670_PWR_ADC_L_BIT, 0, NULL, 0),
1455 SND_SOC_DAPM_SUPPLY("ADC 2 power", RT5670_PWR_DIG1,
1456 RT5670_PWR_ADC_R_BIT, 0, NULL, 0),
1457 SND_SOC_DAPM_SUPPLY("ADC clock", RT5670_PR_BASE +
1458 RT5670_CHOP_DAC_ADC, 12, 0, NULL, 0),
1459 /* ADC Mux */
1460 SND_SOC_DAPM_MUX("Stereo1 DMIC Mux", SND_SOC_NOPM, 0, 0,
1461 &rt5670_sto1_dmic_mux),
1462 SND_SOC_DAPM_MUX("Stereo1 ADC L2 Mux", SND_SOC_NOPM, 0, 0,
1463 &rt5670_sto_adc_l2_mux),
1464 SND_SOC_DAPM_MUX("Stereo1 ADC R2 Mux", SND_SOC_NOPM, 0, 0,
1465 &rt5670_sto_adc_r2_mux),
1466 SND_SOC_DAPM_MUX("Stereo1 ADC L1 Mux", SND_SOC_NOPM, 0, 0,
1467 &rt5670_sto_adc_l1_mux),
1468 SND_SOC_DAPM_MUX("Stereo1 ADC R1 Mux", SND_SOC_NOPM, 0, 0,
1469 &rt5670_sto_adc_r1_mux),
1470 SND_SOC_DAPM_MUX("Stereo2 DMIC Mux", SND_SOC_NOPM, 0, 0,
1471 &rt5670_sto2_dmic_mux),
1472 SND_SOC_DAPM_MUX("Stereo2 ADC L2 Mux", SND_SOC_NOPM, 0, 0,
1473 &rt5670_sto2_adc_l2_mux),
1474 SND_SOC_DAPM_MUX("Stereo2 ADC R2 Mux", SND_SOC_NOPM, 0, 0,
1475 &rt5670_sto2_adc_r2_mux),
1476 SND_SOC_DAPM_MUX("Stereo2 ADC L1 Mux", SND_SOC_NOPM, 0, 0,
1477 &rt5670_sto2_adc_l1_mux),
1478 SND_SOC_DAPM_MUX("Stereo2 ADC R1 Mux", SND_SOC_NOPM, 0, 0,
1479 &rt5670_sto2_adc_r1_mux),
1480 SND_SOC_DAPM_MUX("Stereo2 ADC LR Mux", SND_SOC_NOPM, 0, 0,
1481 &rt5670_sto2_adc_lr_mux),
1482 SND_SOC_DAPM_MUX("Mono DMIC L Mux", SND_SOC_NOPM, 0, 0,
1483 &rt5670_mono_dmic_l_mux),
1484 SND_SOC_DAPM_MUX("Mono DMIC R Mux", SND_SOC_NOPM, 0, 0,
1485 &rt5670_mono_dmic_r_mux),
1486 SND_SOC_DAPM_MUX("Mono ADC L2 Mux", SND_SOC_NOPM, 0, 0,
1487 &rt5670_mono_adc_l2_mux),
1488 SND_SOC_DAPM_MUX("Mono ADC L1 Mux", SND_SOC_NOPM, 0, 0,
1489 &rt5670_mono_adc_l1_mux),
1490 SND_SOC_DAPM_MUX("Mono ADC R1 Mux", SND_SOC_NOPM, 0, 0,
1491 &rt5670_mono_adc_r1_mux),
1492 SND_SOC_DAPM_MUX("Mono ADC R2 Mux", SND_SOC_NOPM, 0, 0,
1493 &rt5670_mono_adc_r2_mux),
1494 /* ADC Mixer */
1495 SND_SOC_DAPM_SUPPLY("ADC Stereo1 Filter", RT5670_PWR_DIG2,
1496 RT5670_PWR_ADC_S1F_BIT, 0, NULL, 0),
1497 SND_SOC_DAPM_SUPPLY("ADC Stereo2 Filter", RT5670_PWR_DIG2,
1498 RT5670_PWR_ADC_S2F_BIT, 0, NULL, 0),
1499 SND_SOC_DAPM_MIXER("Sto1 ADC MIXL", RT5670_STO1_ADC_DIG_VOL,
1500 RT5670_L_MUTE_SFT, 1, rt5670_sto1_adc_l_mix,
1501 ARRAY_SIZE(rt5670_sto1_adc_l_mix)),
1502 SND_SOC_DAPM_MIXER("Sto1 ADC MIXR", RT5670_STO1_ADC_DIG_VOL,
1503 RT5670_R_MUTE_SFT, 1, rt5670_sto1_adc_r_mix,
1504 ARRAY_SIZE(rt5670_sto1_adc_r_mix)),
1505 SND_SOC_DAPM_MIXER("Sto2 ADC MIXL", SND_SOC_NOPM, 0, 0,
1506 rt5670_sto2_adc_l_mix,
1507 ARRAY_SIZE(rt5670_sto2_adc_l_mix)),
1508 SND_SOC_DAPM_MIXER("Sto2 ADC MIXR", SND_SOC_NOPM, 0, 0,
1509 rt5670_sto2_adc_r_mix,
1510 ARRAY_SIZE(rt5670_sto2_adc_r_mix)),
1511 SND_SOC_DAPM_SUPPLY("ADC Mono Left Filter", RT5670_PWR_DIG2,
1512 RT5670_PWR_ADC_MF_L_BIT, 0, NULL, 0),
1513 SND_SOC_DAPM_MIXER("Mono ADC MIXL", RT5670_MONO_ADC_DIG_VOL,
1514 RT5670_L_MUTE_SFT, 1, rt5670_mono_adc_l_mix,
1515 ARRAY_SIZE(rt5670_mono_adc_l_mix)),
1516 SND_SOC_DAPM_SUPPLY("ADC Mono Right Filter", RT5670_PWR_DIG2,
1517 RT5670_PWR_ADC_MF_R_BIT, 0, NULL, 0),
1518 SND_SOC_DAPM_MIXER("Mono ADC MIXR", RT5670_MONO_ADC_DIG_VOL,
1519 RT5670_R_MUTE_SFT, 1, rt5670_mono_adc_r_mix,
1520 ARRAY_SIZE(rt5670_mono_adc_r_mix)),
1521
1522 /* ADC PGA */
1523 SND_SOC_DAPM_PGA("Stereo1 ADC MIXL", SND_SOC_NOPM, 0, 0, NULL, 0),
1524 SND_SOC_DAPM_PGA("Stereo1 ADC MIXR", SND_SOC_NOPM, 0, 0, NULL, 0),
1525 SND_SOC_DAPM_PGA("Stereo2 ADC MIXL", SND_SOC_NOPM, 0, 0, NULL, 0),
1526 SND_SOC_DAPM_PGA("Stereo2 ADC MIXR", SND_SOC_NOPM, 0, 0, NULL, 0),
1527 SND_SOC_DAPM_PGA("Sto2 ADC LR MIX", SND_SOC_NOPM, 0, 0, NULL, 0),
1528 SND_SOC_DAPM_PGA("Stereo1 ADC MIX", SND_SOC_NOPM, 0, 0, NULL, 0),
1529 SND_SOC_DAPM_PGA("Stereo2 ADC MIX", SND_SOC_NOPM, 0, 0, NULL, 0),
1530 SND_SOC_DAPM_PGA("Mono ADC MIX", SND_SOC_NOPM, 0, 0, NULL, 0),
1531 SND_SOC_DAPM_PGA("VAD_ADC", SND_SOC_NOPM, 0, 0, NULL, 0),
1532 SND_SOC_DAPM_PGA("IF_ADC1", SND_SOC_NOPM, 0, 0, NULL, 0),
1533 SND_SOC_DAPM_PGA("IF_ADC2", SND_SOC_NOPM, 0, 0, NULL, 0),
1534 SND_SOC_DAPM_PGA("IF_ADC3", SND_SOC_NOPM, 0, 0, NULL, 0),
1535 SND_SOC_DAPM_PGA("IF1_ADC1", SND_SOC_NOPM, 0, 0, NULL, 0),
1536 SND_SOC_DAPM_PGA("IF1_ADC2", SND_SOC_NOPM, 0, 0, NULL, 0),
1537 SND_SOC_DAPM_PGA("IF1_ADC3", SND_SOC_NOPM, 0, 0, NULL, 0),
1538 SND_SOC_DAPM_PGA("IF1_ADC4", SND_SOC_NOPM, 0, 0, NULL, 0),
1539
1540 /* DSP */
1541 SND_SOC_DAPM_PGA("TxDP_ADC", SND_SOC_NOPM, 0, 0, NULL, 0),
1542 SND_SOC_DAPM_PGA("TxDP_ADC_L", SND_SOC_NOPM, 0, 0, NULL, 0),
1543 SND_SOC_DAPM_PGA("TxDP_ADC_R", SND_SOC_NOPM, 0, 0, NULL, 0),
1544 SND_SOC_DAPM_PGA("TxDC_DAC", SND_SOC_NOPM, 0, 0, NULL, 0),
1545
1546 SND_SOC_DAPM_MUX("TDM Data Mux", SND_SOC_NOPM, 0, 0,
1547 &rt5670_txdp_slot_mux),
1548
1549 SND_SOC_DAPM_MUX("DSP UL Mux", SND_SOC_NOPM, 0, 0,
1550 &rt5670_dsp_ul_mux),
1551 SND_SOC_DAPM_MUX("DSP DL Mux", SND_SOC_NOPM, 0, 0,
1552 &rt5670_dsp_dl_mux),
1553
1554 SND_SOC_DAPM_MUX("RxDP Mux", SND_SOC_NOPM, 0, 0,
1555 &rt5670_rxdp_mux),
1556
1557 /* IF2 Mux */
1558 SND_SOC_DAPM_MUX("IF2 ADC Mux", SND_SOC_NOPM, 0, 0,
1559 &rt5670_if2_adc_in_mux),
1560
1561 /* Digital Interface */
1562 SND_SOC_DAPM_SUPPLY("I2S1", RT5670_PWR_DIG1,
1563 RT5670_PWR_I2S1_BIT, 0, NULL, 0),
1564 SND_SOC_DAPM_PGA("IF1 DAC1", SND_SOC_NOPM, 0, 0, NULL, 0),
1565 SND_SOC_DAPM_PGA("IF1 DAC2", SND_SOC_NOPM, 0, 0, NULL, 0),
1566 SND_SOC_DAPM_PGA("IF1 DAC1 L", SND_SOC_NOPM, 0, 0, NULL, 0),
1567 SND_SOC_DAPM_PGA("IF1 DAC1 R", SND_SOC_NOPM, 0, 0, NULL, 0),
1568 SND_SOC_DAPM_PGA("IF1 DAC2 L", SND_SOC_NOPM, 0, 0, NULL, 0),
1569 SND_SOC_DAPM_PGA("IF1 DAC2 R", SND_SOC_NOPM, 0, 0, NULL, 0),
1570 SND_SOC_DAPM_PGA("IF1 ADC", SND_SOC_NOPM, 0, 0, NULL, 0),
1571 SND_SOC_DAPM_PGA("IF1 ADC L", SND_SOC_NOPM, 0, 0, NULL, 0),
1572 SND_SOC_DAPM_PGA("IF1 ADC R", SND_SOC_NOPM, 0, 0, NULL, 0),
1573 SND_SOC_DAPM_SUPPLY("I2S2", RT5670_PWR_DIG1,
1574 RT5670_PWR_I2S2_BIT, 0, NULL, 0),
1575 SND_SOC_DAPM_PGA("IF2 DAC", SND_SOC_NOPM, 0, 0, NULL, 0),
1576 SND_SOC_DAPM_PGA("IF2 DAC L", SND_SOC_NOPM, 0, 0, NULL, 0),
1577 SND_SOC_DAPM_PGA("IF2 DAC R", SND_SOC_NOPM, 0, 0, NULL, 0),
1578 SND_SOC_DAPM_PGA("IF2 ADC", SND_SOC_NOPM, 0, 0, NULL, 0),
1579 SND_SOC_DAPM_PGA("IF2 ADC L", SND_SOC_NOPM, 0, 0, NULL, 0),
1580 SND_SOC_DAPM_PGA("IF2 ADC R", SND_SOC_NOPM, 0, 0, NULL, 0),
1581
1582 /* Digital Interface Select */
1583 SND_SOC_DAPM_MUX("IF1 ADC1 IN1 Mux", SND_SOC_NOPM, 0, 0,
1584 &rt5670_if1_adc1_in1_mux),
1585 SND_SOC_DAPM_MUX("IF1 ADC1 IN2 Mux", SND_SOC_NOPM, 0, 0,
1586 &rt5670_if1_adc1_in2_mux),
1587 SND_SOC_DAPM_MUX("IF1 ADC2 IN Mux", SND_SOC_NOPM, 0, 0,
1588 &rt5670_if1_adc2_in_mux),
1589 SND_SOC_DAPM_MUX("IF1 ADC2 IN1 Mux", SND_SOC_NOPM, 0, 0,
1590 &rt5670_if1_adc2_in1_mux),
1591 SND_SOC_DAPM_MUX("VAD ADC Mux", SND_SOC_NOPM, 0, 0,
1592 &rt5670_vad_adc_mux),
1593
1594 /* Audio Interface */
1595 SND_SOC_DAPM_AIF_IN("AIF1RX", "AIF1 Playback", 0, SND_SOC_NOPM, 0, 0),
1596 SND_SOC_DAPM_AIF_OUT("AIF1TX", "AIF1 Capture", 0, SND_SOC_NOPM, 0, 0),
1597 SND_SOC_DAPM_AIF_IN("AIF2RX", "AIF2 Playback", 0, SND_SOC_NOPM, 0, 0),
1598 SND_SOC_DAPM_AIF_OUT("AIF2TX", "AIF2 Capture", 0,
1599 RT5670_GPIO_CTRL1, RT5670_I2S2_PIN_SFT, 1),
1600
1601 /* Audio DSP */
1602 SND_SOC_DAPM_PGA("Audio DSP", SND_SOC_NOPM, 0, 0, NULL, 0),
1603
1604 /* Output Side */
1605 /* DAC mixer before sound effect */
1606 SND_SOC_DAPM_MIXER("DAC1 MIXL", SND_SOC_NOPM, 0, 0,
1607 rt5670_dac_l_mix, ARRAY_SIZE(rt5670_dac_l_mix)),
1608 SND_SOC_DAPM_MIXER("DAC1 MIXR", SND_SOC_NOPM, 0, 0,
1609 rt5670_dac_r_mix, ARRAY_SIZE(rt5670_dac_r_mix)),
1610 SND_SOC_DAPM_PGA("DAC MIX", SND_SOC_NOPM, 0, 0, NULL, 0),
1611
1612 /* DAC2 channel Mux */
1613 SND_SOC_DAPM_MUX("DAC L2 Mux", SND_SOC_NOPM, 0, 0,
1614 &rt5670_dac_l2_mux),
1615 SND_SOC_DAPM_MUX("DAC R2 Mux", SND_SOC_NOPM, 0, 0,
1616 &rt5670_dac_r2_mux),
1617 SND_SOC_DAPM_PGA("DAC L2 Volume", RT5670_PWR_DIG1,
1618 RT5670_PWR_DAC_L2_BIT, 0, NULL, 0),
1619 SND_SOC_DAPM_PGA("DAC R2 Volume", RT5670_PWR_DIG1,
1620 RT5670_PWR_DAC_R2_BIT, 0, NULL, 0),
1621
1622 SND_SOC_DAPM_MUX("DAC1 L Mux", SND_SOC_NOPM, 0, 0, &rt5670_dac1l_mux),
1623 SND_SOC_DAPM_MUX("DAC1 R Mux", SND_SOC_NOPM, 0, 0, &rt5670_dac1r_mux),
1624
1625 /* DAC Mixer */
1626 SND_SOC_DAPM_SUPPLY("DAC Stereo1 Filter", RT5670_PWR_DIG2,
1627 RT5670_PWR_DAC_S1F_BIT, 0, NULL, 0),
1628 SND_SOC_DAPM_SUPPLY("DAC Mono Left Filter", RT5670_PWR_DIG2,
1629 RT5670_PWR_DAC_MF_L_BIT, 0, NULL, 0),
1630 SND_SOC_DAPM_SUPPLY("DAC Mono Right Filter", RT5670_PWR_DIG2,
1631 RT5670_PWR_DAC_MF_R_BIT, 0, NULL, 0),
1632 SND_SOC_DAPM_MIXER("Stereo DAC MIXL", SND_SOC_NOPM, 0, 0,
1633 rt5670_sto_dac_l_mix,
1634 ARRAY_SIZE(rt5670_sto_dac_l_mix)),
1635 SND_SOC_DAPM_MIXER("Stereo DAC MIXR", SND_SOC_NOPM, 0, 0,
1636 rt5670_sto_dac_r_mix,
1637 ARRAY_SIZE(rt5670_sto_dac_r_mix)),
1638 SND_SOC_DAPM_MIXER("Mono DAC MIXL", SND_SOC_NOPM, 0, 0,
1639 rt5670_mono_dac_l_mix,
1640 ARRAY_SIZE(rt5670_mono_dac_l_mix)),
1641 SND_SOC_DAPM_MIXER("Mono DAC MIXR", SND_SOC_NOPM, 0, 0,
1642 rt5670_mono_dac_r_mix,
1643 ARRAY_SIZE(rt5670_mono_dac_r_mix)),
1644 SND_SOC_DAPM_MIXER("DAC MIXL", SND_SOC_NOPM, 0, 0,
1645 rt5670_dig_l_mix,
1646 ARRAY_SIZE(rt5670_dig_l_mix)),
1647 SND_SOC_DAPM_MIXER("DAC MIXR", SND_SOC_NOPM, 0, 0,
1648 rt5670_dig_r_mix,
1649 ARRAY_SIZE(rt5670_dig_r_mix)),
1650
1651 /* DACs */
1652 SND_SOC_DAPM_SUPPLY("DAC L1 Power", RT5670_PWR_DIG1,
1653 RT5670_PWR_DAC_L1_BIT, 0, NULL, 0),
1654 SND_SOC_DAPM_SUPPLY("DAC R1 Power", RT5670_PWR_DIG1,
1655 RT5670_PWR_DAC_R1_BIT, 0, NULL, 0),
1656 SND_SOC_DAPM_DAC("DAC L1", NULL, SND_SOC_NOPM, 0, 0),
1657 SND_SOC_DAPM_DAC("DAC R1", NULL, SND_SOC_NOPM, 0, 0),
1658 SND_SOC_DAPM_DAC("DAC L2", NULL, RT5670_PWR_DIG1,
1659 RT5670_PWR_DAC_L2_BIT, 0),
1660
1661 SND_SOC_DAPM_DAC("DAC R2", NULL, RT5670_PWR_DIG1,
1662 RT5670_PWR_DAC_R2_BIT, 0),
1663 /* OUT Mixer */
1664
1665 SND_SOC_DAPM_MIXER("OUT MIXL", RT5670_PWR_MIXER, RT5670_PWR_OM_L_BIT,
1666 0, rt5670_out_l_mix, ARRAY_SIZE(rt5670_out_l_mix)),
1667 SND_SOC_DAPM_MIXER("OUT MIXR", RT5670_PWR_MIXER, RT5670_PWR_OM_R_BIT,
1668 0, rt5670_out_r_mix, ARRAY_SIZE(rt5670_out_r_mix)),
1669 /* Ouput Volume */
1670 SND_SOC_DAPM_MIXER("HPOVOL MIXL", RT5670_PWR_VOL,
1671 RT5670_PWR_HV_L_BIT, 0,
1672 rt5670_hpvoll_mix, ARRAY_SIZE(rt5670_hpvoll_mix)),
1673 SND_SOC_DAPM_MIXER("HPOVOL MIXR", RT5670_PWR_VOL,
1674 RT5670_PWR_HV_R_BIT, 0,
1675 rt5670_hpvolr_mix, ARRAY_SIZE(rt5670_hpvolr_mix)),
1676 SND_SOC_DAPM_PGA("DAC 1", SND_SOC_NOPM, 0, 0, NULL, 0),
1677 SND_SOC_DAPM_PGA("DAC 2", SND_SOC_NOPM, 0, 0, NULL, 0),
1678 SND_SOC_DAPM_PGA("HPOVOL", SND_SOC_NOPM, 0, 0, NULL, 0),
1679
1680 /* HPO/LOUT/Mono Mixer */
1681 SND_SOC_DAPM_MIXER("HPO MIX", SND_SOC_NOPM, 0, 0,
1682 rt5670_hpo_mix, ARRAY_SIZE(rt5670_hpo_mix)),
1683 SND_SOC_DAPM_MIXER("LOUT MIX", RT5670_PWR_ANLG1, RT5670_PWR_LM_BIT,
1684 0, rt5670_lout_mix, ARRAY_SIZE(rt5670_lout_mix)),
1685 SND_SOC_DAPM_SUPPLY_S("Improve HP Amp Drv", 1, SND_SOC_NOPM, 0, 0,
1686 rt5670_hp_power_event, SND_SOC_DAPM_POST_PMU |
1687 SND_SOC_DAPM_PRE_PMD),
1688 SND_SOC_DAPM_SUPPLY("HP L Amp", RT5670_PWR_ANLG1,
1689 RT5670_PWR_HP_L_BIT, 0, NULL, 0),
1690 SND_SOC_DAPM_SUPPLY("HP R Amp", RT5670_PWR_ANLG1,
1691 RT5670_PWR_HP_R_BIT, 0, NULL, 0),
1692 SND_SOC_DAPM_PGA_S("HP Amp", 1, SND_SOC_NOPM, 0, 0,
1693 rt5670_hp_event, SND_SOC_DAPM_PRE_PMD |
1694 SND_SOC_DAPM_POST_PMU),
1695 SND_SOC_DAPM_SWITCH("LOUT L Playback", SND_SOC_NOPM, 0, 0,
1696 &lout_l_enable_control),
1697 SND_SOC_DAPM_SWITCH("LOUT R Playback", SND_SOC_NOPM, 0, 0,
1698 &lout_r_enable_control),
1699 SND_SOC_DAPM_PGA("LOUT Amp", SND_SOC_NOPM, 0, 0, NULL, 0),
1700
1701 /* PDM */
1702 SND_SOC_DAPM_SUPPLY("PDM1 Power", RT5670_PWR_DIG2,
1703 RT5670_PWR_PDM1_BIT, 0, NULL, 0),
Bard Liao5e8351d2014-06-30 20:31:13 +08001704
1705 SND_SOC_DAPM_MUX("PDM1 L Mux", RT5670_PDM_OUT_CTRL,
1706 RT5670_M_PDM1_L_SFT, 1, &rt5670_pdm1_l_mux),
1707 SND_SOC_DAPM_MUX("PDM1 R Mux", RT5670_PDM_OUT_CTRL,
1708 RT5670_M_PDM1_R_SFT, 1, &rt5670_pdm1_r_mux),
Bard Liao5e8351d2014-06-30 20:31:13 +08001709
1710 /* Output Lines */
1711 SND_SOC_DAPM_OUTPUT("HPOL"),
1712 SND_SOC_DAPM_OUTPUT("HPOR"),
1713 SND_SOC_DAPM_OUTPUT("LOUTL"),
1714 SND_SOC_DAPM_OUTPUT("LOUTR"),
Bard Liao0cf18632014-11-11 17:59:50 +08001715};
1716
1717static const struct snd_soc_dapm_widget rt5670_specific_dapm_widgets[] = {
1718 SND_SOC_DAPM_SUPPLY("PDM2 Power", RT5670_PWR_DIG2,
1719 RT5670_PWR_PDM2_BIT, 0, NULL, 0),
1720 SND_SOC_DAPM_MUX("PDM2 L Mux", RT5670_PDM_OUT_CTRL,
1721 RT5670_M_PDM2_L_SFT, 1, &rt5670_pdm2_l_mux),
1722 SND_SOC_DAPM_MUX("PDM2 R Mux", RT5670_PDM_OUT_CTRL,
1723 RT5670_M_PDM2_R_SFT, 1, &rt5670_pdm2_r_mux),
Bard Liao5e8351d2014-06-30 20:31:13 +08001724 SND_SOC_DAPM_OUTPUT("PDM1L"),
1725 SND_SOC_DAPM_OUTPUT("PDM1R"),
1726 SND_SOC_DAPM_OUTPUT("PDM2L"),
1727 SND_SOC_DAPM_OUTPUT("PDM2R"),
1728};
1729
Bard Liao0cf18632014-11-11 17:59:50 +08001730static const struct snd_soc_dapm_widget rt5672_specific_dapm_widgets[] = {
1731 SND_SOC_DAPM_PGA("SPO Amp", SND_SOC_NOPM, 0, 0, NULL, 0),
1732 SND_SOC_DAPM_OUTPUT("SPOLP"),
1733 SND_SOC_DAPM_OUTPUT("SPOLN"),
1734 SND_SOC_DAPM_OUTPUT("SPORP"),
1735 SND_SOC_DAPM_OUTPUT("SPORN"),
1736};
1737
Bard Liao5e8351d2014-06-30 20:31:13 +08001738static const struct snd_soc_dapm_route rt5670_dapm_routes[] = {
1739 { "ADC Stereo1 Filter", NULL, "ADC STO1 ASRC", is_using_asrc },
1740 { "ADC Stereo2 Filter", NULL, "ADC STO2 ASRC", is_using_asrc },
1741 { "ADC Mono Left Filter", NULL, "ADC MONO L ASRC", is_using_asrc },
1742 { "ADC Mono Right Filter", NULL, "ADC MONO R ASRC", is_using_asrc },
1743 { "DAC Mono Left Filter", NULL, "DAC MONO L ASRC", is_using_asrc },
1744 { "DAC Mono Right Filter", NULL, "DAC MONO R ASRC", is_using_asrc },
1745 { "DAC Stereo1 Filter", NULL, "DAC STO ASRC", is_using_asrc },
Bard Liaoff4541c2014-11-17 15:27:22 +08001746 { "Stereo1 DMIC Mux", NULL, "DMIC STO1 ASRC", can_use_asrc },
1747 { "Stereo2 DMIC Mux", NULL, "DMIC STO2 ASRC", can_use_asrc },
1748 { "Mono DMIC L Mux", NULL, "DMIC MONO L ASRC", can_use_asrc },
1749 { "Mono DMIC R Mux", NULL, "DMIC MONO R ASRC", can_use_asrc },
Bard Liao5e8351d2014-06-30 20:31:13 +08001750
Bard Liaoe50334d2014-11-17 15:27:21 +08001751 { "I2S1", NULL, "I2S1 ASRC", can_use_asrc},
1752 { "I2S2", NULL, "I2S2 ASRC", can_use_asrc},
Bard Liao5e8351d2014-06-30 20:31:13 +08001753
1754 { "DMIC1", NULL, "DMIC L1" },
1755 { "DMIC1", NULL, "DMIC R1" },
1756 { "DMIC2", NULL, "DMIC L2" },
1757 { "DMIC2", NULL, "DMIC R2" },
1758 { "DMIC3", NULL, "DMIC L3" },
1759 { "DMIC3", NULL, "DMIC R3" },
1760
1761 { "BST1", NULL, "IN1P" },
1762 { "BST1", NULL, "IN1N" },
1763 { "BST1", NULL, "Mic Det Power" },
1764 { "BST2", NULL, "IN2P" },
1765 { "BST2", NULL, "IN2N" },
1766
1767 { "INL VOL", NULL, "IN2P" },
1768 { "INR VOL", NULL, "IN2N" },
1769
1770 { "RECMIXL", "INL Switch", "INL VOL" },
1771 { "RECMIXL", "BST2 Switch", "BST2" },
1772 { "RECMIXL", "BST1 Switch", "BST1" },
1773
1774 { "RECMIXR", "INR Switch", "INR VOL" },
1775 { "RECMIXR", "BST2 Switch", "BST2" },
1776 { "RECMIXR", "BST1 Switch", "BST1" },
1777
1778 { "ADC 1", NULL, "RECMIXL" },
1779 { "ADC 1", NULL, "ADC 1 power" },
1780 { "ADC 1", NULL, "ADC clock" },
1781 { "ADC 2", NULL, "RECMIXR" },
1782 { "ADC 2", NULL, "ADC 2 power" },
1783 { "ADC 2", NULL, "ADC clock" },
1784
1785 { "DMIC L1", NULL, "DMIC CLK" },
1786 { "DMIC L1", NULL, "DMIC1 Power" },
1787 { "DMIC R1", NULL, "DMIC CLK" },
1788 { "DMIC R1", NULL, "DMIC1 Power" },
1789 { "DMIC L2", NULL, "DMIC CLK" },
1790 { "DMIC L2", NULL, "DMIC2 Power" },
1791 { "DMIC R2", NULL, "DMIC CLK" },
1792 { "DMIC R2", NULL, "DMIC2 Power" },
1793 { "DMIC L3", NULL, "DMIC CLK" },
1794 { "DMIC L3", NULL, "DMIC3 Power" },
1795 { "DMIC R3", NULL, "DMIC CLK" },
1796 { "DMIC R3", NULL, "DMIC3 Power" },
1797
1798 { "Stereo1 DMIC Mux", "DMIC1", "DMIC1" },
1799 { "Stereo1 DMIC Mux", "DMIC2", "DMIC2" },
1800 { "Stereo1 DMIC Mux", "DMIC3", "DMIC3" },
1801
1802 { "Stereo2 DMIC Mux", "DMIC1", "DMIC1" },
1803 { "Stereo2 DMIC Mux", "DMIC2", "DMIC2" },
1804 { "Stereo2 DMIC Mux", "DMIC3", "DMIC3" },
1805
1806 { "Mono DMIC L Mux", "DMIC1", "DMIC L1" },
1807 { "Mono DMIC L Mux", "DMIC2", "DMIC L2" },
1808 { "Mono DMIC L Mux", "DMIC3", "DMIC L3" },
1809
1810 { "Mono DMIC R Mux", "DMIC1", "DMIC R1" },
1811 { "Mono DMIC R Mux", "DMIC2", "DMIC R2" },
1812 { "Mono DMIC R Mux", "DMIC3", "DMIC R3" },
1813
1814 { "ADC 1_2", NULL, "ADC 1" },
1815 { "ADC 1_2", NULL, "ADC 2" },
1816
1817 { "Stereo1 ADC L2 Mux", "DMIC", "Stereo1 DMIC Mux" },
1818 { "Stereo1 ADC L2 Mux", "DAC MIX", "DAC MIXL" },
1819 { "Stereo1 ADC L1 Mux", "ADC", "ADC 1_2" },
1820 { "Stereo1 ADC L1 Mux", "DAC MIX", "DAC MIXL" },
1821
1822 { "Stereo1 ADC R1 Mux", "ADC", "ADC 1_2" },
1823 { "Stereo1 ADC R1 Mux", "DAC MIX", "DAC MIXR" },
1824 { "Stereo1 ADC R2 Mux", "DMIC", "Stereo1 DMIC Mux" },
1825 { "Stereo1 ADC R2 Mux", "DAC MIX", "DAC MIXR" },
1826
1827 { "Mono ADC L2 Mux", "DMIC", "Mono DMIC L Mux" },
1828 { "Mono ADC L2 Mux", "Mono DAC MIXL", "Mono DAC MIXL" },
1829 { "Mono ADC L1 Mux", "Mono DAC MIXL", "Mono DAC MIXL" },
1830 { "Mono ADC L1 Mux", "ADC1", "ADC 1" },
1831
1832 { "Mono ADC R1 Mux", "Mono DAC MIXR", "Mono DAC MIXR" },
1833 { "Mono ADC R1 Mux", "ADC2", "ADC 2" },
1834 { "Mono ADC R2 Mux", "DMIC", "Mono DMIC R Mux" },
1835 { "Mono ADC R2 Mux", "Mono DAC MIXR", "Mono DAC MIXR" },
1836
1837 { "Sto1 ADC MIXL", "ADC1 Switch", "Stereo1 ADC L1 Mux" },
1838 { "Sto1 ADC MIXL", "ADC2 Switch", "Stereo1 ADC L2 Mux" },
1839 { "Sto1 ADC MIXR", "ADC1 Switch", "Stereo1 ADC R1 Mux" },
1840 { "Sto1 ADC MIXR", "ADC2 Switch", "Stereo1 ADC R2 Mux" },
1841
1842 { "Stereo1 ADC MIXL", NULL, "Sto1 ADC MIXL" },
1843 { "Stereo1 ADC MIXL", NULL, "ADC Stereo1 Filter" },
1844 { "ADC Stereo1 Filter", NULL, "PLL1", is_sys_clk_from_pll },
1845
1846 { "Stereo1 ADC MIXR", NULL, "Sto1 ADC MIXR" },
1847 { "Stereo1 ADC MIXR", NULL, "ADC Stereo1 Filter" },
1848 { "ADC Stereo1 Filter", NULL, "PLL1", is_sys_clk_from_pll },
1849
1850 { "Mono ADC MIXL", "ADC1 Switch", "Mono ADC L1 Mux" },
1851 { "Mono ADC MIXL", "ADC2 Switch", "Mono ADC L2 Mux" },
1852 { "Mono ADC MIXL", NULL, "ADC Mono Left Filter" },
1853 { "ADC Mono Left Filter", NULL, "PLL1", is_sys_clk_from_pll },
1854
1855 { "Mono ADC MIXR", "ADC1 Switch", "Mono ADC R1 Mux" },
1856 { "Mono ADC MIXR", "ADC2 Switch", "Mono ADC R2 Mux" },
1857 { "Mono ADC MIXR", NULL, "ADC Mono Right Filter" },
1858 { "ADC Mono Right Filter", NULL, "PLL1", is_sys_clk_from_pll },
1859
1860 { "Stereo2 ADC L2 Mux", "DMIC", "Stereo2 DMIC Mux" },
1861 { "Stereo2 ADC L2 Mux", "DAC MIX", "DAC MIXL" },
1862 { "Stereo2 ADC L1 Mux", "ADC", "ADC 1_2" },
1863 { "Stereo2 ADC L1 Mux", "DAC MIX", "DAC MIXL" },
1864
1865 { "Stereo2 ADC R1 Mux", "ADC", "ADC 1_2" },
1866 { "Stereo2 ADC R1 Mux", "DAC MIX", "DAC MIXR" },
1867 { "Stereo2 ADC R2 Mux", "DMIC", "Stereo2 DMIC Mux" },
1868 { "Stereo2 ADC R2 Mux", "DAC MIX", "DAC MIXR" },
1869
1870 { "Sto2 ADC MIXL", "ADC1 Switch", "Stereo2 ADC L1 Mux" },
1871 { "Sto2 ADC MIXL", "ADC2 Switch", "Stereo2 ADC L2 Mux" },
1872 { "Sto2 ADC MIXR", "ADC1 Switch", "Stereo2 ADC R1 Mux" },
1873 { "Sto2 ADC MIXR", "ADC2 Switch", "Stereo2 ADC R2 Mux" },
1874
1875 { "Sto2 ADC LR MIX", NULL, "Sto2 ADC MIXL" },
1876 { "Sto2 ADC LR MIX", NULL, "Sto2 ADC MIXR" },
1877
1878 { "Stereo2 ADC LR Mux", "L", "Sto2 ADC MIXL" },
1879 { "Stereo2 ADC LR Mux", "LR", "Sto2 ADC LR MIX" },
1880
1881 { "Stereo2 ADC MIXL", NULL, "Stereo2 ADC LR Mux" },
1882 { "Stereo2 ADC MIXL", NULL, "ADC Stereo2 Filter" },
1883 { "ADC Stereo2 Filter", NULL, "PLL1", is_sys_clk_from_pll },
1884
1885 { "Stereo2 ADC MIXR", NULL, "Sto2 ADC MIXR" },
1886 { "Stereo2 ADC MIXR", NULL, "ADC Stereo2 Filter" },
1887 { "ADC Stereo2 Filter", NULL, "PLL1", is_sys_clk_from_pll },
1888
1889 { "VAD ADC Mux", "Sto1 ADC L", "Stereo1 ADC MIXL" },
1890 { "VAD ADC Mux", "Mono ADC L", "Mono ADC MIXL" },
1891 { "VAD ADC Mux", "Mono ADC R", "Mono ADC MIXR" },
1892 { "VAD ADC Mux", "Sto2 ADC L", "Sto2 ADC MIXL" },
1893
1894 { "VAD_ADC", NULL, "VAD ADC Mux" },
1895
1896 { "IF_ADC1", NULL, "Stereo1 ADC MIXL" },
1897 { "IF_ADC1", NULL, "Stereo1 ADC MIXR" },
1898 { "IF_ADC2", NULL, "Mono ADC MIXL" },
1899 { "IF_ADC2", NULL, "Mono ADC MIXR" },
1900 { "IF_ADC3", NULL, "Stereo2 ADC MIXL" },
1901 { "IF_ADC3", NULL, "Stereo2 ADC MIXR" },
1902
1903 { "IF1 ADC1 IN1 Mux", "IF_ADC1", "IF_ADC1" },
1904 { "IF1 ADC1 IN1 Mux", "IF1_ADC3", "IF1_ADC3" },
1905
1906 { "IF1 ADC1 IN2 Mux", "IF1_ADC1_IN1", "IF1 ADC1 IN1 Mux" },
1907 { "IF1 ADC1 IN2 Mux", "IF1_ADC4", "IF1_ADC4" },
1908
1909 { "IF1 ADC2 IN Mux", "IF_ADC2", "IF_ADC2" },
1910 { "IF1 ADC2 IN Mux", "VAD_ADC", "VAD_ADC" },
1911
1912 { "IF1 ADC2 IN1 Mux", "IF1_ADC2_IN", "IF1 ADC2 IN Mux" },
1913 { "IF1 ADC2 IN1 Mux", "IF1_ADC4", "IF1_ADC4" },
1914
1915 { "IF1_ADC1" , NULL, "IF1 ADC1 IN2 Mux" },
1916 { "IF1_ADC2" , NULL, "IF1 ADC2 IN1 Mux" },
1917
1918 { "Stereo1 ADC MIX", NULL, "Stereo1 ADC MIXL" },
1919 { "Stereo1 ADC MIX", NULL, "Stereo1 ADC MIXR" },
1920 { "Stereo2 ADC MIX", NULL, "Sto2 ADC MIXL" },
1921 { "Stereo2 ADC MIX", NULL, "Sto2 ADC MIXR" },
1922 { "Mono ADC MIX", NULL, "Mono ADC MIXL" },
1923 { "Mono ADC MIX", NULL, "Mono ADC MIXR" },
1924
1925 { "RxDP Mux", "IF2 DAC", "IF2 DAC" },
1926 { "RxDP Mux", "IF1 DAC", "IF1 DAC2" },
1927 { "RxDP Mux", "STO1 ADC Mixer", "Stereo1 ADC MIX" },
1928 { "RxDP Mux", "STO2 ADC Mixer", "Stereo2 ADC MIX" },
1929 { "RxDP Mux", "Mono ADC Mixer L", "Mono ADC MIXL" },
1930 { "RxDP Mux", "Mono ADC Mixer R", "Mono ADC MIXR" },
1931 { "RxDP Mux", "DAC1", "DAC MIX" },
1932
1933 { "TDM Data Mux", "Slot 0-1", "Stereo1 ADC MIX" },
1934 { "TDM Data Mux", "Slot 2-3", "Mono ADC MIX" },
1935 { "TDM Data Mux", "Slot 4-5", "Stereo2 ADC MIX" },
1936 { "TDM Data Mux", "Slot 6-7", "IF2 DAC" },
1937
1938 { "DSP UL Mux", "Bypass", "TDM Data Mux" },
1939 { "DSP UL Mux", NULL, "I2S DSP" },
1940 { "DSP DL Mux", "Bypass", "RxDP Mux" },
1941 { "DSP DL Mux", NULL, "I2S DSP" },
1942
1943 { "TxDP_ADC_L", NULL, "DSP UL Mux" },
1944 { "TxDP_ADC_R", NULL, "DSP UL Mux" },
1945 { "TxDC_DAC", NULL, "DSP DL Mux" },
1946
1947 { "TxDP_ADC", NULL, "TxDP_ADC_L" },
1948 { "TxDP_ADC", NULL, "TxDP_ADC_R" },
1949
1950 { "IF1 ADC", NULL, "I2S1" },
1951 { "IF1 ADC", NULL, "IF1_ADC1" },
1952 { "IF1 ADC", NULL, "IF1_ADC2" },
1953 { "IF1 ADC", NULL, "IF_ADC3" },
1954 { "IF1 ADC", NULL, "TxDP_ADC" },
1955
1956 { "IF2 ADC Mux", "IF_ADC1", "IF_ADC1" },
1957 { "IF2 ADC Mux", "IF_ADC2", "IF_ADC2" },
1958 { "IF2 ADC Mux", "IF_ADC3", "IF_ADC3" },
1959 { "IF2 ADC Mux", "TxDC_DAC", "TxDC_DAC" },
1960 { "IF2 ADC Mux", "TxDP_ADC", "TxDP_ADC" },
1961 { "IF2 ADC Mux", "VAD_ADC", "VAD_ADC" },
1962
1963 { "IF2 ADC L", NULL, "IF2 ADC Mux" },
1964 { "IF2 ADC R", NULL, "IF2 ADC Mux" },
1965
1966 { "IF2 ADC", NULL, "I2S2" },
1967 { "IF2 ADC", NULL, "IF2 ADC L" },
1968 { "IF2 ADC", NULL, "IF2 ADC R" },
1969
1970 { "AIF1TX", NULL, "IF1 ADC" },
1971 { "AIF2TX", NULL, "IF2 ADC" },
1972
1973 { "IF1 DAC1", NULL, "AIF1RX" },
1974 { "IF1 DAC2", NULL, "AIF1RX" },
1975 { "IF2 DAC", NULL, "AIF2RX" },
1976
1977 { "IF1 DAC1", NULL, "I2S1" },
1978 { "IF1 DAC2", NULL, "I2S1" },
1979 { "IF2 DAC", NULL, "I2S2" },
1980
1981 { "IF1 DAC2 L", NULL, "IF1 DAC2" },
1982 { "IF1 DAC2 R", NULL, "IF1 DAC2" },
1983 { "IF1 DAC1 L", NULL, "IF1 DAC1" },
1984 { "IF1 DAC1 R", NULL, "IF1 DAC1" },
1985 { "IF2 DAC L", NULL, "IF2 DAC" },
1986 { "IF2 DAC R", NULL, "IF2 DAC" },
1987
1988 { "DAC1 L Mux", "IF1 DAC", "IF1 DAC1 L" },
1989 { "DAC1 L Mux", "IF2 DAC", "IF2 DAC L" },
1990
1991 { "DAC1 R Mux", "IF1 DAC", "IF1 DAC1 R" },
1992 { "DAC1 R Mux", "IF2 DAC", "IF2 DAC R" },
1993
1994 { "DAC1 MIXL", "Stereo ADC Switch", "Stereo1 ADC MIXL" },
1995 { "DAC1 MIXL", "DAC1 Switch", "DAC1 L Mux" },
1996 { "DAC1 MIXL", NULL, "DAC Stereo1 Filter" },
1997 { "DAC1 MIXR", "Stereo ADC Switch", "Stereo1 ADC MIXR" },
1998 { "DAC1 MIXR", "DAC1 Switch", "DAC1 R Mux" },
1999 { "DAC1 MIXR", NULL, "DAC Stereo1 Filter" },
2000
Bard Liao96927ac2014-11-06 12:23:54 +08002001 { "DAC Stereo1 Filter", NULL, "PLL1", is_sys_clk_from_pll },
2002 { "DAC Mono Left Filter", NULL, "PLL1", is_sys_clk_from_pll },
2003 { "DAC Mono Right Filter", NULL, "PLL1", is_sys_clk_from_pll },
2004
Bard Liao5e8351d2014-06-30 20:31:13 +08002005 { "DAC MIX", NULL, "DAC1 MIXL" },
2006 { "DAC MIX", NULL, "DAC1 MIXR" },
2007
2008 { "Audio DSP", NULL, "DAC1 MIXL" },
2009 { "Audio DSP", NULL, "DAC1 MIXR" },
2010
2011 { "DAC L2 Mux", "IF1 DAC", "IF1 DAC2 L" },
2012 { "DAC L2 Mux", "IF2 DAC", "IF2 DAC L" },
2013 { "DAC L2 Mux", "TxDC DAC", "TxDC_DAC" },
2014 { "DAC L2 Mux", "VAD_ADC", "VAD_ADC" },
2015 { "DAC L2 Volume", NULL, "DAC L2 Mux" },
2016 { "DAC L2 Volume", NULL, "DAC Mono Left Filter" },
2017
2018 { "DAC R2 Mux", "IF1 DAC", "IF1 DAC2 R" },
2019 { "DAC R2 Mux", "IF2 DAC", "IF2 DAC R" },
2020 { "DAC R2 Mux", "TxDC DAC", "TxDC_DAC" },
2021 { "DAC R2 Mux", "TxDP ADC", "TxDP_ADC" },
2022 { "DAC R2 Volume", NULL, "DAC R2 Mux" },
2023 { "DAC R2 Volume", NULL, "DAC Mono Right Filter" },
2024
2025 { "Stereo DAC MIXL", "DAC L1 Switch", "DAC1 MIXL" },
2026 { "Stereo DAC MIXL", "DAC R1 Switch", "DAC1 MIXR" },
2027 { "Stereo DAC MIXL", "DAC L2 Switch", "DAC L2 Volume" },
2028 { "Stereo DAC MIXL", NULL, "DAC Stereo1 Filter" },
2029 { "Stereo DAC MIXL", NULL, "DAC L1 Power" },
2030 { "Stereo DAC MIXR", "DAC R1 Switch", "DAC1 MIXR" },
2031 { "Stereo DAC MIXR", "DAC L1 Switch", "DAC1 MIXL" },
2032 { "Stereo DAC MIXR", "DAC R2 Switch", "DAC R2 Volume" },
2033 { "Stereo DAC MIXR", NULL, "DAC Stereo1 Filter" },
2034 { "Stereo DAC MIXR", NULL, "DAC R1 Power" },
2035
2036 { "Mono DAC MIXL", "DAC L1 Switch", "DAC1 MIXL" },
2037 { "Mono DAC MIXL", "DAC L2 Switch", "DAC L2 Volume" },
2038 { "Mono DAC MIXL", "DAC R2 Switch", "DAC R2 Volume" },
2039 { "Mono DAC MIXL", NULL, "DAC Mono Left Filter" },
2040 { "Mono DAC MIXR", "DAC R1 Switch", "DAC1 MIXR" },
2041 { "Mono DAC MIXR", "DAC R2 Switch", "DAC R2 Volume" },
2042 { "Mono DAC MIXR", "DAC L2 Switch", "DAC L2 Volume" },
2043 { "Mono DAC MIXR", NULL, "DAC Mono Right Filter" },
2044
2045 { "DAC MIXL", "Sto DAC Mix L Switch", "Stereo DAC MIXL" },
2046 { "DAC MIXL", "DAC L2 Switch", "DAC L2 Volume" },
2047 { "DAC MIXL", "DAC R2 Switch", "DAC R2 Volume" },
2048 { "DAC MIXR", "Sto DAC Mix R Switch", "Stereo DAC MIXR" },
2049 { "DAC MIXR", "DAC R2 Switch", "DAC R2 Volume" },
2050 { "DAC MIXR", "DAC L2 Switch", "DAC L2 Volume" },
2051
2052 { "DAC L1", NULL, "DAC L1 Power" },
2053 { "DAC L1", NULL, "Stereo DAC MIXL" },
Bard Liao5e8351d2014-06-30 20:31:13 +08002054 { "DAC R1", NULL, "DAC R1 Power" },
2055 { "DAC R1", NULL, "Stereo DAC MIXR" },
Bard Liao5e8351d2014-06-30 20:31:13 +08002056 { "DAC L2", NULL, "Mono DAC MIXL" },
Bard Liao5e8351d2014-06-30 20:31:13 +08002057 { "DAC R2", NULL, "Mono DAC MIXR" },
Bard Liao5e8351d2014-06-30 20:31:13 +08002058
2059 { "OUT MIXL", "BST1 Switch", "BST1" },
2060 { "OUT MIXL", "INL Switch", "INL VOL" },
2061 { "OUT MIXL", "DAC L2 Switch", "DAC L2" },
2062 { "OUT MIXL", "DAC L1 Switch", "DAC L1" },
2063
2064 { "OUT MIXR", "BST2 Switch", "BST2" },
2065 { "OUT MIXR", "INR Switch", "INR VOL" },
2066 { "OUT MIXR", "DAC R2 Switch", "DAC R2" },
2067 { "OUT MIXR", "DAC R1 Switch", "DAC R1" },
2068
2069 { "HPOVOL MIXL", "DAC1 Switch", "DAC L1" },
2070 { "HPOVOL MIXL", "INL Switch", "INL VOL" },
2071 { "HPOVOL MIXR", "DAC1 Switch", "DAC R1" },
2072 { "HPOVOL MIXR", "INR Switch", "INR VOL" },
2073
2074 { "DAC 2", NULL, "DAC L2" },
2075 { "DAC 2", NULL, "DAC R2" },
2076 { "DAC 1", NULL, "DAC L1" },
2077 { "DAC 1", NULL, "DAC R1" },
2078 { "HPOVOL", NULL, "HPOVOL MIXL" },
2079 { "HPOVOL", NULL, "HPOVOL MIXR" },
2080 { "HPO MIX", "DAC1 Switch", "DAC 1" },
2081 { "HPO MIX", "HPVOL Switch", "HPOVOL" },
2082
2083 { "LOUT MIX", "DAC L1 Switch", "DAC L1" },
2084 { "LOUT MIX", "DAC R1 Switch", "DAC R1" },
2085 { "LOUT MIX", "OUTMIX L Switch", "OUT MIXL" },
2086 { "LOUT MIX", "OUTMIX R Switch", "OUT MIXR" },
2087
2088 { "PDM1 L Mux", "Stereo DAC", "Stereo DAC MIXL" },
2089 { "PDM1 L Mux", "Mono DAC", "Mono DAC MIXL" },
2090 { "PDM1 L Mux", NULL, "PDM1 Power" },
2091 { "PDM1 R Mux", "Stereo DAC", "Stereo DAC MIXR" },
2092 { "PDM1 R Mux", "Mono DAC", "Mono DAC MIXR" },
2093 { "PDM1 R Mux", NULL, "PDM1 Power" },
Bard Liao5e8351d2014-06-30 20:31:13 +08002094
2095 { "HP Amp", NULL, "HPO MIX" },
2096 { "HP Amp", NULL, "Mic Det Power" },
2097 { "HPOL", NULL, "HP Amp" },
2098 { "HPOL", NULL, "HP L Amp" },
2099 { "HPOL", NULL, "Improve HP Amp Drv" },
2100 { "HPOR", NULL, "HP Amp" },
2101 { "HPOR", NULL, "HP R Amp" },
2102 { "HPOR", NULL, "Improve HP Amp Drv" },
2103
2104 { "LOUT Amp", NULL, "LOUT MIX" },
2105 { "LOUT L Playback", "Switch", "LOUT Amp" },
2106 { "LOUT R Playback", "Switch", "LOUT Amp" },
2107 { "LOUTL", NULL, "LOUT L Playback" },
2108 { "LOUTR", NULL, "LOUT R Playback" },
2109 { "LOUTL", NULL, "Improve HP Amp Drv" },
2110 { "LOUTR", NULL, "Improve HP Amp Drv" },
Bard Liao0cf18632014-11-11 17:59:50 +08002111};
Bard Liao5e8351d2014-06-30 20:31:13 +08002112
Bard Liao0cf18632014-11-11 17:59:50 +08002113static const struct snd_soc_dapm_route rt5670_specific_dapm_routes[] = {
2114 { "PDM2 L Mux", "Stereo DAC", "Stereo DAC MIXL" },
2115 { "PDM2 L Mux", "Mono DAC", "Mono DAC MIXL" },
2116 { "PDM2 L Mux", NULL, "PDM2 Power" },
2117 { "PDM2 R Mux", "Stereo DAC", "Stereo DAC MIXR" },
2118 { "PDM2 R Mux", "Mono DAC", "Mono DAC MIXR" },
2119 { "PDM2 R Mux", NULL, "PDM2 Power" },
Bard Liao5e8351d2014-06-30 20:31:13 +08002120 { "PDM1L", NULL, "PDM1 L Mux" },
2121 { "PDM1R", NULL, "PDM1 R Mux" },
2122 { "PDM2L", NULL, "PDM2 L Mux" },
2123 { "PDM2R", NULL, "PDM2 R Mux" },
2124};
2125
Bard Liao0cf18632014-11-11 17:59:50 +08002126static const struct snd_soc_dapm_route rt5672_specific_dapm_routes[] = {
2127 { "SPO Amp", NULL, "PDM1 L Mux" },
2128 { "SPO Amp", NULL, "PDM1 R Mux" },
2129 { "SPOLP", NULL, "SPO Amp" },
2130 { "SPOLN", NULL, "SPO Amp" },
2131 { "SPORP", NULL, "SPO Amp" },
2132 { "SPORN", NULL, "SPO Amp" },
2133};
2134
Bard Liao5e8351d2014-06-30 20:31:13 +08002135static int rt5670_hw_params(struct snd_pcm_substream *substream,
2136 struct snd_pcm_hw_params *params, struct snd_soc_dai *dai)
2137{
2138 struct snd_soc_codec *codec = dai->codec;
2139 struct rt5670_priv *rt5670 = snd_soc_codec_get_drvdata(codec);
2140 unsigned int val_len = 0, val_clk, mask_clk;
2141 int pre_div, bclk_ms, frame_size;
2142
2143 rt5670->lrck[dai->id] = params_rate(params);
2144 pre_div = rl6231_get_clk_info(rt5670->sysclk, rt5670->lrck[dai->id]);
2145 if (pre_div < 0) {
2146 dev_err(codec->dev, "Unsupported clock setting %d for DAI %d\n",
2147 rt5670->lrck[dai->id], dai->id);
2148 return -EINVAL;
2149 }
2150 frame_size = snd_soc_params_to_frame_size(params);
2151 if (frame_size < 0) {
2152 dev_err(codec->dev, "Unsupported frame size: %d\n", frame_size);
2153 return -EINVAL;
2154 }
2155 bclk_ms = frame_size > 32;
2156 rt5670->bclk[dai->id] = rt5670->lrck[dai->id] * (32 << bclk_ms);
2157
2158 dev_dbg(dai->dev, "bclk is %dHz and lrck is %dHz\n",
2159 rt5670->bclk[dai->id], rt5670->lrck[dai->id]);
2160 dev_dbg(dai->dev, "bclk_ms is %d and pre_div is %d for iis %d\n",
2161 bclk_ms, pre_div, dai->id);
2162
2163 switch (params_width(params)) {
2164 case 16:
2165 break;
2166 case 20:
2167 val_len |= RT5670_I2S_DL_20;
2168 break;
2169 case 24:
2170 val_len |= RT5670_I2S_DL_24;
2171 break;
2172 case 8:
2173 val_len |= RT5670_I2S_DL_8;
2174 break;
2175 default:
2176 return -EINVAL;
2177 }
2178
2179 switch (dai->id) {
2180 case RT5670_AIF1:
2181 mask_clk = RT5670_I2S_BCLK_MS1_MASK | RT5670_I2S_PD1_MASK;
2182 val_clk = bclk_ms << RT5670_I2S_BCLK_MS1_SFT |
2183 pre_div << RT5670_I2S_PD1_SFT;
2184 snd_soc_update_bits(codec, RT5670_I2S1_SDP,
2185 RT5670_I2S_DL_MASK, val_len);
2186 snd_soc_update_bits(codec, RT5670_ADDA_CLK1, mask_clk, val_clk);
2187 break;
2188 case RT5670_AIF2:
2189 mask_clk = RT5670_I2S_BCLK_MS2_MASK | RT5670_I2S_PD2_MASK;
2190 val_clk = bclk_ms << RT5670_I2S_BCLK_MS2_SFT |
2191 pre_div << RT5670_I2S_PD2_SFT;
2192 snd_soc_update_bits(codec, RT5670_I2S2_SDP,
2193 RT5670_I2S_DL_MASK, val_len);
2194 snd_soc_update_bits(codec, RT5670_ADDA_CLK1, mask_clk, val_clk);
2195 break;
2196 default:
2197 dev_err(codec->dev, "Invalid dai->id: %d\n", dai->id);
2198 return -EINVAL;
2199 }
2200
2201 return 0;
2202}
2203
2204static int rt5670_set_dai_fmt(struct snd_soc_dai *dai, unsigned int fmt)
2205{
2206 struct snd_soc_codec *codec = dai->codec;
2207 struct rt5670_priv *rt5670 = snd_soc_codec_get_drvdata(codec);
2208 unsigned int reg_val = 0;
2209
2210 switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) {
2211 case SND_SOC_DAIFMT_CBM_CFM:
2212 rt5670->master[dai->id] = 1;
2213 break;
2214 case SND_SOC_DAIFMT_CBS_CFS:
2215 reg_val |= RT5670_I2S_MS_S;
2216 rt5670->master[dai->id] = 0;
2217 break;
2218 default:
2219 return -EINVAL;
2220 }
2221
2222 switch (fmt & SND_SOC_DAIFMT_INV_MASK) {
2223 case SND_SOC_DAIFMT_NB_NF:
2224 break;
2225 case SND_SOC_DAIFMT_IB_NF:
2226 reg_val |= RT5670_I2S_BP_INV;
2227 break;
2228 default:
2229 return -EINVAL;
2230 }
2231
2232 switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) {
2233 case SND_SOC_DAIFMT_I2S:
2234 break;
2235 case SND_SOC_DAIFMT_LEFT_J:
2236 reg_val |= RT5670_I2S_DF_LEFT;
2237 break;
2238 case SND_SOC_DAIFMT_DSP_A:
2239 reg_val |= RT5670_I2S_DF_PCM_A;
2240 break;
2241 case SND_SOC_DAIFMT_DSP_B:
2242 reg_val |= RT5670_I2S_DF_PCM_B;
2243 break;
2244 default:
2245 return -EINVAL;
2246 }
2247
2248 switch (dai->id) {
2249 case RT5670_AIF1:
2250 snd_soc_update_bits(codec, RT5670_I2S1_SDP,
2251 RT5670_I2S_MS_MASK | RT5670_I2S_BP_MASK |
2252 RT5670_I2S_DF_MASK, reg_val);
2253 break;
2254 case RT5670_AIF2:
2255 snd_soc_update_bits(codec, RT5670_I2S2_SDP,
2256 RT5670_I2S_MS_MASK | RT5670_I2S_BP_MASK |
2257 RT5670_I2S_DF_MASK, reg_val);
2258 break;
2259 default:
2260 dev_err(codec->dev, "Invalid dai->id: %d\n", dai->id);
2261 return -EINVAL;
2262 }
2263 return 0;
2264}
2265
2266static int rt5670_set_dai_sysclk(struct snd_soc_dai *dai,
2267 int clk_id, unsigned int freq, int dir)
2268{
2269 struct snd_soc_codec *codec = dai->codec;
2270 struct rt5670_priv *rt5670 = snd_soc_codec_get_drvdata(codec);
2271 unsigned int reg_val = 0;
2272
2273 if (freq == rt5670->sysclk && clk_id == rt5670->sysclk_src)
2274 return 0;
2275
Bard Liao77e3ea22014-12-15 15:42:34 +08002276 if (rt5670->pdata.jd_mode) {
2277 if (clk_id == RT5670_SCLK_S_PLL1)
2278 snd_soc_dapm_force_enable_pin(&codec->dapm, "PLL1");
2279 else
2280 snd_soc_dapm_disable_pin(&codec->dapm, "PLL1");
2281 snd_soc_dapm_sync(&codec->dapm);
2282 }
Bard Liao5e8351d2014-06-30 20:31:13 +08002283 switch (clk_id) {
2284 case RT5670_SCLK_S_MCLK:
2285 reg_val |= RT5670_SCLK_SRC_MCLK;
2286 break;
2287 case RT5670_SCLK_S_PLL1:
2288 reg_val |= RT5670_SCLK_SRC_PLL1;
2289 break;
2290 case RT5670_SCLK_S_RCCLK:
2291 reg_val |= RT5670_SCLK_SRC_RCCLK;
2292 break;
2293 default:
2294 dev_err(codec->dev, "Invalid clock id (%d)\n", clk_id);
2295 return -EINVAL;
2296 }
2297 snd_soc_update_bits(codec, RT5670_GLB_CLK,
2298 RT5670_SCLK_SRC_MASK, reg_val);
2299 rt5670->sysclk = freq;
2300 rt5670->sysclk_src = clk_id;
2301
2302 dev_dbg(dai->dev, "Sysclk is %dHz and clock id is %d\n", freq, clk_id);
2303
2304 return 0;
2305}
2306
2307static int rt5670_set_dai_pll(struct snd_soc_dai *dai, int pll_id, int source,
2308 unsigned int freq_in, unsigned int freq_out)
2309{
2310 struct snd_soc_codec *codec = dai->codec;
2311 struct rt5670_priv *rt5670 = snd_soc_codec_get_drvdata(codec);
2312 struct rl6231_pll_code pll_code;
2313 int ret;
2314
2315 if (source == rt5670->pll_src && freq_in == rt5670->pll_in &&
2316 freq_out == rt5670->pll_out)
2317 return 0;
2318
2319 if (!freq_in || !freq_out) {
2320 dev_dbg(codec->dev, "PLL disabled\n");
2321
2322 rt5670->pll_in = 0;
2323 rt5670->pll_out = 0;
2324 snd_soc_update_bits(codec, RT5670_GLB_CLK,
2325 RT5670_SCLK_SRC_MASK, RT5670_SCLK_SRC_MCLK);
2326 return 0;
2327 }
2328
2329 switch (source) {
2330 case RT5670_PLL1_S_MCLK:
2331 snd_soc_update_bits(codec, RT5670_GLB_CLK,
2332 RT5670_PLL1_SRC_MASK, RT5670_PLL1_SRC_MCLK);
2333 break;
2334 case RT5670_PLL1_S_BCLK1:
2335 case RT5670_PLL1_S_BCLK2:
2336 case RT5670_PLL1_S_BCLK3:
2337 case RT5670_PLL1_S_BCLK4:
2338 switch (dai->id) {
2339 case RT5670_AIF1:
2340 snd_soc_update_bits(codec, RT5670_GLB_CLK,
2341 RT5670_PLL1_SRC_MASK, RT5670_PLL1_SRC_BCLK1);
2342 break;
2343 case RT5670_AIF2:
2344 snd_soc_update_bits(codec, RT5670_GLB_CLK,
2345 RT5670_PLL1_SRC_MASK, RT5670_PLL1_SRC_BCLK2);
2346 break;
2347 default:
2348 dev_err(codec->dev, "Invalid dai->id: %d\n", dai->id);
2349 return -EINVAL;
2350 }
2351 break;
2352 default:
2353 dev_err(codec->dev, "Unknown PLL source %d\n", source);
2354 return -EINVAL;
2355 }
2356
2357 ret = rl6231_pll_calc(freq_in, freq_out, &pll_code);
2358 if (ret < 0) {
2359 dev_err(codec->dev, "Unsupport input clock %d\n", freq_in);
2360 return ret;
2361 }
2362
2363 dev_dbg(codec->dev, "bypass=%d m=%d n=%d k=%d\n",
2364 pll_code.m_bp, (pll_code.m_bp ? 0 : pll_code.m_code),
2365 pll_code.n_code, pll_code.k_code);
2366
2367 snd_soc_write(codec, RT5670_PLL_CTRL1,
2368 pll_code.n_code << RT5670_PLL_N_SFT | pll_code.k_code);
2369 snd_soc_write(codec, RT5670_PLL_CTRL2,
2370 (pll_code.m_bp ? 0 : pll_code.m_code) << RT5670_PLL_M_SFT |
2371 pll_code.m_bp << RT5670_PLL_M_BP_SFT);
2372
2373 rt5670->pll_in = freq_in;
2374 rt5670->pll_out = freq_out;
2375 rt5670->pll_src = source;
2376
2377 return 0;
2378}
2379
2380static int rt5670_set_tdm_slot(struct snd_soc_dai *dai, unsigned int tx_mask,
2381 unsigned int rx_mask, int slots, int slot_width)
2382{
2383 struct snd_soc_codec *codec = dai->codec;
2384 unsigned int val = 0;
2385
2386 if (rx_mask || tx_mask)
2387 val |= (1 << 14);
2388
2389 switch (slots) {
2390 case 4:
2391 val |= (1 << 12);
2392 break;
2393 case 6:
2394 val |= (2 << 12);
2395 break;
2396 case 8:
2397 val |= (3 << 12);
2398 break;
2399 case 2:
2400 break;
2401 default:
2402 return -EINVAL;
2403 }
2404
2405 switch (slot_width) {
2406 case 20:
2407 val |= (1 << 10);
2408 break;
2409 case 24:
2410 val |= (2 << 10);
2411 break;
2412 case 32:
2413 val |= (3 << 10);
2414 break;
2415 case 16:
2416 break;
2417 default:
2418 return -EINVAL;
2419 }
2420
2421 snd_soc_update_bits(codec, RT5670_TDM_CTRL_1, 0x7c00, val);
2422
2423 return 0;
2424}
2425
2426static int rt5670_set_bias_level(struct snd_soc_codec *codec,
2427 enum snd_soc_bias_level level)
2428{
Bard Liao044b7242014-11-12 19:54:30 +08002429 struct rt5670_priv *rt5670 = snd_soc_codec_get_drvdata(codec);
2430
Bard Liao5e8351d2014-06-30 20:31:13 +08002431 switch (level) {
2432 case SND_SOC_BIAS_PREPARE:
2433 if (SND_SOC_BIAS_STANDBY == codec->dapm.bias_level) {
2434 snd_soc_update_bits(codec, RT5670_PWR_ANLG1,
2435 RT5670_PWR_VREF1 | RT5670_PWR_MB |
2436 RT5670_PWR_BG | RT5670_PWR_VREF2,
2437 RT5670_PWR_VREF1 | RT5670_PWR_MB |
2438 RT5670_PWR_BG | RT5670_PWR_VREF2);
2439 mdelay(10);
2440 snd_soc_update_bits(codec, RT5670_PWR_ANLG1,
2441 RT5670_PWR_FV1 | RT5670_PWR_FV2,
2442 RT5670_PWR_FV1 | RT5670_PWR_FV2);
2443 snd_soc_update_bits(codec, RT5670_CHARGE_PUMP,
2444 RT5670_OSW_L_MASK | RT5670_OSW_R_MASK,
2445 RT5670_OSW_L_DIS | RT5670_OSW_R_DIS);
2446 snd_soc_update_bits(codec, RT5670_DIG_MISC, 0x1, 0x1);
2447 snd_soc_update_bits(codec, RT5670_PWR_ANLG1,
2448 RT5670_LDO_SEL_MASK, 0x3);
2449 }
2450 break;
2451 case SND_SOC_BIAS_STANDBY:
Bard Liao044b7242014-11-12 19:54:30 +08002452 snd_soc_update_bits(codec, RT5670_PWR_ANLG1,
2453 RT5670_PWR_VREF1 | RT5670_PWR_VREF2 |
2454 RT5670_PWR_FV1 | RT5670_PWR_FV2, 0);
Bard Liao5e8351d2014-06-30 20:31:13 +08002455 snd_soc_update_bits(codec, RT5670_PWR_ANLG1,
2456 RT5670_LDO_SEL_MASK, 0x1);
2457 break;
Bard Liao044b7242014-11-12 19:54:30 +08002458 case SND_SOC_BIAS_OFF:
2459 if (rt5670->pdata.jd_mode)
2460 snd_soc_update_bits(codec, RT5670_PWR_ANLG1,
2461 RT5670_PWR_VREF1 | RT5670_PWR_MB |
2462 RT5670_PWR_BG | RT5670_PWR_VREF2 |
2463 RT5670_PWR_FV1 | RT5670_PWR_FV2,
2464 RT5670_PWR_MB | RT5670_PWR_BG);
2465 else
2466 snd_soc_update_bits(codec, RT5670_PWR_ANLG1,
2467 RT5670_PWR_VREF1 | RT5670_PWR_MB |
2468 RT5670_PWR_BG | RT5670_PWR_VREF2 |
2469 RT5670_PWR_FV1 | RT5670_PWR_FV2, 0);
2470
2471 snd_soc_update_bits(codec, RT5670_DIG_MISC, 0x1, 0x0);
2472 break;
Bard Liao5e8351d2014-06-30 20:31:13 +08002473
2474 default:
2475 break;
2476 }
2477 codec->dapm.bias_level = level;
2478
2479 return 0;
2480}
2481
2482static int rt5670_probe(struct snd_soc_codec *codec)
2483{
2484 struct rt5670_priv *rt5670 = snd_soc_codec_get_drvdata(codec);
2485
Bard Liao0cf18632014-11-11 17:59:50 +08002486 switch (snd_soc_read(codec, RT5670_RESET) & RT5670_ID_MASK) {
2487 case RT5670_ID_5670:
2488 case RT5670_ID_5671:
2489 snd_soc_dapm_new_controls(&codec->dapm,
2490 rt5670_specific_dapm_widgets,
2491 ARRAY_SIZE(rt5670_specific_dapm_widgets));
2492 snd_soc_dapm_add_routes(&codec->dapm,
2493 rt5670_specific_dapm_routes,
2494 ARRAY_SIZE(rt5670_specific_dapm_routes));
2495 break;
2496 case RT5670_ID_5672:
2497 snd_soc_dapm_new_controls(&codec->dapm,
2498 rt5672_specific_dapm_widgets,
2499 ARRAY_SIZE(rt5672_specific_dapm_widgets));
2500 snd_soc_dapm_add_routes(&codec->dapm,
2501 rt5672_specific_dapm_routes,
2502 ARRAY_SIZE(rt5672_specific_dapm_routes));
2503 break;
2504 default:
2505 dev_err(codec->dev,
2506 "The driver is for RT5670 RT5671 or RT5672 only\n");
2507 return -ENODEV;
2508 }
Bard Liao5e8351d2014-06-30 20:31:13 +08002509 rt5670->codec = codec;
2510
2511 return 0;
2512}
2513
2514static int rt5670_remove(struct snd_soc_codec *codec)
2515{
2516 struct rt5670_priv *rt5670 = snd_soc_codec_get_drvdata(codec);
2517
2518 regmap_write(rt5670->regmap, RT5670_RESET, 0);
2519 return 0;
2520}
2521
2522#ifdef CONFIG_PM
2523static int rt5670_suspend(struct snd_soc_codec *codec)
2524{
2525 struct rt5670_priv *rt5670 = snd_soc_codec_get_drvdata(codec);
2526
2527 regcache_cache_only(rt5670->regmap, true);
2528 regcache_mark_dirty(rt5670->regmap);
2529 return 0;
2530}
2531
2532static int rt5670_resume(struct snd_soc_codec *codec)
2533{
2534 struct rt5670_priv *rt5670 = snd_soc_codec_get_drvdata(codec);
2535
2536 regcache_cache_only(rt5670->regmap, false);
2537 regcache_sync(rt5670->regmap);
2538
2539 return 0;
2540}
2541#else
2542#define rt5670_suspend NULL
2543#define rt5670_resume NULL
2544#endif
2545
2546#define RT5670_STEREO_RATES SNDRV_PCM_RATE_8000_96000
2547#define RT5670_FORMATS (SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S20_3LE | \
2548 SNDRV_PCM_FMTBIT_S24_LE | SNDRV_PCM_FMTBIT_S8)
2549
Mark Brownff62b952014-08-01 17:22:19 +01002550static struct snd_soc_dai_ops rt5670_aif_dai_ops = {
Bard Liao5e8351d2014-06-30 20:31:13 +08002551 .hw_params = rt5670_hw_params,
2552 .set_fmt = rt5670_set_dai_fmt,
2553 .set_sysclk = rt5670_set_dai_sysclk,
2554 .set_tdm_slot = rt5670_set_tdm_slot,
2555 .set_pll = rt5670_set_dai_pll,
2556};
2557
Mark Brownff62b952014-08-01 17:22:19 +01002558static struct snd_soc_dai_driver rt5670_dai[] = {
Bard Liao5e8351d2014-06-30 20:31:13 +08002559 {
2560 .name = "rt5670-aif1",
2561 .id = RT5670_AIF1,
2562 .playback = {
2563 .stream_name = "AIF1 Playback",
2564 .channels_min = 1,
2565 .channels_max = 2,
2566 .rates = RT5670_STEREO_RATES,
2567 .formats = RT5670_FORMATS,
2568 },
2569 .capture = {
2570 .stream_name = "AIF1 Capture",
2571 .channels_min = 1,
2572 .channels_max = 2,
2573 .rates = RT5670_STEREO_RATES,
2574 .formats = RT5670_FORMATS,
2575 },
2576 .ops = &rt5670_aif_dai_ops,
2577 },
2578 {
2579 .name = "rt5670-aif2",
2580 .id = RT5670_AIF2,
2581 .playback = {
2582 .stream_name = "AIF2 Playback",
2583 .channels_min = 1,
2584 .channels_max = 2,
2585 .rates = RT5670_STEREO_RATES,
2586 .formats = RT5670_FORMATS,
2587 },
2588 .capture = {
2589 .stream_name = "AIF2 Capture",
2590 .channels_min = 1,
2591 .channels_max = 2,
2592 .rates = RT5670_STEREO_RATES,
2593 .formats = RT5670_FORMATS,
2594 },
2595 .ops = &rt5670_aif_dai_ops,
2596 },
2597};
2598
2599static struct snd_soc_codec_driver soc_codec_dev_rt5670 = {
2600 .probe = rt5670_probe,
2601 .remove = rt5670_remove,
2602 .suspend = rt5670_suspend,
2603 .resume = rt5670_resume,
2604 .set_bias_level = rt5670_set_bias_level,
2605 .idle_bias_off = true,
2606 .controls = rt5670_snd_controls,
2607 .num_controls = ARRAY_SIZE(rt5670_snd_controls),
2608 .dapm_widgets = rt5670_dapm_widgets,
2609 .num_dapm_widgets = ARRAY_SIZE(rt5670_dapm_widgets),
2610 .dapm_routes = rt5670_dapm_routes,
2611 .num_dapm_routes = ARRAY_SIZE(rt5670_dapm_routes),
2612};
2613
2614static const struct regmap_config rt5670_regmap = {
2615 .reg_bits = 8,
2616 .val_bits = 16,
2617 .max_register = RT5670_VENDOR_ID2 + 1 + (ARRAY_SIZE(rt5670_ranges) *
2618 RT5670_PR_SPACING),
2619 .volatile_reg = rt5670_volatile_register,
2620 .readable_reg = rt5670_readable_register,
2621 .cache_type = REGCACHE_RBTREE,
2622 .reg_defaults = rt5670_reg,
2623 .num_reg_defaults = ARRAY_SIZE(rt5670_reg),
2624 .ranges = rt5670_ranges,
2625 .num_ranges = ARRAY_SIZE(rt5670_ranges),
2626};
2627
2628static const struct i2c_device_id rt5670_i2c_id[] = {
2629 { "rt5670", 0 },
Bard Liao0cf18632014-11-11 17:59:50 +08002630 { "rt5671", 0 },
2631 { "rt5672", 0 },
Bard Liao5e8351d2014-06-30 20:31:13 +08002632 { }
2633};
2634MODULE_DEVICE_TABLE(i2c, rt5670_i2c_id);
2635
Mengdong Lin06058152014-11-14 15:51:34 +08002636#ifdef CONFIG_ACPI
2637static struct acpi_device_id rt5670_acpi_match[] = {
2638 { "10EC5670", 0},
2639 { },
2640};
2641MODULE_DEVICE_TABLE(acpi, rt5670_acpi_match);
2642#endif
2643
Bard Liao223c0552014-12-18 11:32:52 +08002644static const struct dmi_system_id dmi_platform_intel_braswell[] = {
2645 {
2646 .ident = "Intel Braswell",
2647 .matches = {
2648 DMI_MATCH(DMI_SYS_VENDOR, "Intel Corporation"),
2649 DMI_MATCH(DMI_BOARD_NAME, "Braswell CRB"),
2650 },
2651 },
2652 {}
2653};
2654
Bard Liao5e8351d2014-06-30 20:31:13 +08002655static int rt5670_i2c_probe(struct i2c_client *i2c,
2656 const struct i2c_device_id *id)
2657{
2658 struct rt5670_platform_data *pdata = dev_get_platdata(&i2c->dev);
2659 struct rt5670_priv *rt5670;
2660 int ret;
2661 unsigned int val;
2662
2663 rt5670 = devm_kzalloc(&i2c->dev,
2664 sizeof(struct rt5670_priv),
2665 GFP_KERNEL);
2666 if (NULL == rt5670)
2667 return -ENOMEM;
2668
2669 i2c_set_clientdata(i2c, rt5670);
2670
2671 if (pdata)
2672 rt5670->pdata = *pdata;
2673
Bard Liao223c0552014-12-18 11:32:52 +08002674 if (dmi_check_system(dmi_platform_intel_braswell)) {
2675 rt5670->pdata.dmic_en = true;
2676 rt5670->pdata.dmic1_data_pin = RT5670_DMIC_DATA_IN2P;
2677 rt5670->pdata.jd_mode = 1;
2678 }
2679
Bard Liao5e8351d2014-06-30 20:31:13 +08002680 rt5670->regmap = devm_regmap_init_i2c(i2c, &rt5670_regmap);
2681 if (IS_ERR(rt5670->regmap)) {
2682 ret = PTR_ERR(rt5670->regmap);
2683 dev_err(&i2c->dev, "Failed to allocate register map: %d\n",
2684 ret);
2685 return ret;
2686 }
2687
2688 regmap_read(rt5670->regmap, RT5670_VENDOR_ID2, &val);
2689 if (val != RT5670_DEVICE_ID) {
2690 dev_err(&i2c->dev,
2691 "Device with ID register %x is not rt5670/72\n", val);
2692 return -ENODEV;
2693 }
2694
2695 regmap_write(rt5670->regmap, RT5670_RESET, 0);
2696 regmap_update_bits(rt5670->regmap, RT5670_PWR_ANLG1,
2697 RT5670_PWR_HP_L | RT5670_PWR_HP_R |
2698 RT5670_PWR_VREF2, RT5670_PWR_VREF2);
2699 msleep(100);
2700
2701 regmap_write(rt5670->regmap, RT5670_RESET, 0);
2702
Bard Liao2bf9eba2015-03-03 18:31:29 +08002703 regmap_read(rt5670->regmap, RT5670_VENDOR_ID, &val);
2704 if (val >= 4)
2705 regmap_write(rt5670->regmap, RT5670_GPIO_CTRL3, 0x0980);
2706 else
2707 regmap_write(rt5670->regmap, RT5670_GPIO_CTRL3, 0x0d00);
2708
Bard Liao5e8351d2014-06-30 20:31:13 +08002709 ret = regmap_register_patch(rt5670->regmap, init_list,
2710 ARRAY_SIZE(init_list));
2711 if (ret != 0)
2712 dev_warn(&i2c->dev, "Failed to apply regmap patch: %d\n", ret);
2713
2714 if (rt5670->pdata.in2_diff)
2715 regmap_update_bits(rt5670->regmap, RT5670_IN2,
2716 RT5670_IN_DF2, RT5670_IN_DF2);
2717
2718 if (i2c->irq) {
2719 regmap_update_bits(rt5670->regmap, RT5670_GPIO_CTRL1,
2720 RT5670_GP1_PIN_MASK, RT5670_GP1_PIN_IRQ);
2721 regmap_update_bits(rt5670->regmap, RT5670_GPIO_CTRL2,
2722 RT5670_GP1_PF_MASK, RT5670_GP1_PF_OUT);
2723
2724 }
2725
2726 if (rt5670->pdata.jd_mode) {
Bard Liao77e3ea22014-12-15 15:42:34 +08002727 regmap_update_bits(rt5670->regmap, RT5670_GLB_CLK,
2728 RT5670_SCLK_SRC_MASK, RT5670_SCLK_SRC_RCCLK);
2729 rt5670->sysclk = 0;
2730 rt5670->sysclk_src = RT5670_SCLK_S_RCCLK;
Bard Liao5e8351d2014-06-30 20:31:13 +08002731 regmap_update_bits(rt5670->regmap, RT5670_PWR_ANLG1,
2732 RT5670_PWR_MB, RT5670_PWR_MB);
2733 regmap_update_bits(rt5670->regmap, RT5670_PWR_ANLG2,
2734 RT5670_PWR_JD1, RT5670_PWR_JD1);
2735 regmap_update_bits(rt5670->regmap, RT5670_IRQ_CTRL1,
2736 RT5670_JD1_1_EN_MASK, RT5670_JD1_1_EN);
2737 regmap_update_bits(rt5670->regmap, RT5670_JD_CTRL3,
2738 RT5670_JD_TRI_CBJ_SEL_MASK |
2739 RT5670_JD_TRI_HPO_SEL_MASK,
2740 RT5670_JD_CBJ_JD1_1 | RT5670_JD_HPO_JD1_1);
2741 switch (rt5670->pdata.jd_mode) {
2742 case 1:
2743 regmap_update_bits(rt5670->regmap, RT5670_A_JD_CTRL1,
2744 RT5670_JD1_MODE_MASK,
2745 RT5670_JD1_MODE_0);
2746 break;
2747 case 2:
2748 regmap_update_bits(rt5670->regmap, RT5670_A_JD_CTRL1,
2749 RT5670_JD1_MODE_MASK,
2750 RT5670_JD1_MODE_1);
2751 break;
2752 case 3:
2753 regmap_update_bits(rt5670->regmap, RT5670_A_JD_CTRL1,
2754 RT5670_JD1_MODE_MASK,
2755 RT5670_JD1_MODE_2);
2756 break;
2757 default:
2758 break;
2759 }
2760 }
2761
2762 if (rt5670->pdata.dmic_en) {
2763 regmap_update_bits(rt5670->regmap, RT5670_GPIO_CTRL1,
2764 RT5670_GP2_PIN_MASK,
2765 RT5670_GP2_PIN_DMIC1_SCL);
2766
2767 switch (rt5670->pdata.dmic1_data_pin) {
2768 case RT5670_DMIC_DATA_IN2P:
2769 regmap_update_bits(rt5670->regmap, RT5670_DMIC_CTRL1,
2770 RT5670_DMIC_1_DP_MASK,
2771 RT5670_DMIC_1_DP_IN2P);
2772 break;
2773
2774 case RT5670_DMIC_DATA_GPIO6:
2775 regmap_update_bits(rt5670->regmap, RT5670_DMIC_CTRL1,
2776 RT5670_DMIC_1_DP_MASK,
2777 RT5670_DMIC_1_DP_GPIO6);
2778 regmap_update_bits(rt5670->regmap, RT5670_GPIO_CTRL1,
2779 RT5670_GP6_PIN_MASK,
2780 RT5670_GP6_PIN_DMIC1_SDA);
2781 break;
2782
2783 case RT5670_DMIC_DATA_GPIO7:
2784 regmap_update_bits(rt5670->regmap, RT5670_DMIC_CTRL1,
2785 RT5670_DMIC_1_DP_MASK,
2786 RT5670_DMIC_1_DP_GPIO7);
2787 regmap_update_bits(rt5670->regmap, RT5670_GPIO_CTRL1,
2788 RT5670_GP7_PIN_MASK,
2789 RT5670_GP7_PIN_DMIC1_SDA);
2790 break;
2791
2792 default:
2793 break;
2794 }
2795
2796 switch (rt5670->pdata.dmic2_data_pin) {
2797 case RT5670_DMIC_DATA_IN3N:
2798 regmap_update_bits(rt5670->regmap, RT5670_DMIC_CTRL1,
2799 RT5670_DMIC_2_DP_MASK,
2800 RT5670_DMIC_2_DP_IN3N);
2801 break;
2802
2803 case RT5670_DMIC_DATA_GPIO8:
2804 regmap_update_bits(rt5670->regmap, RT5670_DMIC_CTRL1,
2805 RT5670_DMIC_2_DP_MASK,
2806 RT5670_DMIC_2_DP_GPIO8);
2807 regmap_update_bits(rt5670->regmap, RT5670_GPIO_CTRL1,
2808 RT5670_GP8_PIN_MASK,
2809 RT5670_GP8_PIN_DMIC2_SDA);
2810 break;
2811
2812 default:
2813 break;
2814 }
2815
2816 switch (rt5670->pdata.dmic3_data_pin) {
2817 case RT5670_DMIC_DATA_GPIO5:
2818 regmap_update_bits(rt5670->regmap, RT5670_DMIC_CTRL2,
2819 RT5670_DMIC_3_DP_MASK,
2820 RT5670_DMIC_3_DP_GPIO5);
2821 regmap_update_bits(rt5670->regmap, RT5670_GPIO_CTRL1,
2822 RT5670_GP5_PIN_MASK,
2823 RT5670_GP5_PIN_DMIC3_SDA);
2824 break;
2825
2826 case RT5670_DMIC_DATA_GPIO9:
2827 case RT5670_DMIC_DATA_GPIO10:
2828 dev_err(&i2c->dev,
2829 "Always use GPIO5 as DMIC3 data pin\n");
2830 break;
2831
2832 default:
2833 break;
2834 }
2835
2836 }
2837
Bard Liao64e89e52014-12-15 15:42:33 +08002838 pm_runtime_enable(&i2c->dev);
2839 pm_request_idle(&i2c->dev);
2840
Bard Liao5e8351d2014-06-30 20:31:13 +08002841 ret = snd_soc_register_codec(&i2c->dev, &soc_codec_dev_rt5670,
2842 rt5670_dai, ARRAY_SIZE(rt5670_dai));
2843 if (ret < 0)
2844 goto err;
2845
Bard Liao64e89e52014-12-15 15:42:33 +08002846 pm_runtime_put(&i2c->dev);
2847
Bard Liao5e8351d2014-06-30 20:31:13 +08002848 return 0;
2849err:
Bard Liao64e89e52014-12-15 15:42:33 +08002850 pm_runtime_disable(&i2c->dev);
2851
Bard Liao5e8351d2014-06-30 20:31:13 +08002852 return ret;
2853}
2854
2855static int rt5670_i2c_remove(struct i2c_client *i2c)
2856{
Bard Liao64e89e52014-12-15 15:42:33 +08002857 pm_runtime_disable(&i2c->dev);
Bard Liao5e8351d2014-06-30 20:31:13 +08002858 snd_soc_unregister_codec(&i2c->dev);
2859
2860 return 0;
2861}
2862
Mark Brownff62b952014-08-01 17:22:19 +01002863static struct i2c_driver rt5670_i2c_driver = {
Bard Liao5e8351d2014-06-30 20:31:13 +08002864 .driver = {
2865 .name = "rt5670",
2866 .owner = THIS_MODULE,
Mengdong Lin06058152014-11-14 15:51:34 +08002867 .acpi_match_table = ACPI_PTR(rt5670_acpi_match),
Bard Liao5e8351d2014-06-30 20:31:13 +08002868 },
2869 .probe = rt5670_i2c_probe,
2870 .remove = rt5670_i2c_remove,
2871 .id_table = rt5670_i2c_id,
2872};
2873
2874module_i2c_driver(rt5670_i2c_driver);
2875
2876MODULE_DESCRIPTION("ASoC RT5670 driver");
2877MODULE_AUTHOR("Bard Liao <bardliao@realtek.com>");
2878MODULE_LICENSE("GPL v2");