blob: bd0a3bd071673788427cd02a95817476d3687716 [file] [log] [blame]
Rob Clark16ea9752013-01-08 15:04:28 -06001/*
2 * Copyright (C) 2012 Texas Instruments
3 * Author: Rob Clark <robdclark@gmail.com>
4 *
5 * This program is free software; you can redistribute it and/or modify it
6 * under the terms of the GNU General Public License version 2 as published by
7 * the Free Software Foundation.
8 *
9 * This program is distributed in the hope that it will be useful, but WITHOUT
10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
12 * more details.
13 *
14 * You should have received a copy of the GNU General Public License along with
15 * this program. If not, see <http://www.gnu.org/licenses/>.
16 */
17
18/* LCDC DRM driver, based on da8xx-fb */
19
Jyri Sarha103cd8b2015-02-10 14:13:23 +020020#include <linux/component.h>
Dave Gerlach416a07f2014-07-29 06:27:58 +000021#include <linux/pinctrl/consumer.h>
22#include <linux/suspend.h>
Jyri Sarhaedc43302015-12-30 17:40:24 +020023#include <drm/drm_atomic.h>
24#include <drm/drm_atomic_helper.h>
Jyri Sarha103cd8b2015-02-10 14:13:23 +020025
Rob Clark16ea9752013-01-08 15:04:28 -060026#include "tilcdc_drv.h"
27#include "tilcdc_regs.h"
28#include "tilcdc_tfp410.h"
Rob Clark0d4bbaf2012-12-18 17:34:16 -060029#include "tilcdc_panel.h"
Jyri Sarha103cd8b2015-02-10 14:13:23 +020030#include "tilcdc_external.h"
Rob Clark16ea9752013-01-08 15:04:28 -060031
32#include "drm_fb_helper.h"
33
34static LIST_HEAD(module_list);
35
Jyri Sarhabcc5a6f2016-08-11 19:09:43 +030036static const u32 tilcdc_rev1_formats[] = { DRM_FORMAT_RGB565 };
37
38static const u32 tilcdc_straight_formats[] = { DRM_FORMAT_RGB565,
39 DRM_FORMAT_BGR888,
40 DRM_FORMAT_XBGR8888 };
41
42static const u32 tilcdc_crossed_formats[] = { DRM_FORMAT_BGR565,
43 DRM_FORMAT_RGB888,
44 DRM_FORMAT_XRGB8888 };
45
46static const u32 tilcdc_legacy_formats[] = { DRM_FORMAT_RGB565,
47 DRM_FORMAT_RGB888,
48 DRM_FORMAT_XRGB8888 };
49
Rob Clark16ea9752013-01-08 15:04:28 -060050void tilcdc_module_init(struct tilcdc_module *mod, const char *name,
51 const struct tilcdc_module_ops *funcs)
52{
53 mod->name = name;
54 mod->funcs = funcs;
55 INIT_LIST_HEAD(&mod->list);
56 list_add(&mod->list, &module_list);
57}
58
59void tilcdc_module_cleanup(struct tilcdc_module *mod)
60{
61 list_del(&mod->list);
62}
63
64static struct of_device_id tilcdc_of_match[];
65
66static struct drm_framebuffer *tilcdc_fb_create(struct drm_device *dev,
Ville Syrjälä1eb834512015-11-11 19:11:29 +020067 struct drm_file *file_priv, const struct drm_mode_fb_cmd2 *mode_cmd)
Rob Clark16ea9752013-01-08 15:04:28 -060068{
69 return drm_fb_cma_create(dev, file_priv, mode_cmd);
70}
71
72static void tilcdc_fb_output_poll_changed(struct drm_device *dev)
73{
74 struct tilcdc_drm_private *priv = dev->dev_private;
Markus Elfringc08448172014-11-19 17:05:20 +010075 drm_fbdev_cma_hotplug_event(priv->fbdev);
Rob Clark16ea9752013-01-08 15:04:28 -060076}
77
Wei Yongjun30457672016-09-10 12:32:57 +000078static int tilcdc_atomic_check(struct drm_device *dev,
79 struct drm_atomic_state *state)
Jyri Sarhaedc43302015-12-30 17:40:24 +020080{
81 int ret;
82
83 ret = drm_atomic_helper_check_modeset(dev, state);
84 if (ret)
85 return ret;
86
87 ret = drm_atomic_helper_check_planes(dev, state);
88 if (ret)
89 return ret;
90
91 /*
92 * tilcdc ->atomic_check can update ->mode_changed if pixel format
93 * changes, hence will we check modeset changes again.
94 */
95 ret = drm_atomic_helper_check_modeset(dev, state);
96 if (ret)
97 return ret;
98
99 return ret;
100}
101
102static int tilcdc_commit(struct drm_device *dev,
103 struct drm_atomic_state *state,
104 bool async)
105{
106 int ret;
107
108 ret = drm_atomic_helper_prepare_planes(dev, state);
109 if (ret)
110 return ret;
111
112 drm_atomic_helper_swap_state(state, true);
113
114 /*
115 * Everything below can be run asynchronously without the need to grab
116 * any modeset locks at all under one condition: It must be guaranteed
117 * that the asynchronous work has either been cancelled (if the driver
118 * supports it, which at least requires that the framebuffers get
119 * cleaned up with drm_atomic_helper_cleanup_planes()) or completed
120 * before the new state gets committed on the software side with
121 * drm_atomic_helper_swap_state().
122 *
123 * This scheme allows new atomic state updates to be prepared and
124 * checked in parallel to the asynchronous completion of the previous
125 * update. Which is important since compositors need to figure out the
126 * composition of the next frame right after having submitted the
127 * current layout.
128 */
129
130 drm_atomic_helper_commit_modeset_disables(dev, state);
131
Liu Ying2b58e982016-08-29 17:12:03 +0800132 drm_atomic_helper_commit_planes(dev, state, 0);
Jyri Sarhaedc43302015-12-30 17:40:24 +0200133
134 drm_atomic_helper_commit_modeset_enables(dev, state);
135
136 drm_atomic_helper_wait_for_vblanks(dev, state);
137
138 drm_atomic_helper_cleanup_planes(dev, state);
139
Jyri Sarhaedc43302015-12-30 17:40:24 +0200140 return 0;
141}
142
Rob Clark16ea9752013-01-08 15:04:28 -0600143static const struct drm_mode_config_funcs mode_config_funcs = {
144 .fb_create = tilcdc_fb_create,
145 .output_poll_changed = tilcdc_fb_output_poll_changed,
Jyri Sarhaedc43302015-12-30 17:40:24 +0200146 .atomic_check = tilcdc_atomic_check,
147 .atomic_commit = tilcdc_commit,
Rob Clark16ea9752013-01-08 15:04:28 -0600148};
149
Jyri Sarha9963d362016-11-15 22:56:46 +0200150static void modeset_init(struct drm_device *dev)
Rob Clark16ea9752013-01-08 15:04:28 -0600151{
152 struct tilcdc_drm_private *priv = dev->dev_private;
153 struct tilcdc_module *mod;
154
Rob Clark16ea9752013-01-08 15:04:28 -0600155 list_for_each_entry(mod, &module_list, list) {
156 DBG("loading module: %s", mod->name);
157 mod->funcs->modeset_init(mod, dev);
158 }
159
Rob Clark16ea9752013-01-08 15:04:28 -0600160 dev->mode_config.min_width = 0;
161 dev->mode_config.min_height = 0;
162 dev->mode_config.max_width = tilcdc_crtc_max_width(priv->crtc);
163 dev->mode_config.max_height = 2048;
164 dev->mode_config.funcs = &mode_config_funcs;
Rob Clark16ea9752013-01-08 15:04:28 -0600165}
166
167#ifdef CONFIG_CPU_FREQ
168static int cpufreq_transition(struct notifier_block *nb,
169 unsigned long val, void *data)
170{
171 struct tilcdc_drm_private *priv = container_of(nb,
172 struct tilcdc_drm_private, freq_transition);
Jyri Sarhaa6b7eba2016-09-05 20:39:32 +0300173
Jyri Sarha642e5162016-09-06 16:19:54 +0300174 if (val == CPUFREQ_POSTCHANGE)
175 tilcdc_crtc_update_clk(priv->crtc);
Rob Clark16ea9752013-01-08 15:04:28 -0600176
177 return 0;
178}
179#endif
180
181/*
182 * DRM operations:
183 */
184
Jyri Sarha923310b2016-10-17 17:53:33 +0300185static void tilcdc_fini(struct drm_device *dev)
Rob Clark16ea9752013-01-08 15:04:28 -0600186{
187 struct tilcdc_drm_private *priv = dev->dev_private;
Rob Clark16ea9752013-01-08 15:04:28 -0600188
Jyri Sarha9e79e062016-10-18 23:23:27 +0300189 if (priv->crtc)
Jyri Sarha2d53a182016-10-25 12:27:31 +0300190 tilcdc_crtc_shutdown(priv->crtc);
Jyri Sarha103cd8b2015-02-10 14:13:23 +0200191
Jyri Sarha9e79e062016-10-18 23:23:27 +0300192 if (priv->is_registered)
193 drm_dev_unregister(dev);
Jyri Sarha923310b2016-10-17 17:53:33 +0300194
Rob Clark16ea9752013-01-08 15:04:28 -0600195 drm_kms_helper_poll_fini(dev);
Jyri Sarha9e79e062016-10-18 23:23:27 +0300196
197 if (priv->fbdev)
198 drm_fbdev_cma_fini(priv->fbdev);
199
Rob Clark16ea9752013-01-08 15:04:28 -0600200 drm_irq_uninstall(dev);
Jyri Sarha923310b2016-10-17 17:53:33 +0300201 drm_mode_config_cleanup(dev);
Jyri Sarhaec9eab02016-10-31 17:34:22 +0200202 tilcdc_remove_external_device(dev);
Rob Clark16ea9752013-01-08 15:04:28 -0600203
204#ifdef CONFIG_CPU_FREQ
Jyri Sarha9e79e062016-10-18 23:23:27 +0300205 if (priv->freq_transition.notifier_call)
206 cpufreq_unregister_notifier(&priv->freq_transition,
207 CPUFREQ_TRANSITION_NOTIFIER);
Rob Clark16ea9752013-01-08 15:04:28 -0600208#endif
209
210 if (priv->clk)
211 clk_put(priv->clk);
212
213 if (priv->mmio)
214 iounmap(priv->mmio);
215
Jyri Sarha9e79e062016-10-18 23:23:27 +0300216 if (priv->wq) {
217 flush_workqueue(priv->wq);
218 destroy_workqueue(priv->wq);
219 }
Rob Clark16ea9752013-01-08 15:04:28 -0600220
221 dev->dev_private = NULL;
222
223 pm_runtime_disable(dev->dev);
224
Jyri Sarha923310b2016-10-17 17:53:33 +0300225 drm_dev_unref(dev);
Rob Clark16ea9752013-01-08 15:04:28 -0600226}
227
Jyri Sarha923310b2016-10-17 17:53:33 +0300228static int tilcdc_init(struct drm_driver *ddrv, struct device *dev)
Rob Clark16ea9752013-01-08 15:04:28 -0600229{
Jyri Sarha923310b2016-10-17 17:53:33 +0300230 struct drm_device *ddev;
231 struct platform_device *pdev = to_platform_device(dev);
232 struct device_node *node = dev->of_node;
Rob Clark16ea9752013-01-08 15:04:28 -0600233 struct tilcdc_drm_private *priv;
234 struct resource *res;
Benoit Parrotdc28aa02013-06-18 17:18:31 -0500235 u32 bpp = 0;
Rob Clark16ea9752013-01-08 15:04:28 -0600236 int ret;
237
Jyri Sarha923310b2016-10-17 17:53:33 +0300238 priv = devm_kzalloc(dev, sizeof(*priv), GFP_KERNEL);
Jyri Sarha514d1a12016-06-16 11:28:23 +0300239 if (!priv) {
Jyri Sarha923310b2016-10-17 17:53:33 +0300240 dev_err(dev, "failed to allocate private data\n");
Rob Clark16ea9752013-01-08 15:04:28 -0600241 return -ENOMEM;
242 }
243
Jyri Sarha923310b2016-10-17 17:53:33 +0300244 ddev = drm_dev_alloc(ddrv, dev);
245 if (IS_ERR(ddev))
246 return PTR_ERR(ddev);
247
248 ddev->platformdev = pdev;
249 ddev->dev_private = priv;
Jyri Sarha9e79e062016-10-18 23:23:27 +0300250 platform_set_drvdata(pdev, ddev);
251 drm_mode_config_init(ddev);
Rob Clark16ea9752013-01-08 15:04:28 -0600252
Jyri Sarha103cd8b2015-02-10 14:13:23 +0200253 priv->is_componentized =
Jyri Sarha923310b2016-10-17 17:53:33 +0300254 tilcdc_get_external_components(dev, NULL) > 0;
Jyri Sarha103cd8b2015-02-10 14:13:23 +0200255
Rob Clark16ea9752013-01-08 15:04:28 -0600256 priv->wq = alloc_ordered_workqueue("tilcdc", 0);
Ezequiel Garciab478e336b2014-09-02 09:51:15 -0300257 if (!priv->wq) {
258 ret = -ENOMEM;
Jyri Sarha9e79e062016-10-18 23:23:27 +0300259 goto init_failed;
Ezequiel Garciab478e336b2014-09-02 09:51:15 -0300260 }
Rob Clark16ea9752013-01-08 15:04:28 -0600261
262 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
263 if (!res) {
Jyri Sarha923310b2016-10-17 17:53:33 +0300264 dev_err(dev, "failed to get memory resource\n");
Rob Clark16ea9752013-01-08 15:04:28 -0600265 ret = -EINVAL;
Jyri Sarha9e79e062016-10-18 23:23:27 +0300266 goto init_failed;
Rob Clark16ea9752013-01-08 15:04:28 -0600267 }
268
269 priv->mmio = ioremap_nocache(res->start, resource_size(res));
270 if (!priv->mmio) {
Jyri Sarha923310b2016-10-17 17:53:33 +0300271 dev_err(dev, "failed to ioremap\n");
Rob Clark16ea9752013-01-08 15:04:28 -0600272 ret = -ENOMEM;
Jyri Sarha9e79e062016-10-18 23:23:27 +0300273 goto init_failed;
Rob Clark16ea9752013-01-08 15:04:28 -0600274 }
275
Jyri Sarha923310b2016-10-17 17:53:33 +0300276 priv->clk = clk_get(dev, "fck");
Rob Clark16ea9752013-01-08 15:04:28 -0600277 if (IS_ERR(priv->clk)) {
Jyri Sarha923310b2016-10-17 17:53:33 +0300278 dev_err(dev, "failed to get functional clock\n");
Rob Clark16ea9752013-01-08 15:04:28 -0600279 ret = -ENODEV;
Jyri Sarha9e79e062016-10-18 23:23:27 +0300280 goto init_failed;
Rob Clark16ea9752013-01-08 15:04:28 -0600281 }
282
Rob Clark16ea9752013-01-08 15:04:28 -0600283#ifdef CONFIG_CPU_FREQ
Rob Clark16ea9752013-01-08 15:04:28 -0600284 priv->freq_transition.notifier_call = cpufreq_transition;
285 ret = cpufreq_register_notifier(&priv->freq_transition,
286 CPUFREQ_TRANSITION_NOTIFIER);
287 if (ret) {
Jyri Sarha923310b2016-10-17 17:53:33 +0300288 dev_err(dev, "failed to register cpufreq notifier\n");
Jyri Sarha9e79e062016-10-18 23:23:27 +0300289 priv->freq_transition.notifier_call = NULL;
290 goto init_failed;
Rob Clark16ea9752013-01-08 15:04:28 -0600291 }
292#endif
293
294 if (of_property_read_u32(node, "max-bandwidth", &priv->max_bandwidth))
Darren Etheridge4e564342013-06-21 13:52:23 -0500295 priv->max_bandwidth = TILCDC_DEFAULT_MAX_BANDWIDTH;
296
297 DBG("Maximum Bandwidth Value %d", priv->max_bandwidth);
298
Bartosz Golaszewski0186fcc2016-11-28 12:37:23 +0100299 if (of_property_read_u32(node, "max-width", &priv->max_width))
Darren Etheridge4e564342013-06-21 13:52:23 -0500300 priv->max_width = TILCDC_DEFAULT_MAX_WIDTH;
301
302 DBG("Maximum Horizontal Pixel Width Value %dpixels", priv->max_width);
303
Bartosz Golaszewski0186fcc2016-11-28 12:37:23 +0100304 if (of_property_read_u32(node, "max-pixelclock",
Darren Etheridge4e564342013-06-21 13:52:23 -0500305 &priv->max_pixelclock))
306 priv->max_pixelclock = TILCDC_DEFAULT_MAX_PIXELCLOCK;
307
308 DBG("Maximum Pixel Clock Value %dKHz", priv->max_pixelclock);
Rob Clark16ea9752013-01-08 15:04:28 -0600309
Jyri Sarha923310b2016-10-17 17:53:33 +0300310 pm_runtime_enable(dev);
Rob Clark16ea9752013-01-08 15:04:28 -0600311
312 /* Determine LCD IP Version */
Jyri Sarha923310b2016-10-17 17:53:33 +0300313 pm_runtime_get_sync(dev);
314 switch (tilcdc_read(ddev, LCDC_PID_REG)) {
Rob Clark16ea9752013-01-08 15:04:28 -0600315 case 0x4c100102:
316 priv->rev = 1;
317 break;
318 case 0x4f200800:
319 case 0x4f201000:
320 priv->rev = 2;
321 break;
322 default:
Jyri Sarha923310b2016-10-17 17:53:33 +0300323 dev_warn(dev, "Unknown PID Reg value 0x%08x, "
324 "defaulting to LCD revision 1\n",
325 tilcdc_read(ddev, LCDC_PID_REG));
Rob Clark16ea9752013-01-08 15:04:28 -0600326 priv->rev = 1;
327 break;
328 }
329
Jyri Sarha923310b2016-10-17 17:53:33 +0300330 pm_runtime_put_sync(dev);
Rob Clark16ea9752013-01-08 15:04:28 -0600331
Jyri Sarhabcc5a6f2016-08-11 19:09:43 +0300332 if (priv->rev == 1) {
333 DBG("Revision 1 LCDC supports only RGB565 format");
334 priv->pixelformats = tilcdc_rev1_formats;
335 priv->num_pixelformats = ARRAY_SIZE(tilcdc_rev1_formats);
Jyri Sarhac5665382016-08-13 21:08:20 +0300336 bpp = 16;
Jyri Sarhabcc5a6f2016-08-11 19:09:43 +0300337 } else {
338 const char *str = "\0";
339
340 of_property_read_string(node, "blue-and-red-wiring", &str);
341 if (0 == strcmp(str, "crossed")) {
342 DBG("Configured for crossed blue and red wires");
343 priv->pixelformats = tilcdc_crossed_formats;
344 priv->num_pixelformats =
345 ARRAY_SIZE(tilcdc_crossed_formats);
Jyri Sarhac5665382016-08-13 21:08:20 +0300346 bpp = 32; /* Choose bpp with RGB support for fbdef */
Jyri Sarhabcc5a6f2016-08-11 19:09:43 +0300347 } else if (0 == strcmp(str, "straight")) {
348 DBG("Configured for straight blue and red wires");
349 priv->pixelformats = tilcdc_straight_formats;
350 priv->num_pixelformats =
351 ARRAY_SIZE(tilcdc_straight_formats);
Jyri Sarhac5665382016-08-13 21:08:20 +0300352 bpp = 16; /* Choose bpp with RGB support for fbdef */
Jyri Sarhabcc5a6f2016-08-11 19:09:43 +0300353 } else {
354 DBG("Blue and red wiring '%s' unknown, use legacy mode",
355 str);
356 priv->pixelformats = tilcdc_legacy_formats;
357 priv->num_pixelformats =
358 ARRAY_SIZE(tilcdc_legacy_formats);
Jyri Sarhac5665382016-08-13 21:08:20 +0300359 bpp = 16; /* This is just a guess */
Jyri Sarhabcc5a6f2016-08-11 19:09:43 +0300360 }
361 }
362
Jyri Sarha9963d362016-11-15 22:56:46 +0200363 ret = tilcdc_crtc_create(ddev);
Rob Clark16ea9752013-01-08 15:04:28 -0600364 if (ret < 0) {
Jyri Sarha9963d362016-11-15 22:56:46 +0200365 dev_err(dev, "failed to create crtc\n");
Jyri Sarha9e79e062016-10-18 23:23:27 +0300366 goto init_failed;
Rob Clark16ea9752013-01-08 15:04:28 -0600367 }
Jyri Sarha9963d362016-11-15 22:56:46 +0200368 modeset_init(ddev);
Rob Clark16ea9752013-01-08 15:04:28 -0600369
Jyri Sarha103cd8b2015-02-10 14:13:23 +0200370 if (priv->is_componentized) {
Jyri Sarha923310b2016-10-17 17:53:33 +0300371 ret = component_bind_all(dev, ddev);
Jyri Sarha103cd8b2015-02-10 14:13:23 +0200372 if (ret < 0)
Jyri Sarha9e79e062016-10-18 23:23:27 +0300373 goto init_failed;
Jyri Sarha103cd8b2015-02-10 14:13:23 +0200374
Jyri Sarhaec9eab02016-10-31 17:34:22 +0200375 ret = tilcdc_add_component_encoder(ddev);
Jyri Sarha103cd8b2015-02-10 14:13:23 +0200376 if (ret < 0)
Jyri Sarha9e79e062016-10-18 23:23:27 +0300377 goto init_failed;
Jyri Sarhaec9eab02016-10-31 17:34:22 +0200378 } else {
379 ret = tilcdc_attach_external_device(ddev);
380 if (ret)
381 goto init_failed;
Jyri Sarha103cd8b2015-02-10 14:13:23 +0200382 }
383
Jyri Sarhaec9eab02016-10-31 17:34:22 +0200384 if (!priv->external_connector &&
385 ((priv->num_encoders == 0) || (priv->num_connectors == 0))) {
Jyri Sarha923310b2016-10-17 17:53:33 +0300386 dev_err(dev, "no encoders/connectors found\n");
Jyri Sarha103cd8b2015-02-10 14:13:23 +0200387 ret = -ENXIO;
Jyri Sarha9e79e062016-10-18 23:23:27 +0300388 goto init_failed;
Jyri Sarha103cd8b2015-02-10 14:13:23 +0200389 }
390
Jyri Sarha923310b2016-10-17 17:53:33 +0300391 ret = drm_vblank_init(ddev, 1);
Rob Clark16ea9752013-01-08 15:04:28 -0600392 if (ret < 0) {
Jyri Sarha923310b2016-10-17 17:53:33 +0300393 dev_err(dev, "failed to initialize vblank\n");
Jyri Sarha9e79e062016-10-18 23:23:27 +0300394 goto init_failed;
Rob Clark16ea9752013-01-08 15:04:28 -0600395 }
396
Jyri Sarha923310b2016-10-17 17:53:33 +0300397 ret = drm_irq_install(ddev, platform_get_irq(pdev, 0));
Rob Clark16ea9752013-01-08 15:04:28 -0600398 if (ret < 0) {
Jyri Sarha923310b2016-10-17 17:53:33 +0300399 dev_err(dev, "failed to install IRQ handler\n");
Jyri Sarha9e79e062016-10-18 23:23:27 +0300400 goto init_failed;
Rob Clark16ea9752013-01-08 15:04:28 -0600401 }
402
Jyri Sarha923310b2016-10-17 17:53:33 +0300403 drm_mode_config_reset(ddev);
Jyri Sarha522a76f2015-12-29 17:27:32 +0200404
Jyri Sarha923310b2016-10-17 17:53:33 +0300405 priv->fbdev = drm_fbdev_cma_init(ddev, bpp,
406 ddev->mode_config.num_crtc,
407 ddev->mode_config.num_connector);
Ezequiel Garciab478e336b2014-09-02 09:51:15 -0300408 if (IS_ERR(priv->fbdev)) {
409 ret = PTR_ERR(priv->fbdev);
Jyri Sarha9e79e062016-10-18 23:23:27 +0300410 goto init_failed;
Ezequiel Garciab478e336b2014-09-02 09:51:15 -0300411 }
Rob Clark16ea9752013-01-08 15:04:28 -0600412
Jyri Sarha923310b2016-10-17 17:53:33 +0300413 drm_kms_helper_poll_init(ddev);
414
415 ret = drm_dev_register(ddev, 0);
416 if (ret)
Jyri Sarha9e79e062016-10-18 23:23:27 +0300417 goto init_failed;
Rob Clark16ea9752013-01-08 15:04:28 -0600418
Jyri Sarha9e79e062016-10-18 23:23:27 +0300419 priv->is_registered = true;
Rob Clark16ea9752013-01-08 15:04:28 -0600420 return 0;
421
Jyri Sarha9e79e062016-10-18 23:23:27 +0300422init_failed:
423 tilcdc_fini(ddev);
Jyri Sarhad0ec32c2016-02-23 12:44:27 +0200424
Rob Clark16ea9752013-01-08 15:04:28 -0600425 return ret;
426}
427
Rob Clark16ea9752013-01-08 15:04:28 -0600428static void tilcdc_lastclose(struct drm_device *dev)
429{
430 struct tilcdc_drm_private *priv = dev->dev_private;
431 drm_fbdev_cma_restore_mode(priv->fbdev);
432}
433
Daniel Vettere9f0d762013-12-11 11:34:42 +0100434static irqreturn_t tilcdc_irq(int irq, void *arg)
Rob Clark16ea9752013-01-08 15:04:28 -0600435{
436 struct drm_device *dev = arg;
437 struct tilcdc_drm_private *priv = dev->dev_private;
438 return tilcdc_crtc_irq(priv->crtc);
439}
440
Thierry Reding88e72712015-09-24 18:35:31 +0200441static int tilcdc_enable_vblank(struct drm_device *dev, unsigned int pipe)
Rob Clark16ea9752013-01-08 15:04:28 -0600442{
Rob Clark16ea9752013-01-08 15:04:28 -0600443 return 0;
444}
445
Thierry Reding88e72712015-09-24 18:35:31 +0200446static void tilcdc_disable_vblank(struct drm_device *dev, unsigned int pipe)
Rob Clark16ea9752013-01-08 15:04:28 -0600447{
Tomi Valkeinen2b2080d2015-10-20 09:37:27 +0300448 return;
Rob Clark16ea9752013-01-08 15:04:28 -0600449}
450
Jyri Sarha514d1a12016-06-16 11:28:23 +0300451#if defined(CONFIG_DEBUG_FS)
Rob Clark16ea9752013-01-08 15:04:28 -0600452static const struct {
453 const char *name;
454 uint8_t rev;
455 uint8_t save;
456 uint32_t reg;
Sachin Kamat32501452013-03-02 15:53:08 +0530457} registers[] = {
Rob Clark16ea9752013-01-08 15:04:28 -0600458#define REG(rev, save, reg) { #reg, rev, save, reg }
459 /* exists in revision 1: */
460 REG(1, false, LCDC_PID_REG),
461 REG(1, true, LCDC_CTRL_REG),
462 REG(1, false, LCDC_STAT_REG),
463 REG(1, true, LCDC_RASTER_CTRL_REG),
464 REG(1, true, LCDC_RASTER_TIMING_0_REG),
465 REG(1, true, LCDC_RASTER_TIMING_1_REG),
466 REG(1, true, LCDC_RASTER_TIMING_2_REG),
467 REG(1, true, LCDC_DMA_CTRL_REG),
468 REG(1, true, LCDC_DMA_FB_BASE_ADDR_0_REG),
469 REG(1, true, LCDC_DMA_FB_CEILING_ADDR_0_REG),
470 REG(1, true, LCDC_DMA_FB_BASE_ADDR_1_REG),
471 REG(1, true, LCDC_DMA_FB_CEILING_ADDR_1_REG),
472 /* new in revision 2: */
473 REG(2, false, LCDC_RAW_STAT_REG),
474 REG(2, false, LCDC_MASKED_STAT_REG),
Jyri Sarhaf3a99942016-01-08 12:17:50 +0200475 REG(2, true, LCDC_INT_ENABLE_SET_REG),
Rob Clark16ea9752013-01-08 15:04:28 -0600476 REG(2, false, LCDC_INT_ENABLE_CLR_REG),
477 REG(2, false, LCDC_END_OF_INT_IND_REG),
478 REG(2, true, LCDC_CLK_ENABLE_REG),
Rob Clark16ea9752013-01-08 15:04:28 -0600479#undef REG
480};
Jyri Sarha29ddd6e2015-07-02 16:26:12 +0300481
Rob Clark16ea9752013-01-08 15:04:28 -0600482#endif
483
484#ifdef CONFIG_DEBUG_FS
485static int tilcdc_regs_show(struct seq_file *m, void *arg)
486{
487 struct drm_info_node *node = (struct drm_info_node *) m->private;
488 struct drm_device *dev = node->minor->dev;
489 struct tilcdc_drm_private *priv = dev->dev_private;
490 unsigned i;
491
492 pm_runtime_get_sync(dev->dev);
493
494 seq_printf(m, "revision: %d\n", priv->rev);
495
496 for (i = 0; i < ARRAY_SIZE(registers); i++)
497 if (priv->rev >= registers[i].rev)
498 seq_printf(m, "%s:\t %08x\n", registers[i].name,
499 tilcdc_read(dev, registers[i].reg));
500
501 pm_runtime_put_sync(dev->dev);
502
503 return 0;
504}
505
506static int tilcdc_mm_show(struct seq_file *m, void *arg)
507{
508 struct drm_info_node *node = (struct drm_info_node *) m->private;
509 struct drm_device *dev = node->minor->dev;
Daniel Vetterb04a5902013-12-11 14:24:46 +0100510 return drm_mm_dump_table(m, &dev->vma_offset_manager->vm_addr_space_mm);
Rob Clark16ea9752013-01-08 15:04:28 -0600511}
512
513static struct drm_info_list tilcdc_debugfs_list[] = {
514 { "regs", tilcdc_regs_show, 0 },
515 { "mm", tilcdc_mm_show, 0 },
516 { "fb", drm_fb_cma_debugfs_show, 0 },
517};
518
519static int tilcdc_debugfs_init(struct drm_minor *minor)
520{
521 struct drm_device *dev = minor->dev;
522 struct tilcdc_module *mod;
523 int ret;
524
525 ret = drm_debugfs_create_files(tilcdc_debugfs_list,
526 ARRAY_SIZE(tilcdc_debugfs_list),
527 minor->debugfs_root, minor);
528
529 list_for_each_entry(mod, &module_list, list)
530 if (mod->funcs->debugfs_init)
531 mod->funcs->debugfs_init(mod, minor);
532
533 if (ret) {
534 dev_err(dev->dev, "could not install tilcdc_debugfs_list\n");
535 return ret;
536 }
537
538 return ret;
539}
540
541static void tilcdc_debugfs_cleanup(struct drm_minor *minor)
542{
543 struct tilcdc_module *mod;
544 drm_debugfs_remove_files(tilcdc_debugfs_list,
545 ARRAY_SIZE(tilcdc_debugfs_list), minor);
546
547 list_for_each_entry(mod, &module_list, list)
548 if (mod->funcs->debugfs_cleanup)
549 mod->funcs->debugfs_cleanup(mod, minor);
550}
551#endif
552
553static const struct file_operations fops = {
554 .owner = THIS_MODULE,
555 .open = drm_open,
556 .release = drm_release,
557 .unlocked_ioctl = drm_ioctl,
Rob Clark16ea9752013-01-08 15:04:28 -0600558 .compat_ioctl = drm_compat_ioctl,
Rob Clark16ea9752013-01-08 15:04:28 -0600559 .poll = drm_poll,
560 .read = drm_read,
Rob Clark16ea9752013-01-08 15:04:28 -0600561 .llseek = no_llseek,
562 .mmap = drm_gem_cma_mmap,
563};
564
565static struct drm_driver tilcdc_driver = {
Jyri Sarha9c153902015-06-23 14:31:17 +0300566 .driver_features = (DRIVER_HAVE_IRQ | DRIVER_GEM | DRIVER_MODESET |
Jyri Sarha305198d2016-04-07 15:05:16 +0300567 DRIVER_PRIME | DRIVER_ATOMIC),
Rob Clark16ea9752013-01-08 15:04:28 -0600568 .lastclose = tilcdc_lastclose,
569 .irq_handler = tilcdc_irq,
Ville Syrjäläb44f8402015-09-30 16:46:48 +0300570 .get_vblank_counter = drm_vblank_no_hw_counter,
Rob Clark16ea9752013-01-08 15:04:28 -0600571 .enable_vblank = tilcdc_enable_vblank,
572 .disable_vblank = tilcdc_disable_vblank,
Daniel Vetteraa0438c2016-05-30 19:53:05 +0200573 .gem_free_object_unlocked = drm_gem_cma_free_object,
Rob Clark16ea9752013-01-08 15:04:28 -0600574 .gem_vm_ops = &drm_gem_cma_vm_ops,
575 .dumb_create = drm_gem_cma_dumb_create,
576 .dumb_map_offset = drm_gem_cma_dumb_map_offset,
Daniel Vetter43387b32013-07-16 09:12:04 +0200577 .dumb_destroy = drm_gem_dumb_destroy,
Jyri Sarha9c153902015-06-23 14:31:17 +0300578
579 .prime_handle_to_fd = drm_gem_prime_handle_to_fd,
580 .prime_fd_to_handle = drm_gem_prime_fd_to_handle,
581 .gem_prime_import = drm_gem_prime_import,
582 .gem_prime_export = drm_gem_prime_export,
583 .gem_prime_get_sg_table = drm_gem_cma_prime_get_sg_table,
584 .gem_prime_import_sg_table = drm_gem_cma_prime_import_sg_table,
585 .gem_prime_vmap = drm_gem_cma_prime_vmap,
586 .gem_prime_vunmap = drm_gem_cma_prime_vunmap,
587 .gem_prime_mmap = drm_gem_cma_prime_mmap,
Rob Clark16ea9752013-01-08 15:04:28 -0600588#ifdef CONFIG_DEBUG_FS
589 .debugfs_init = tilcdc_debugfs_init,
590 .debugfs_cleanup = tilcdc_debugfs_cleanup,
591#endif
592 .fops = &fops,
593 .name = "tilcdc",
594 .desc = "TI LCD Controller DRM",
595 .date = "20121205",
596 .major = 1,
597 .minor = 0,
598};
599
600/*
601 * Power management:
602 */
603
604#ifdef CONFIG_PM_SLEEP
605static int tilcdc_pm_suspend(struct device *dev)
606{
607 struct drm_device *ddev = dev_get_drvdata(dev);
608 struct tilcdc_drm_private *priv = ddev->dev_private;
Rob Clark16ea9752013-01-08 15:04:28 -0600609
Jyri Sarha514d1a12016-06-16 11:28:23 +0300610 priv->saved_state = drm_atomic_helper_suspend(ddev);
Rob Clark16ea9752013-01-08 15:04:28 -0600611
Darren Etheridge85fd27f2014-09-19 01:42:57 +0000612 /* Select sleep pin state */
613 pinctrl_pm_select_sleep_state(dev);
614
Rob Clark16ea9752013-01-08 15:04:28 -0600615 return 0;
616}
617
618static int tilcdc_pm_resume(struct device *dev)
619{
620 struct drm_device *ddev = dev_get_drvdata(dev);
621 struct tilcdc_drm_private *priv = ddev->dev_private;
Jyri Sarha514d1a12016-06-16 11:28:23 +0300622 int ret = 0;
Rob Clark16ea9752013-01-08 15:04:28 -0600623
Dave Gerlach416a07f2014-07-29 06:27:58 +0000624 /* Select default pin state */
625 pinctrl_pm_select_default_state(dev);
626
Jyri Sarha514d1a12016-06-16 11:28:23 +0300627 if (priv->saved_state)
628 ret = drm_atomic_helper_resume(ddev, priv->saved_state);
Rob Clark16ea9752013-01-08 15:04:28 -0600629
Jyri Sarha514d1a12016-06-16 11:28:23 +0300630 return ret;
Rob Clark16ea9752013-01-08 15:04:28 -0600631}
632#endif
633
634static const struct dev_pm_ops tilcdc_pm_ops = {
635 SET_SYSTEM_SLEEP_PM_OPS(tilcdc_pm_suspend, tilcdc_pm_resume)
636};
637
638/*
639 * Platform driver:
640 */
Jyri Sarha103cd8b2015-02-10 14:13:23 +0200641static int tilcdc_bind(struct device *dev)
642{
Jyri Sarha923310b2016-10-17 17:53:33 +0300643 return tilcdc_init(&tilcdc_driver, dev);
Jyri Sarha103cd8b2015-02-10 14:13:23 +0200644}
645
646static void tilcdc_unbind(struct device *dev)
647{
Jyri Sarha20a98ac2016-06-23 11:07:16 +0300648 struct drm_device *ddev = dev_get_drvdata(dev);
649
650 /* Check if a subcomponent has already triggered the unloading. */
651 if (!ddev->dev_private)
652 return;
653
Jyri Sarha923310b2016-10-17 17:53:33 +0300654 tilcdc_fini(dev_get_drvdata(dev));
Jyri Sarha103cd8b2015-02-10 14:13:23 +0200655}
656
657static const struct component_master_ops tilcdc_comp_ops = {
658 .bind = tilcdc_bind,
659 .unbind = tilcdc_unbind,
660};
661
Rob Clark16ea9752013-01-08 15:04:28 -0600662static int tilcdc_pdev_probe(struct platform_device *pdev)
663{
Jyri Sarha103cd8b2015-02-10 14:13:23 +0200664 struct component_match *match = NULL;
665 int ret;
666
Rob Clark16ea9752013-01-08 15:04:28 -0600667 /* bail out early if no DT data: */
668 if (!pdev->dev.of_node) {
669 dev_err(&pdev->dev, "device-tree data is missing\n");
670 return -ENXIO;
671 }
672
Jyri Sarha103cd8b2015-02-10 14:13:23 +0200673 ret = tilcdc_get_external_components(&pdev->dev, &match);
674 if (ret < 0)
675 return ret;
676 else if (ret == 0)
Jyri Sarha923310b2016-10-17 17:53:33 +0300677 return tilcdc_init(&tilcdc_driver, &pdev->dev);
Jyri Sarha103cd8b2015-02-10 14:13:23 +0200678 else
679 return component_master_add_with_match(&pdev->dev,
680 &tilcdc_comp_ops,
681 match);
Rob Clark16ea9752013-01-08 15:04:28 -0600682}
683
684static int tilcdc_pdev_remove(struct platform_device *pdev)
685{
Jyri Sarha20a98ac2016-06-23 11:07:16 +0300686 int ret;
Jyri Sarha103cd8b2015-02-10 14:13:23 +0200687
Jyri Sarha20a98ac2016-06-23 11:07:16 +0300688 ret = tilcdc_get_external_components(&pdev->dev, NULL);
689 if (ret < 0)
690 return ret;
691 else if (ret == 0)
Jyri Sarha923310b2016-10-17 17:53:33 +0300692 tilcdc_fini(platform_get_drvdata(pdev));
Jyri Sarha20a98ac2016-06-23 11:07:16 +0300693 else
694 component_master_del(&pdev->dev, &tilcdc_comp_ops);
Rob Clark16ea9752013-01-08 15:04:28 -0600695
696 return 0;
697}
698
699static struct of_device_id tilcdc_of_match[] = {
700 { .compatible = "ti,am33xx-tilcdc", },
Bartosz Golaszewski507b72b2016-10-03 17:45:19 +0200701 { .compatible = "ti,da850-tilcdc", },
Rob Clark16ea9752013-01-08 15:04:28 -0600702 { },
703};
704MODULE_DEVICE_TABLE(of, tilcdc_of_match);
705
706static struct platform_driver tilcdc_platform_driver = {
707 .probe = tilcdc_pdev_probe,
708 .remove = tilcdc_pdev_remove,
709 .driver = {
Rob Clark16ea9752013-01-08 15:04:28 -0600710 .name = "tilcdc",
711 .pm = &tilcdc_pm_ops,
712 .of_match_table = tilcdc_of_match,
713 },
714};
715
716static int __init tilcdc_drm_init(void)
717{
718 DBG("init");
719 tilcdc_tfp410_init();
Rob Clark0d4bbaf2012-12-18 17:34:16 -0600720 tilcdc_panel_init();
Rob Clark16ea9752013-01-08 15:04:28 -0600721 return platform_driver_register(&tilcdc_platform_driver);
722}
723
724static void __exit tilcdc_drm_fini(void)
725{
726 DBG("fini");
Rob Clark16ea9752013-01-08 15:04:28 -0600727 platform_driver_unregister(&tilcdc_platform_driver);
Guido Martínezeb565a22014-06-17 11:17:08 -0300728 tilcdc_panel_fini();
Guido Martínezeb565a22014-06-17 11:17:08 -0300729 tilcdc_tfp410_fini();
Rob Clark16ea9752013-01-08 15:04:28 -0600730}
731
Guido Martínez2023d842014-06-17 11:17:11 -0300732module_init(tilcdc_drm_init);
Rob Clark16ea9752013-01-08 15:04:28 -0600733module_exit(tilcdc_drm_fini);
734
735MODULE_AUTHOR("Rob Clark <robdclark@gmail.com");
736MODULE_DESCRIPTION("TI LCD Controller DRM Driver");
737MODULE_LICENSE("GPL");