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hayeswangac718b62013-05-02 16:01:25 +00001/*
hayeswangc7de7de2014-01-15 10:42:16 +08002 * Copyright (c) 2014 Realtek Semiconductor Corp. All rights reserved.
hayeswangac718b62013-05-02 16:01:25 +00003 *
4 * This program is free software; you can redistribute it and/or
5 * modify it under the terms of the GNU General Public License
6 * version 2 as published by the Free Software Foundation.
7 *
8 */
9
hayeswangac718b62013-05-02 16:01:25 +000010#include <linux/signal.h>
11#include <linux/slab.h>
12#include <linux/module.h>
hayeswangac718b62013-05-02 16:01:25 +000013#include <linux/netdevice.h>
14#include <linux/etherdevice.h>
15#include <linux/mii.h>
16#include <linux/ethtool.h>
17#include <linux/usb.h>
18#include <linux/crc32.h>
19#include <linux/if_vlan.h>
20#include <linux/uaccess.h>
hayeswangebc2ec482013-08-14 20:54:38 +080021#include <linux/list.h>
hayeswang5bd23882013-08-14 20:54:39 +080022#include <linux/ip.h>
23#include <linux/ipv6.h>
hayeswang6128d1bb2014-03-07 11:04:40 +080024#include <net/ip6_checksum.h>
hayeswangac718b62013-05-02 16:01:25 +000025
26/* Version Information */
hayeswang204c8702014-10-01 13:25:10 +080027#define DRIVER_VERSION "v1.06.1 (2014/10/01)"
hayeswangac718b62013-05-02 16:01:25 +000028#define DRIVER_AUTHOR "Realtek linux nic maintainers <nic_swsd@realtek.com>"
hayeswang44d942a2014-01-15 10:42:14 +080029#define DRIVER_DESC "Realtek RTL8152/RTL8153 Based USB Ethernet Adapters"
hayeswangac718b62013-05-02 16:01:25 +000030#define MODULENAME "r8152"
31
32#define R8152_PHY_ID 32
33
34#define PLA_IDR 0xc000
35#define PLA_RCR 0xc010
36#define PLA_RMS 0xc016
37#define PLA_RXFIFO_CTRL0 0xc0a0
38#define PLA_RXFIFO_CTRL1 0xc0a4
39#define PLA_RXFIFO_CTRL2 0xc0a8
40#define PLA_FMC 0xc0b4
41#define PLA_CFG_WOL 0xc0b6
hayeswang43779f82014-01-02 11:25:10 +080042#define PLA_TEREDO_CFG 0xc0bc
hayeswangac718b62013-05-02 16:01:25 +000043#define PLA_MAR 0xcd00
hayeswang43779f82014-01-02 11:25:10 +080044#define PLA_BACKUP 0xd000
hayeswangac718b62013-05-02 16:01:25 +000045#define PAL_BDC_CR 0xd1a0
hayeswang43779f82014-01-02 11:25:10 +080046#define PLA_TEREDO_TIMER 0xd2cc
47#define PLA_REALWOW_TIMER 0xd2e8
hayeswangac718b62013-05-02 16:01:25 +000048#define PLA_LEDSEL 0xdd90
49#define PLA_LED_FEATURE 0xdd92
50#define PLA_PHYAR 0xde00
hayeswang43779f82014-01-02 11:25:10 +080051#define PLA_BOOT_CTRL 0xe004
hayeswangac718b62013-05-02 16:01:25 +000052#define PLA_GPHY_INTR_IMR 0xe022
53#define PLA_EEE_CR 0xe040
54#define PLA_EEEP_CR 0xe080
55#define PLA_MAC_PWR_CTRL 0xe0c0
hayeswang43779f82014-01-02 11:25:10 +080056#define PLA_MAC_PWR_CTRL2 0xe0ca
57#define PLA_MAC_PWR_CTRL3 0xe0cc
58#define PLA_MAC_PWR_CTRL4 0xe0ce
59#define PLA_WDT6_CTRL 0xe428
hayeswangac718b62013-05-02 16:01:25 +000060#define PLA_TCR0 0xe610
61#define PLA_TCR1 0xe612
hayeswang69b4b7a2014-07-10 10:58:54 +080062#define PLA_MTPS 0xe615
hayeswangac718b62013-05-02 16:01:25 +000063#define PLA_TXFIFO_CTRL 0xe618
hayeswang4f1d4d52014-03-11 16:24:19 +080064#define PLA_RSTTALLY 0xe800
hayeswangac718b62013-05-02 16:01:25 +000065#define PLA_CR 0xe813
66#define PLA_CRWECR 0xe81c
hayeswang21ff2e82014-02-18 21:49:06 +080067#define PLA_CONFIG12 0xe81e /* CONFIG1, CONFIG2 */
68#define PLA_CONFIG34 0xe820 /* CONFIG3, CONFIG4 */
hayeswangac718b62013-05-02 16:01:25 +000069#define PLA_CONFIG5 0xe822
70#define PLA_PHY_PWR 0xe84c
71#define PLA_OOB_CTRL 0xe84f
72#define PLA_CPCR 0xe854
73#define PLA_MISC_0 0xe858
74#define PLA_MISC_1 0xe85a
75#define PLA_OCP_GPHY_BASE 0xe86c
hayeswang4f1d4d52014-03-11 16:24:19 +080076#define PLA_TALLYCNT 0xe890
hayeswangac718b62013-05-02 16:01:25 +000077#define PLA_SFF_STS_7 0xe8de
78#define PLA_PHYSTATUS 0xe908
79#define PLA_BP_BA 0xfc26
80#define PLA_BP_0 0xfc28
81#define PLA_BP_1 0xfc2a
82#define PLA_BP_2 0xfc2c
83#define PLA_BP_3 0xfc2e
84#define PLA_BP_4 0xfc30
85#define PLA_BP_5 0xfc32
86#define PLA_BP_6 0xfc34
87#define PLA_BP_7 0xfc36
hayeswang43779f82014-01-02 11:25:10 +080088#define PLA_BP_EN 0xfc38
hayeswangac718b62013-05-02 16:01:25 +000089
hayeswang43779f82014-01-02 11:25:10 +080090#define USB_U2P3_CTRL 0xb460
hayeswangac718b62013-05-02 16:01:25 +000091#define USB_DEV_STAT 0xb808
92#define USB_USB_CTRL 0xd406
93#define USB_PHY_CTRL 0xd408
94#define USB_TX_AGG 0xd40a
95#define USB_RX_BUF_TH 0xd40c
96#define USB_USB_TIMER 0xd428
hayeswang43779f82014-01-02 11:25:10 +080097#define USB_RX_EARLY_AGG 0xd42c
hayeswangac718b62013-05-02 16:01:25 +000098#define USB_PM_CTRL_STATUS 0xd432
99#define USB_TX_DMA 0xd434
hayeswang43779f82014-01-02 11:25:10 +0800100#define USB_TOLERANCE 0xd490
101#define USB_LPM_CTRL 0xd41a
hayeswangac718b62013-05-02 16:01:25 +0000102#define USB_UPS_CTRL 0xd800
hayeswang43779f82014-01-02 11:25:10 +0800103#define USB_MISC_0 0xd81a
104#define USB_POWER_CUT 0xd80a
105#define USB_AFE_CTRL2 0xd824
106#define USB_WDT11_CTRL 0xe43c
hayeswangac718b62013-05-02 16:01:25 +0000107#define USB_BP_BA 0xfc26
108#define USB_BP_0 0xfc28
109#define USB_BP_1 0xfc2a
110#define USB_BP_2 0xfc2c
111#define USB_BP_3 0xfc2e
112#define USB_BP_4 0xfc30
113#define USB_BP_5 0xfc32
114#define USB_BP_6 0xfc34
115#define USB_BP_7 0xfc36
hayeswang43779f82014-01-02 11:25:10 +0800116#define USB_BP_EN 0xfc38
hayeswangac718b62013-05-02 16:01:25 +0000117
118/* OCP Registers */
119#define OCP_ALDPS_CONFIG 0x2010
120#define OCP_EEE_CONFIG1 0x2080
121#define OCP_EEE_CONFIG2 0x2092
122#define OCP_EEE_CONFIG3 0x2094
hayeswangac244d32014-01-02 11:22:40 +0800123#define OCP_BASE_MII 0xa400
hayeswangac718b62013-05-02 16:01:25 +0000124#define OCP_EEE_AR 0xa41a
125#define OCP_EEE_DATA 0xa41c
hayeswang43779f82014-01-02 11:25:10 +0800126#define OCP_PHY_STATUS 0xa420
127#define OCP_POWER_CFG 0xa430
128#define OCP_EEE_CFG 0xa432
129#define OCP_SRAM_ADDR 0xa436
130#define OCP_SRAM_DATA 0xa438
131#define OCP_DOWN_SPEED 0xa442
132#define OCP_EEE_CFG2 0xa5d0
133#define OCP_ADC_CFG 0xbc06
134
135/* SRAM Register */
136#define SRAM_LPF_CFG 0x8012
137#define SRAM_10M_AMP1 0x8080
138#define SRAM_10M_AMP2 0x8082
139#define SRAM_IMPEDANCE 0x8084
hayeswangac718b62013-05-02 16:01:25 +0000140
141/* PLA_RCR */
142#define RCR_AAP 0x00000001
143#define RCR_APM 0x00000002
144#define RCR_AM 0x00000004
145#define RCR_AB 0x00000008
146#define RCR_ACPT_ALL (RCR_AAP | RCR_APM | RCR_AM | RCR_AB)
147
148/* PLA_RXFIFO_CTRL0 */
149#define RXFIFO_THR1_NORMAL 0x00080002
150#define RXFIFO_THR1_OOB 0x01800003
151
152/* PLA_RXFIFO_CTRL1 */
153#define RXFIFO_THR2_FULL 0x00000060
154#define RXFIFO_THR2_HIGH 0x00000038
155#define RXFIFO_THR2_OOB 0x0000004a
hayeswang43779f82014-01-02 11:25:10 +0800156#define RXFIFO_THR2_NORMAL 0x00a0
hayeswangac718b62013-05-02 16:01:25 +0000157
158/* PLA_RXFIFO_CTRL2 */
159#define RXFIFO_THR3_FULL 0x00000078
160#define RXFIFO_THR3_HIGH 0x00000048
161#define RXFIFO_THR3_OOB 0x0000005a
hayeswang43779f82014-01-02 11:25:10 +0800162#define RXFIFO_THR3_NORMAL 0x0110
hayeswangac718b62013-05-02 16:01:25 +0000163
164/* PLA_TXFIFO_CTRL */
165#define TXFIFO_THR_NORMAL 0x00400008
hayeswang43779f82014-01-02 11:25:10 +0800166#define TXFIFO_THR_NORMAL2 0x01000008
hayeswangac718b62013-05-02 16:01:25 +0000167
168/* PLA_FMC */
169#define FMC_FCR_MCU_EN 0x0001
170
171/* PLA_EEEP_CR */
172#define EEEP_CR_EEEP_TX 0x0002
173
hayeswang43779f82014-01-02 11:25:10 +0800174/* PLA_WDT6_CTRL */
175#define WDT6_SET_MODE 0x0010
176
hayeswangac718b62013-05-02 16:01:25 +0000177/* PLA_TCR0 */
178#define TCR0_TX_EMPTY 0x0800
179#define TCR0_AUTO_FIFO 0x0080
180
181/* PLA_TCR1 */
182#define VERSION_MASK 0x7cf0
183
hayeswang69b4b7a2014-07-10 10:58:54 +0800184/* PLA_MTPS */
185#define MTPS_JUMBO (12 * 1024 / 64)
186#define MTPS_DEFAULT (6 * 1024 / 64)
187
hayeswang4f1d4d52014-03-11 16:24:19 +0800188/* PLA_RSTTALLY */
189#define TALLY_RESET 0x0001
190
hayeswangac718b62013-05-02 16:01:25 +0000191/* PLA_CR */
192#define CR_RST 0x10
193#define CR_RE 0x08
194#define CR_TE 0x04
195
196/* PLA_CRWECR */
197#define CRWECR_NORAML 0x00
198#define CRWECR_CONFIG 0xc0
199
200/* PLA_OOB_CTRL */
201#define NOW_IS_OOB 0x80
202#define TXFIFO_EMPTY 0x20
203#define RXFIFO_EMPTY 0x10
204#define LINK_LIST_READY 0x02
205#define DIS_MCU_CLROOB 0x01
206#define FIFO_EMPTY (TXFIFO_EMPTY | RXFIFO_EMPTY)
207
208/* PLA_MISC_1 */
209#define RXDY_GATED_EN 0x0008
210
211/* PLA_SFF_STS_7 */
212#define RE_INIT_LL 0x8000
213#define MCU_BORW_EN 0x4000
214
215/* PLA_CPCR */
216#define CPCR_RX_VLAN 0x0040
217
218/* PLA_CFG_WOL */
219#define MAGIC_EN 0x0001
220
hayeswang43779f82014-01-02 11:25:10 +0800221/* PLA_TEREDO_CFG */
222#define TEREDO_SEL 0x8000
223#define TEREDO_WAKE_MASK 0x7f00
224#define TEREDO_RS_EVENT_MASK 0x00fe
225#define OOB_TEREDO_EN 0x0001
226
hayeswangac718b62013-05-02 16:01:25 +0000227/* PAL_BDC_CR */
228#define ALDPS_PROXY_MODE 0x0001
229
hayeswang21ff2e82014-02-18 21:49:06 +0800230/* PLA_CONFIG34 */
231#define LINK_ON_WAKE_EN 0x0010
232#define LINK_OFF_WAKE_EN 0x0008
233
hayeswangac718b62013-05-02 16:01:25 +0000234/* PLA_CONFIG5 */
hayeswang21ff2e82014-02-18 21:49:06 +0800235#define BWF_EN 0x0040
236#define MWF_EN 0x0020
237#define UWF_EN 0x0010
hayeswangac718b62013-05-02 16:01:25 +0000238#define LAN_WAKE_EN 0x0002
239
240/* PLA_LED_FEATURE */
241#define LED_MODE_MASK 0x0700
242
243/* PLA_PHY_PWR */
244#define TX_10M_IDLE_EN 0x0080
245#define PFM_PWM_SWITCH 0x0040
246
247/* PLA_MAC_PWR_CTRL */
248#define D3_CLK_GATED_EN 0x00004000
249#define MCU_CLK_RATIO 0x07010f07
250#define MCU_CLK_RATIO_MASK 0x0f0f0f0f
hayeswang43779f82014-01-02 11:25:10 +0800251#define ALDPS_SPDWN_RATIO 0x0f87
252
253/* PLA_MAC_PWR_CTRL2 */
254#define EEE_SPDWN_RATIO 0x8007
255
256/* PLA_MAC_PWR_CTRL3 */
257#define PKT_AVAIL_SPDWN_EN 0x0100
258#define SUSPEND_SPDWN_EN 0x0004
259#define U1U2_SPDWN_EN 0x0002
260#define L1_SPDWN_EN 0x0001
261
262/* PLA_MAC_PWR_CTRL4 */
263#define PWRSAVE_SPDWN_EN 0x1000
264#define RXDV_SPDWN_EN 0x0800
265#define TX10MIDLE_EN 0x0100
266#define TP100_SPDWN_EN 0x0020
267#define TP500_SPDWN_EN 0x0010
268#define TP1000_SPDWN_EN 0x0008
269#define EEE_SPDWN_EN 0x0001
hayeswangac718b62013-05-02 16:01:25 +0000270
271/* PLA_GPHY_INTR_IMR */
272#define GPHY_STS_MSK 0x0001
273#define SPEED_DOWN_MSK 0x0002
274#define SPDWN_RXDV_MSK 0x0004
275#define SPDWN_LINKCHG_MSK 0x0008
276
277/* PLA_PHYAR */
278#define PHYAR_FLAG 0x80000000
279
280/* PLA_EEE_CR */
281#define EEE_RX_EN 0x0001
282#define EEE_TX_EN 0x0002
283
hayeswang43779f82014-01-02 11:25:10 +0800284/* PLA_BOOT_CTRL */
285#define AUTOLOAD_DONE 0x0002
286
hayeswangac718b62013-05-02 16:01:25 +0000287/* USB_DEV_STAT */
288#define STAT_SPEED_MASK 0x0006
289#define STAT_SPEED_HIGH 0x0000
hayeswanga3cc4652014-07-24 16:37:43 +0800290#define STAT_SPEED_FULL 0x0002
hayeswangac718b62013-05-02 16:01:25 +0000291
292/* USB_TX_AGG */
293#define TX_AGG_MAX_THRESHOLD 0x03
294
295/* USB_RX_BUF_TH */
hayeswang43779f82014-01-02 11:25:10 +0800296#define RX_THR_SUPPER 0x0c350180
hayeswang8e1f51b2014-01-02 11:22:41 +0800297#define RX_THR_HIGH 0x7a120180
hayeswang43779f82014-01-02 11:25:10 +0800298#define RX_THR_SLOW 0xffff0180
hayeswangac718b62013-05-02 16:01:25 +0000299
300/* USB_TX_DMA */
301#define TEST_MODE_DISABLE 0x00000001
302#define TX_SIZE_ADJUST1 0x00000100
303
304/* USB_UPS_CTRL */
305#define POWER_CUT 0x0100
306
307/* USB_PM_CTRL_STATUS */
hayeswang8e1f51b2014-01-02 11:22:41 +0800308#define RESUME_INDICATE 0x0001
hayeswangac718b62013-05-02 16:01:25 +0000309
310/* USB_USB_CTRL */
311#define RX_AGG_DISABLE 0x0010
312
hayeswang43779f82014-01-02 11:25:10 +0800313/* USB_U2P3_CTRL */
314#define U2P3_ENABLE 0x0001
315
316/* USB_POWER_CUT */
317#define PWR_EN 0x0001
318#define PHASE2_EN 0x0008
319
320/* USB_MISC_0 */
321#define PCUT_STATUS 0x0001
322
323/* USB_RX_EARLY_AGG */
324#define EARLY_AGG_SUPPER 0x0e832981
325#define EARLY_AGG_HIGH 0x0e837a12
326#define EARLY_AGG_SLOW 0x0e83ffff
327
328/* USB_WDT11_CTRL */
329#define TIMER11_EN 0x0001
330
331/* USB_LPM_CTRL */
332#define LPM_TIMER_MASK 0x0c
333#define LPM_TIMER_500MS 0x04 /* 500 ms */
334#define LPM_TIMER_500US 0x0c /* 500 us */
335
336/* USB_AFE_CTRL2 */
337#define SEN_VAL_MASK 0xf800
338#define SEN_VAL_NORMAL 0xa000
339#define SEL_RXIDLE 0x0100
340
hayeswangac718b62013-05-02 16:01:25 +0000341/* OCP_ALDPS_CONFIG */
342#define ENPWRSAVE 0x8000
343#define ENPDNPS 0x0200
344#define LINKENA 0x0100
345#define DIS_SDSAVE 0x0010
346
hayeswang43779f82014-01-02 11:25:10 +0800347/* OCP_PHY_STATUS */
348#define PHY_STAT_MASK 0x0007
349#define PHY_STAT_LAN_ON 3
350#define PHY_STAT_PWRDN 5
351
352/* OCP_POWER_CFG */
353#define EEE_CLKDIV_EN 0x8000
354#define EN_ALDPS 0x0004
355#define EN_10M_PLLOFF 0x0001
356
hayeswangac718b62013-05-02 16:01:25 +0000357/* OCP_EEE_CONFIG1 */
358#define RG_TXLPI_MSK_HFDUP 0x8000
359#define RG_MATCLR_EN 0x4000
360#define EEE_10_CAP 0x2000
361#define EEE_NWAY_EN 0x1000
362#define TX_QUIET_EN 0x0200
363#define RX_QUIET_EN 0x0100
364#define SDRISETIME 0x0010 /* bit 4 ~ 6 */
365#define RG_RXLPI_MSK_HFDUP 0x0008
366#define SDFALLTIME 0x0007 /* bit 0 ~ 2 */
367
368/* OCP_EEE_CONFIG2 */
369#define RG_LPIHYS_NUM 0x7000 /* bit 12 ~ 15 */
370#define RG_DACQUIET_EN 0x0400
371#define RG_LDVQUIET_EN 0x0200
372#define RG_CKRSEL 0x0020
373#define RG_EEEPRG_EN 0x0010
374
375/* OCP_EEE_CONFIG3 */
376#define FST_SNR_EYE_R 0x1500 /* bit 7 ~ 15 */
377#define RG_LFS_SEL 0x0060 /* bit 6 ~ 5 */
378#define MSK_PH 0x0006 /* bit 0 ~ 3 */
379
380/* OCP_EEE_AR */
381/* bit[15:14] function */
382#define FUN_ADDR 0x0000
383#define FUN_DATA 0x4000
384/* bit[4:0] device addr */
385#define DEVICE_ADDR 0x0007
386
387/* OCP_EEE_DATA */
388#define EEE_ADDR 0x003C
389#define EEE_DATA 0x0002
390
hayeswang43779f82014-01-02 11:25:10 +0800391/* OCP_EEE_CFG */
392#define CTAP_SHORT_EN 0x0040
393#define EEE10_EN 0x0010
394
395/* OCP_DOWN_SPEED */
396#define EN_10M_BGOFF 0x0080
397
398/* OCP_EEE_CFG2 */
399#define MY1000_EEE 0x0004
400#define MY100_EEE 0x0002
401
402/* OCP_ADC_CFG */
403#define CKADSEL_L 0x0100
404#define ADC_EN 0x0080
405#define EN_EMI_L 0x0040
406
407/* SRAM_LPF_CFG */
408#define LPF_AUTO_TUNE 0x8000
409
410/* SRAM_10M_AMP1 */
411#define GDAC_IB_UPALL 0x0008
412
413/* SRAM_10M_AMP2 */
414#define AMP_DN 0x0200
415
416/* SRAM_IMPEDANCE */
417#define RX_DRIVING_MASK 0x6000
418
hayeswangac718b62013-05-02 16:01:25 +0000419enum rtl_register_content {
hayeswang43779f82014-01-02 11:25:10 +0800420 _1000bps = 0x10,
hayeswangac718b62013-05-02 16:01:25 +0000421 _100bps = 0x08,
422 _10bps = 0x04,
423 LINK_STATUS = 0x02,
424 FULL_DUP = 0x01,
425};
426
hayeswangebc2ec482013-08-14 20:54:38 +0800427#define RTL8152_MAX_TX 10
428#define RTL8152_MAX_RX 10
hayeswang40a82912013-08-14 20:54:40 +0800429#define INTBUFSIZE 2
hayeswang8e1f51b2014-01-02 11:22:41 +0800430#define CRC_SIZE 4
431#define TX_ALIGN 4
432#define RX_ALIGN 8
hayeswang40a82912013-08-14 20:54:40 +0800433
434#define INTR_LINK 0x0004
hayeswangebc2ec482013-08-14 20:54:38 +0800435
hayeswangac718b62013-05-02 16:01:25 +0000436#define RTL8152_REQT_READ 0xc0
437#define RTL8152_REQT_WRITE 0x40
438#define RTL8152_REQ_GET_REGS 0x05
439#define RTL8152_REQ_SET_REGS 0x05
440
441#define BYTE_EN_DWORD 0xff
442#define BYTE_EN_WORD 0x33
443#define BYTE_EN_BYTE 0x11
444#define BYTE_EN_SIX_BYTES 0x3f
445#define BYTE_EN_START_MASK 0x0f
446#define BYTE_EN_END_MASK 0xf0
447
hayeswang69b4b7a2014-07-10 10:58:54 +0800448#define RTL8153_MAX_PACKET 9216 /* 9K */
449#define RTL8153_MAX_MTU (RTL8153_MAX_PACKET - VLAN_ETH_HLEN - VLAN_HLEN)
hayeswangac718b62013-05-02 16:01:25 +0000450#define RTL8152_RMS (VLAN_ETH_FRAME_LEN + VLAN_HLEN)
hayeswang69b4b7a2014-07-10 10:58:54 +0800451#define RTL8153_RMS RTL8153_MAX_PACKET
hayeswangb8125402014-07-03 11:55:48 +0800452#define RTL8152_TX_TIMEOUT (5 * HZ)
hayeswangac718b62013-05-02 16:01:25 +0000453
454/* rtl8152 flags */
455enum rtl8152_flags {
456 RTL8152_UNPLUG = 0,
hayeswangac718b62013-05-02 16:01:25 +0000457 RTL8152_SET_RX_MODE,
hayeswang40a82912013-08-14 20:54:40 +0800458 WORK_ENABLE,
459 RTL8152_LINK_CHG,
hayeswang9a4be1b2014-02-18 21:49:07 +0800460 SELECTIVE_SUSPEND,
hayeswangaa66a5f2014-02-18 21:49:04 +0800461 PHY_RESET,
hayeswang0c3121f2014-03-07 11:04:36 +0800462 SCHEDULE_TASKLET,
hayeswangac718b62013-05-02 16:01:25 +0000463};
464
465/* Define these values to match your device */
466#define VENDOR_ID_REALTEK 0x0bda
467#define PRODUCT_ID_RTL8152 0x8152
hayeswang43779f82014-01-02 11:25:10 +0800468#define PRODUCT_ID_RTL8153 0x8153
469
470#define VENDOR_ID_SAMSUNG 0x04e8
471#define PRODUCT_ID_SAMSUNG 0xa101
hayeswangac718b62013-05-02 16:01:25 +0000472
473#define MCU_TYPE_PLA 0x0100
474#define MCU_TYPE_USB 0x0000
475
hayeswangc7de7de2014-01-15 10:42:16 +0800476#define REALTEK_USB_DEVICE(vend, prod) \
477 USB_DEVICE_INTERFACE_CLASS(vend, prod, USB_CLASS_VENDOR_SPEC)
478
hayeswang4f1d4d52014-03-11 16:24:19 +0800479struct tally_counter {
480 __le64 tx_packets;
481 __le64 rx_packets;
482 __le64 tx_errors;
483 __le32 rx_errors;
484 __le16 rx_missed;
485 __le16 align_errors;
486 __le32 tx_one_collision;
487 __le32 tx_multi_collision;
488 __le64 rx_unicast;
489 __le64 rx_broadcast;
490 __le32 rx_multicast;
491 __le16 tx_aborted;
492 __le16 tx_underun;
493};
494
hayeswangac718b62013-05-02 16:01:25 +0000495struct rx_desc {
hayeswang500b6d72013-11-20 17:30:57 +0800496 __le32 opts1;
hayeswangac718b62013-05-02 16:01:25 +0000497#define RX_LEN_MASK 0x7fff
hayeswang565cab02014-03-07 11:04:38 +0800498
hayeswang500b6d72013-11-20 17:30:57 +0800499 __le32 opts2;
hayeswang565cab02014-03-07 11:04:38 +0800500#define RD_UDP_CS (1 << 23)
501#define RD_TCP_CS (1 << 22)
hayeswang6128d1bb2014-03-07 11:04:40 +0800502#define RD_IPV6_CS (1 << 20)
hayeswang565cab02014-03-07 11:04:38 +0800503#define RD_IPV4_CS (1 << 19)
504
hayeswang500b6d72013-11-20 17:30:57 +0800505 __le32 opts3;
hayeswang565cab02014-03-07 11:04:38 +0800506#define IPF (1 << 23) /* IP checksum fail */
507#define UDPF (1 << 22) /* UDP checksum fail */
508#define TCPF (1 << 21) /* TCP checksum fail */
509
hayeswang500b6d72013-11-20 17:30:57 +0800510 __le32 opts4;
511 __le32 opts5;
512 __le32 opts6;
hayeswangac718b62013-05-02 16:01:25 +0000513};
514
515struct tx_desc {
hayeswang500b6d72013-11-20 17:30:57 +0800516 __le32 opts1;
hayeswangac718b62013-05-02 16:01:25 +0000517#define TX_FS (1 << 31) /* First segment of a packet */
518#define TX_LS (1 << 30) /* Final segment of a packet */
hayeswang60c89072014-03-07 11:04:39 +0800519#define GTSENDV4 (1 << 28)
hayeswang6128d1bb2014-03-07 11:04:40 +0800520#define GTSENDV6 (1 << 27)
hayeswang60c89072014-03-07 11:04:39 +0800521#define GTTCPHO_SHIFT 18
hayeswang6128d1bb2014-03-07 11:04:40 +0800522#define GTTCPHO_MAX 0x7fU
hayeswang60c89072014-03-07 11:04:39 +0800523#define TX_LEN_MAX 0x3ffffU
hayeswang5bd23882013-08-14 20:54:39 +0800524
hayeswang500b6d72013-11-20 17:30:57 +0800525 __le32 opts2;
hayeswang5bd23882013-08-14 20:54:39 +0800526#define UDP_CS (1 << 31) /* Calculate UDP/IP checksum */
527#define TCP_CS (1 << 30) /* Calculate TCP/IP checksum */
528#define IPV4_CS (1 << 29) /* Calculate IPv4 checksum */
529#define IPV6_CS (1 << 28) /* Calculate IPv6 checksum */
hayeswang60c89072014-03-07 11:04:39 +0800530#define MSS_SHIFT 17
531#define MSS_MAX 0x7ffU
532#define TCPHO_SHIFT 17
hayeswang6128d1bb2014-03-07 11:04:40 +0800533#define TCPHO_MAX 0x7ffU
hayeswangac718b62013-05-02 16:01:25 +0000534};
535
hayeswangdff4e8a2013-08-16 16:09:33 +0800536struct r8152;
537
hayeswangebc2ec482013-08-14 20:54:38 +0800538struct rx_agg {
539 struct list_head list;
540 struct urb *urb;
hayeswangdff4e8a2013-08-16 16:09:33 +0800541 struct r8152 *context;
hayeswangebc2ec482013-08-14 20:54:38 +0800542 void *buffer;
543 void *head;
544};
545
546struct tx_agg {
547 struct list_head list;
548 struct urb *urb;
hayeswangdff4e8a2013-08-16 16:09:33 +0800549 struct r8152 *context;
hayeswangebc2ec482013-08-14 20:54:38 +0800550 void *buffer;
551 void *head;
552 u32 skb_num;
553 u32 skb_len;
554};
555
hayeswangac718b62013-05-02 16:01:25 +0000556struct r8152 {
557 unsigned long flags;
558 struct usb_device *udev;
559 struct tasklet_struct tl;
hayeswang40a82912013-08-14 20:54:40 +0800560 struct usb_interface *intf;
hayeswangac718b62013-05-02 16:01:25 +0000561 struct net_device *netdev;
hayeswang40a82912013-08-14 20:54:40 +0800562 struct urb *intr_urb;
hayeswangebc2ec482013-08-14 20:54:38 +0800563 struct tx_agg tx_info[RTL8152_MAX_TX];
564 struct rx_agg rx_info[RTL8152_MAX_RX];
565 struct list_head rx_done, tx_free;
566 struct sk_buff_head tx_queue;
567 spinlock_t rx_lock, tx_lock;
hayeswangac718b62013-05-02 16:01:25 +0000568 struct delayed_work schedule;
569 struct mii_if_info mii;
hayeswangc81229c2014-01-02 11:22:42 +0800570
571 struct rtl_ops {
572 void (*init)(struct r8152 *);
573 int (*enable)(struct r8152 *);
574 void (*disable)(struct r8152 *);
hayeswang7e9da482014-02-18 21:49:05 +0800575 void (*up)(struct r8152 *);
hayeswangc81229c2014-01-02 11:22:42 +0800576 void (*down)(struct r8152 *);
577 void (*unload)(struct r8152 *);
578 } rtl_ops;
579
hayeswang40a82912013-08-14 20:54:40 +0800580 int intr_interval;
hayeswang21ff2e82014-02-18 21:49:06 +0800581 u32 saved_wolopts;
hayeswangac718b62013-05-02 16:01:25 +0000582 u32 msg_enable;
hayeswangdd1b1192013-11-20 17:30:56 +0800583 u32 tx_qlen;
hayeswangac718b62013-05-02 16:01:25 +0000584 u16 ocp_base;
hayeswang40a82912013-08-14 20:54:40 +0800585 u8 *intr_buff;
hayeswangac718b62013-05-02 16:01:25 +0000586 u8 version;
587 u8 speed;
588};
589
590enum rtl_version {
591 RTL_VER_UNKNOWN = 0,
592 RTL_VER_01,
hayeswang43779f82014-01-02 11:25:10 +0800593 RTL_VER_02,
594 RTL_VER_03,
595 RTL_VER_04,
596 RTL_VER_05,
597 RTL_VER_MAX
hayeswangac718b62013-05-02 16:01:25 +0000598};
599
hayeswang60c89072014-03-07 11:04:39 +0800600enum tx_csum_stat {
601 TX_CSUM_SUCCESS = 0,
602 TX_CSUM_TSO,
603 TX_CSUM_NONE
604};
605
hayeswangac718b62013-05-02 16:01:25 +0000606/* Maximum number of multicast addresses to filter (vs. Rx-all-multicast).
607 * The RTL chips use a 64 element hash table based on the Ethernet CRC.
608 */
609static const int multicast_filter_limit = 32;
hayeswangebc2ec482013-08-14 20:54:38 +0800610static unsigned int rx_buf_sz = 16384;
hayeswangac718b62013-05-02 16:01:25 +0000611
hayeswang60c89072014-03-07 11:04:39 +0800612#define RTL_LIMITED_TSO_SIZE (rx_buf_sz - sizeof(struct tx_desc) - \
613 VLAN_ETH_HLEN - VLAN_HLEN)
614
hayeswangac718b62013-05-02 16:01:25 +0000615static
616int get_registers(struct r8152 *tp, u16 value, u16 index, u16 size, void *data)
617{
hayeswang31787f52013-07-31 17:21:25 +0800618 int ret;
619 void *tmp;
620
621 tmp = kmalloc(size, GFP_KERNEL);
622 if (!tmp)
623 return -ENOMEM;
624
625 ret = usb_control_msg(tp->udev, usb_rcvctrlpipe(tp->udev, 0),
hayeswangac718b62013-05-02 16:01:25 +0000626 RTL8152_REQ_GET_REGS, RTL8152_REQT_READ,
hayeswang31787f52013-07-31 17:21:25 +0800627 value, index, tmp, size, 500);
628
629 memcpy(data, tmp, size);
630 kfree(tmp);
631
632 return ret;
hayeswangac718b62013-05-02 16:01:25 +0000633}
634
635static
636int set_registers(struct r8152 *tp, u16 value, u16 index, u16 size, void *data)
637{
hayeswang31787f52013-07-31 17:21:25 +0800638 int ret;
639 void *tmp;
640
Benoit Tainec4438f02014-05-26 17:21:23 +0200641 tmp = kmemdup(data, size, GFP_KERNEL);
hayeswang31787f52013-07-31 17:21:25 +0800642 if (!tmp)
643 return -ENOMEM;
644
hayeswang31787f52013-07-31 17:21:25 +0800645 ret = usb_control_msg(tp->udev, usb_sndctrlpipe(tp->udev, 0),
hayeswangac718b62013-05-02 16:01:25 +0000646 RTL8152_REQ_SET_REGS, RTL8152_REQT_WRITE,
hayeswang31787f52013-07-31 17:21:25 +0800647 value, index, tmp, size, 500);
648
649 kfree(tmp);
hayeswangdb8515e2014-03-06 15:07:16 +0800650
hayeswang31787f52013-07-31 17:21:25 +0800651 return ret;
hayeswangac718b62013-05-02 16:01:25 +0000652}
653
654static int generic_ocp_read(struct r8152 *tp, u16 index, u16 size,
655 void *data, u16 type)
656{
hayeswang45f4a192014-01-06 17:08:41 +0800657 u16 limit = 64;
658 int ret = 0;
hayeswangac718b62013-05-02 16:01:25 +0000659
660 if (test_bit(RTL8152_UNPLUG, &tp->flags))
661 return -ENODEV;
662
663 /* both size and indix must be 4 bytes align */
664 if ((size & 3) || !size || (index & 3) || !data)
665 return -EPERM;
666
667 if ((u32)index + (u32)size > 0xffff)
668 return -EPERM;
669
670 while (size) {
671 if (size > limit) {
672 ret = get_registers(tp, index, type, limit, data);
673 if (ret < 0)
674 break;
675
676 index += limit;
677 data += limit;
678 size -= limit;
679 } else {
680 ret = get_registers(tp, index, type, size, data);
681 if (ret < 0)
682 break;
683
684 index += size;
685 data += size;
686 size = 0;
687 break;
688 }
689 }
690
691 return ret;
692}
693
694static int generic_ocp_write(struct r8152 *tp, u16 index, u16 byteen,
695 u16 size, void *data, u16 type)
696{
hayeswang45f4a192014-01-06 17:08:41 +0800697 int ret;
698 u16 byteen_start, byteen_end, byen;
699 u16 limit = 512;
hayeswangac718b62013-05-02 16:01:25 +0000700
701 if (test_bit(RTL8152_UNPLUG, &tp->flags))
702 return -ENODEV;
703
704 /* both size and indix must be 4 bytes align */
705 if ((size & 3) || !size || (index & 3) || !data)
706 return -EPERM;
707
708 if ((u32)index + (u32)size > 0xffff)
709 return -EPERM;
710
711 byteen_start = byteen & BYTE_EN_START_MASK;
712 byteen_end = byteen & BYTE_EN_END_MASK;
713
714 byen = byteen_start | (byteen_start << 4);
715 ret = set_registers(tp, index, type | byen, 4, data);
716 if (ret < 0)
717 goto error1;
718
719 index += 4;
720 data += 4;
721 size -= 4;
722
723 if (size) {
724 size -= 4;
725
726 while (size) {
727 if (size > limit) {
728 ret = set_registers(tp, index,
729 type | BYTE_EN_DWORD,
730 limit, data);
731 if (ret < 0)
732 goto error1;
733
734 index += limit;
735 data += limit;
736 size -= limit;
737 } else {
738 ret = set_registers(tp, index,
739 type | BYTE_EN_DWORD,
740 size, data);
741 if (ret < 0)
742 goto error1;
743
744 index += size;
745 data += size;
746 size = 0;
747 break;
748 }
749 }
750
751 byen = byteen_end | (byteen_end >> 4);
752 ret = set_registers(tp, index, type | byen, 4, data);
753 if (ret < 0)
754 goto error1;
755 }
756
757error1:
758 return ret;
759}
760
761static inline
762int pla_ocp_read(struct r8152 *tp, u16 index, u16 size, void *data)
763{
764 return generic_ocp_read(tp, index, size, data, MCU_TYPE_PLA);
765}
766
767static inline
768int pla_ocp_write(struct r8152 *tp, u16 index, u16 byteen, u16 size, void *data)
769{
770 return generic_ocp_write(tp, index, byteen, size, data, MCU_TYPE_PLA);
771}
772
773static inline
774int usb_ocp_read(struct r8152 *tp, u16 index, u16 size, void *data)
775{
776 return generic_ocp_read(tp, index, size, data, MCU_TYPE_USB);
777}
778
779static inline
780int usb_ocp_write(struct r8152 *tp, u16 index, u16 byteen, u16 size, void *data)
781{
782 return generic_ocp_write(tp, index, byteen, size, data, MCU_TYPE_USB);
783}
784
785static u32 ocp_read_dword(struct r8152 *tp, u16 type, u16 index)
786{
hayeswangc8826de2013-07-31 17:21:26 +0800787 __le32 data;
hayeswangac718b62013-05-02 16:01:25 +0000788
hayeswangc8826de2013-07-31 17:21:26 +0800789 generic_ocp_read(tp, index, sizeof(data), &data, type);
hayeswangac718b62013-05-02 16:01:25 +0000790
791 return __le32_to_cpu(data);
792}
793
794static void ocp_write_dword(struct r8152 *tp, u16 type, u16 index, u32 data)
795{
hayeswangc8826de2013-07-31 17:21:26 +0800796 __le32 tmp = __cpu_to_le32(data);
797
798 generic_ocp_write(tp, index, BYTE_EN_DWORD, sizeof(tmp), &tmp, type);
hayeswangac718b62013-05-02 16:01:25 +0000799}
800
801static u16 ocp_read_word(struct r8152 *tp, u16 type, u16 index)
802{
803 u32 data;
hayeswangc8826de2013-07-31 17:21:26 +0800804 __le32 tmp;
hayeswangac718b62013-05-02 16:01:25 +0000805 u8 shift = index & 2;
806
807 index &= ~3;
808
hayeswangc8826de2013-07-31 17:21:26 +0800809 generic_ocp_read(tp, index, sizeof(tmp), &tmp, type);
hayeswangac718b62013-05-02 16:01:25 +0000810
hayeswangc8826de2013-07-31 17:21:26 +0800811 data = __le32_to_cpu(tmp);
hayeswangac718b62013-05-02 16:01:25 +0000812 data >>= (shift * 8);
813 data &= 0xffff;
814
815 return (u16)data;
816}
817
818static void ocp_write_word(struct r8152 *tp, u16 type, u16 index, u32 data)
819{
hayeswangc8826de2013-07-31 17:21:26 +0800820 u32 mask = 0xffff;
821 __le32 tmp;
hayeswangac718b62013-05-02 16:01:25 +0000822 u16 byen = BYTE_EN_WORD;
823 u8 shift = index & 2;
824
825 data &= mask;
826
827 if (index & 2) {
828 byen <<= shift;
829 mask <<= (shift * 8);
830 data <<= (shift * 8);
831 index &= ~3;
832 }
833
hayeswangc8826de2013-07-31 17:21:26 +0800834 generic_ocp_read(tp, index, sizeof(tmp), &tmp, type);
hayeswangac718b62013-05-02 16:01:25 +0000835
hayeswangc8826de2013-07-31 17:21:26 +0800836 data |= __le32_to_cpu(tmp) & ~mask;
837 tmp = __cpu_to_le32(data);
hayeswangac718b62013-05-02 16:01:25 +0000838
hayeswangc8826de2013-07-31 17:21:26 +0800839 generic_ocp_write(tp, index, byen, sizeof(tmp), &tmp, type);
hayeswangac718b62013-05-02 16:01:25 +0000840}
841
842static u8 ocp_read_byte(struct r8152 *tp, u16 type, u16 index)
843{
844 u32 data;
hayeswangc8826de2013-07-31 17:21:26 +0800845 __le32 tmp;
hayeswangac718b62013-05-02 16:01:25 +0000846 u8 shift = index & 3;
847
848 index &= ~3;
849
hayeswangc8826de2013-07-31 17:21:26 +0800850 generic_ocp_read(tp, index, sizeof(tmp), &tmp, type);
hayeswangac718b62013-05-02 16:01:25 +0000851
hayeswangc8826de2013-07-31 17:21:26 +0800852 data = __le32_to_cpu(tmp);
hayeswangac718b62013-05-02 16:01:25 +0000853 data >>= (shift * 8);
854 data &= 0xff;
855
856 return (u8)data;
857}
858
859static void ocp_write_byte(struct r8152 *tp, u16 type, u16 index, u32 data)
860{
hayeswangc8826de2013-07-31 17:21:26 +0800861 u32 mask = 0xff;
862 __le32 tmp;
hayeswangac718b62013-05-02 16:01:25 +0000863 u16 byen = BYTE_EN_BYTE;
864 u8 shift = index & 3;
865
866 data &= mask;
867
868 if (index & 3) {
869 byen <<= shift;
870 mask <<= (shift * 8);
871 data <<= (shift * 8);
872 index &= ~3;
873 }
874
hayeswangc8826de2013-07-31 17:21:26 +0800875 generic_ocp_read(tp, index, sizeof(tmp), &tmp, type);
hayeswangac718b62013-05-02 16:01:25 +0000876
hayeswangc8826de2013-07-31 17:21:26 +0800877 data |= __le32_to_cpu(tmp) & ~mask;
878 tmp = __cpu_to_le32(data);
hayeswangac718b62013-05-02 16:01:25 +0000879
hayeswangc8826de2013-07-31 17:21:26 +0800880 generic_ocp_write(tp, index, byen, sizeof(tmp), &tmp, type);
hayeswangac718b62013-05-02 16:01:25 +0000881}
882
hayeswangac244d32014-01-02 11:22:40 +0800883static u16 ocp_reg_read(struct r8152 *tp, u16 addr)
884{
885 u16 ocp_base, ocp_index;
886
887 ocp_base = addr & 0xf000;
888 if (ocp_base != tp->ocp_base) {
889 ocp_write_word(tp, MCU_TYPE_PLA, PLA_OCP_GPHY_BASE, ocp_base);
890 tp->ocp_base = ocp_base;
891 }
892
893 ocp_index = (addr & 0x0fff) | 0xb000;
894 return ocp_read_word(tp, MCU_TYPE_PLA, ocp_index);
895}
896
hayeswange3fe0b12014-01-02 11:22:39 +0800897static void ocp_reg_write(struct r8152 *tp, u16 addr, u16 data)
898{
899 u16 ocp_base, ocp_index;
900
901 ocp_base = addr & 0xf000;
902 if (ocp_base != tp->ocp_base) {
903 ocp_write_word(tp, MCU_TYPE_PLA, PLA_OCP_GPHY_BASE, ocp_base);
904 tp->ocp_base = ocp_base;
905 }
906
907 ocp_index = (addr & 0x0fff) | 0xb000;
908 ocp_write_word(tp, MCU_TYPE_PLA, ocp_index, data);
909}
910
hayeswangac244d32014-01-02 11:22:40 +0800911static inline void r8152_mdio_write(struct r8152 *tp, u32 reg_addr, u32 value)
hayeswangac718b62013-05-02 16:01:25 +0000912{
hayeswangac244d32014-01-02 11:22:40 +0800913 ocp_reg_write(tp, OCP_BASE_MII + reg_addr * 2, value);
hayeswangac718b62013-05-02 16:01:25 +0000914}
915
hayeswangac244d32014-01-02 11:22:40 +0800916static inline int r8152_mdio_read(struct r8152 *tp, u32 reg_addr)
hayeswangac718b62013-05-02 16:01:25 +0000917{
hayeswangac244d32014-01-02 11:22:40 +0800918 return ocp_reg_read(tp, OCP_BASE_MII + reg_addr * 2);
hayeswangac718b62013-05-02 16:01:25 +0000919}
920
hayeswang43779f82014-01-02 11:25:10 +0800921static void sram_write(struct r8152 *tp, u16 addr, u16 data)
922{
923 ocp_reg_write(tp, OCP_SRAM_ADDR, addr);
924 ocp_reg_write(tp, OCP_SRAM_DATA, data);
925}
926
927static u16 sram_read(struct r8152 *tp, u16 addr)
928{
929 ocp_reg_write(tp, OCP_SRAM_ADDR, addr);
930 return ocp_reg_read(tp, OCP_SRAM_DATA);
931}
932
hayeswangac718b62013-05-02 16:01:25 +0000933static int read_mii_word(struct net_device *netdev, int phy_id, int reg)
934{
935 struct r8152 *tp = netdev_priv(netdev);
hayeswang9a4be1b2014-02-18 21:49:07 +0800936 int ret;
hayeswangac718b62013-05-02 16:01:25 +0000937
hayeswang68714382014-04-11 17:54:31 +0800938 if (test_bit(RTL8152_UNPLUG, &tp->flags))
939 return -ENODEV;
940
hayeswangac718b62013-05-02 16:01:25 +0000941 if (phy_id != R8152_PHY_ID)
942 return -EINVAL;
943
hayeswang9a4be1b2014-02-18 21:49:07 +0800944 ret = usb_autopm_get_interface(tp->intf);
945 if (ret < 0)
946 goto out;
947
948 ret = r8152_mdio_read(tp, reg);
949
950 usb_autopm_put_interface(tp->intf);
951
952out:
953 return ret;
hayeswangac718b62013-05-02 16:01:25 +0000954}
955
956static
957void write_mii_word(struct net_device *netdev, int phy_id, int reg, int val)
958{
959 struct r8152 *tp = netdev_priv(netdev);
960
hayeswang68714382014-04-11 17:54:31 +0800961 if (test_bit(RTL8152_UNPLUG, &tp->flags))
962 return;
963
hayeswangac718b62013-05-02 16:01:25 +0000964 if (phy_id != R8152_PHY_ID)
965 return;
966
hayeswang9a4be1b2014-02-18 21:49:07 +0800967 if (usb_autopm_get_interface(tp->intf) < 0)
968 return;
969
hayeswangac718b62013-05-02 16:01:25 +0000970 r8152_mdio_write(tp, reg, val);
hayeswang9a4be1b2014-02-18 21:49:07 +0800971
972 usb_autopm_put_interface(tp->intf);
hayeswangac718b62013-05-02 16:01:25 +0000973}
974
hayeswangebc2ec482013-08-14 20:54:38 +0800975static
976int r8152_submit_rx(struct r8152 *tp, struct rx_agg *agg, gfp_t mem_flags);
977
hayeswangac718b62013-05-02 16:01:25 +0000978static inline void set_ethernet_addr(struct r8152 *tp)
979{
980 struct net_device *dev = tp->netdev;
hayeswang8a91c822014-02-18 21:49:01 +0800981 int ret;
hayeswang31787f52013-07-31 17:21:25 +0800982 u8 node_id[8] = {0};
hayeswangac718b62013-05-02 16:01:25 +0000983
hayeswang8a91c822014-02-18 21:49:01 +0800984 if (tp->version == RTL_VER_01)
985 ret = pla_ocp_read(tp, PLA_IDR, sizeof(node_id), node_id);
986 else
987 ret = pla_ocp_read(tp, PLA_BACKUP, sizeof(node_id), node_id);
988
989 if (ret < 0) {
hayeswangac718b62013-05-02 16:01:25 +0000990 netif_notice(tp, probe, dev, "inet addr fail\n");
hayeswang8a91c822014-02-18 21:49:01 +0800991 } else {
992 if (tp->version != RTL_VER_01) {
993 ocp_write_byte(tp, MCU_TYPE_PLA, PLA_CRWECR,
994 CRWECR_CONFIG);
995 pla_ocp_write(tp, PLA_IDR, BYTE_EN_SIX_BYTES,
996 sizeof(node_id), node_id);
997 ocp_write_byte(tp, MCU_TYPE_PLA, PLA_CRWECR,
998 CRWECR_NORAML);
999 }
1000
hayeswangac718b62013-05-02 16:01:25 +00001001 memcpy(dev->dev_addr, node_id, dev->addr_len);
1002 memcpy(dev->perm_addr, dev->dev_addr, dev->addr_len);
1003 }
hayeswangac718b62013-05-02 16:01:25 +00001004}
1005
1006static int rtl8152_set_mac_address(struct net_device *netdev, void *p)
1007{
1008 struct r8152 *tp = netdev_priv(netdev);
1009 struct sockaddr *addr = p;
hayeswangea6a7112014-10-02 17:03:12 +08001010 int ret = -EADDRNOTAVAIL;
hayeswangac718b62013-05-02 16:01:25 +00001011
1012 if (!is_valid_ether_addr(addr->sa_data))
hayeswangea6a7112014-10-02 17:03:12 +08001013 goto out1;
1014
1015 ret = usb_autopm_get_interface(tp->intf);
1016 if (ret < 0)
1017 goto out1;
hayeswangac718b62013-05-02 16:01:25 +00001018
1019 memcpy(netdev->dev_addr, addr->sa_data, netdev->addr_len);
1020
1021 ocp_write_byte(tp, MCU_TYPE_PLA, PLA_CRWECR, CRWECR_CONFIG);
1022 pla_ocp_write(tp, PLA_IDR, BYTE_EN_SIX_BYTES, 8, addr->sa_data);
1023 ocp_write_byte(tp, MCU_TYPE_PLA, PLA_CRWECR, CRWECR_NORAML);
1024
hayeswangea6a7112014-10-02 17:03:12 +08001025 usb_autopm_put_interface(tp->intf);
1026out1:
1027 return ret;
hayeswangac718b62013-05-02 16:01:25 +00001028}
1029
hayeswangac718b62013-05-02 16:01:25 +00001030static void read_bulk_callback(struct urb *urb)
1031{
hayeswangac718b62013-05-02 16:01:25 +00001032 struct net_device *netdev;
hayeswangac718b62013-05-02 16:01:25 +00001033 int status = urb->status;
hayeswangebc2ec482013-08-14 20:54:38 +08001034 struct rx_agg *agg;
1035 struct r8152 *tp;
hayeswangac718b62013-05-02 16:01:25 +00001036 int result;
hayeswangac718b62013-05-02 16:01:25 +00001037
hayeswangebc2ec482013-08-14 20:54:38 +08001038 agg = urb->context;
1039 if (!agg)
1040 return;
1041
1042 tp = agg->context;
hayeswangac718b62013-05-02 16:01:25 +00001043 if (!tp)
1044 return;
hayeswangebc2ec482013-08-14 20:54:38 +08001045
hayeswangac718b62013-05-02 16:01:25 +00001046 if (test_bit(RTL8152_UNPLUG, &tp->flags))
1047 return;
hayeswangebc2ec482013-08-14 20:54:38 +08001048
1049 if (!test_bit(WORK_ENABLE, &tp->flags))
hayeswangac718b62013-05-02 16:01:25 +00001050 return;
1051
hayeswangebc2ec482013-08-14 20:54:38 +08001052 netdev = tp->netdev;
hayeswang7559fb2f2013-08-16 16:09:38 +08001053
1054 /* When link down, the driver would cancel all bulks. */
1055 /* This avoid the re-submitting bulk */
hayeswangebc2ec482013-08-14 20:54:38 +08001056 if (!netif_carrier_ok(netdev))
1057 return;
1058
hayeswang9a4be1b2014-02-18 21:49:07 +08001059 usb_mark_last_busy(tp->udev);
1060
hayeswangac718b62013-05-02 16:01:25 +00001061 switch (status) {
1062 case 0:
hayeswangebc2ec482013-08-14 20:54:38 +08001063 if (urb->actual_length < ETH_ZLEN)
1064 break;
1065
hayeswang2685d412014-03-07 11:04:34 +08001066 spin_lock(&tp->rx_lock);
hayeswangebc2ec482013-08-14 20:54:38 +08001067 list_add_tail(&agg->list, &tp->rx_done);
hayeswang2685d412014-03-07 11:04:34 +08001068 spin_unlock(&tp->rx_lock);
hayeswangebc2ec482013-08-14 20:54:38 +08001069 tasklet_schedule(&tp->tl);
1070 return;
hayeswangac718b62013-05-02 16:01:25 +00001071 case -ESHUTDOWN:
1072 set_bit(RTL8152_UNPLUG, &tp->flags);
1073 netif_device_detach(tp->netdev);
hayeswangebc2ec482013-08-14 20:54:38 +08001074 return;
hayeswangac718b62013-05-02 16:01:25 +00001075 case -ENOENT:
1076 return; /* the urb is in unlink state */
1077 case -ETIME:
Hayes Wang4a8deae2014-01-07 11:18:22 +08001078 if (net_ratelimit())
1079 netdev_warn(netdev, "maybe reset is needed?\n");
hayeswangebc2ec482013-08-14 20:54:38 +08001080 break;
hayeswangac718b62013-05-02 16:01:25 +00001081 default:
Hayes Wang4a8deae2014-01-07 11:18:22 +08001082 if (net_ratelimit())
1083 netdev_warn(netdev, "Rx status %d\n", status);
hayeswangebc2ec482013-08-14 20:54:38 +08001084 break;
hayeswangac718b62013-05-02 16:01:25 +00001085 }
1086
hayeswangebc2ec482013-08-14 20:54:38 +08001087 result = r8152_submit_rx(tp, agg, GFP_ATOMIC);
hayeswangac718b62013-05-02 16:01:25 +00001088 if (result == -ENODEV) {
1089 netif_device_detach(tp->netdev);
1090 } else if (result) {
hayeswang2685d412014-03-07 11:04:34 +08001091 spin_lock(&tp->rx_lock);
hayeswangebc2ec482013-08-14 20:54:38 +08001092 list_add_tail(&agg->list, &tp->rx_done);
hayeswang2685d412014-03-07 11:04:34 +08001093 spin_unlock(&tp->rx_lock);
hayeswangebc2ec482013-08-14 20:54:38 +08001094 tasklet_schedule(&tp->tl);
hayeswangac718b62013-05-02 16:01:25 +00001095 }
hayeswangac718b62013-05-02 16:01:25 +00001096}
1097
1098static void write_bulk_callback(struct urb *urb)
1099{
hayeswangebc2ec482013-08-14 20:54:38 +08001100 struct net_device_stats *stats;
hayeswangd104eaf2014-03-06 15:07:17 +08001101 struct net_device *netdev;
hayeswangebc2ec482013-08-14 20:54:38 +08001102 struct tx_agg *agg;
hayeswangac718b62013-05-02 16:01:25 +00001103 struct r8152 *tp;
1104 int status = urb->status;
1105
hayeswangebc2ec482013-08-14 20:54:38 +08001106 agg = urb->context;
1107 if (!agg)
1108 return;
1109
1110 tp = agg->context;
hayeswangac718b62013-05-02 16:01:25 +00001111 if (!tp)
1112 return;
hayeswangebc2ec482013-08-14 20:54:38 +08001113
hayeswangd104eaf2014-03-06 15:07:17 +08001114 netdev = tp->netdev;
hayeswang05e0f1a2014-03-06 15:07:18 +08001115 stats = &netdev->stats;
hayeswangebc2ec482013-08-14 20:54:38 +08001116 if (status) {
Hayes Wang4a8deae2014-01-07 11:18:22 +08001117 if (net_ratelimit())
hayeswangd104eaf2014-03-06 15:07:17 +08001118 netdev_warn(netdev, "Tx status %d\n", status);
hayeswangebc2ec482013-08-14 20:54:38 +08001119 stats->tx_errors += agg->skb_num;
1120 } else {
1121 stats->tx_packets += agg->skb_num;
1122 stats->tx_bytes += agg->skb_len;
1123 }
1124
hayeswang2685d412014-03-07 11:04:34 +08001125 spin_lock(&tp->tx_lock);
hayeswangebc2ec482013-08-14 20:54:38 +08001126 list_add_tail(&agg->list, &tp->tx_free);
hayeswang2685d412014-03-07 11:04:34 +08001127 spin_unlock(&tp->tx_lock);
hayeswangebc2ec482013-08-14 20:54:38 +08001128
hayeswang9a4be1b2014-02-18 21:49:07 +08001129 usb_autopm_put_interface_async(tp->intf);
1130
hayeswangd104eaf2014-03-06 15:07:17 +08001131 if (!netif_carrier_ok(netdev))
hayeswangac718b62013-05-02 16:01:25 +00001132 return;
hayeswangebc2ec482013-08-14 20:54:38 +08001133
1134 if (!test_bit(WORK_ENABLE, &tp->flags))
1135 return;
1136
1137 if (test_bit(RTL8152_UNPLUG, &tp->flags))
1138 return;
1139
1140 if (!skb_queue_empty(&tp->tx_queue))
hayeswang0c3121f2014-03-07 11:04:36 +08001141 tasklet_schedule(&tp->tl);
hayeswangebc2ec482013-08-14 20:54:38 +08001142}
1143
hayeswang40a82912013-08-14 20:54:40 +08001144static void intr_callback(struct urb *urb)
1145{
1146 struct r8152 *tp;
hayeswang500b6d72013-11-20 17:30:57 +08001147 __le16 *d;
hayeswang40a82912013-08-14 20:54:40 +08001148 int status = urb->status;
1149 int res;
1150
1151 tp = urb->context;
1152 if (!tp)
1153 return;
1154
1155 if (!test_bit(WORK_ENABLE, &tp->flags))
1156 return;
1157
1158 if (test_bit(RTL8152_UNPLUG, &tp->flags))
1159 return;
1160
1161 switch (status) {
1162 case 0: /* success */
1163 break;
1164 case -ECONNRESET: /* unlink */
1165 case -ESHUTDOWN:
1166 netif_device_detach(tp->netdev);
1167 case -ENOENT:
1168 return;
1169 case -EOVERFLOW:
1170 netif_info(tp, intr, tp->netdev, "intr status -EOVERFLOW\n");
1171 goto resubmit;
1172 /* -EPIPE: should clear the halt */
1173 default:
1174 netif_info(tp, intr, tp->netdev, "intr status %d\n", status);
1175 goto resubmit;
1176 }
1177
1178 d = urb->transfer_buffer;
1179 if (INTR_LINK & __le16_to_cpu(d[0])) {
1180 if (!(tp->speed & LINK_STATUS)) {
1181 set_bit(RTL8152_LINK_CHG, &tp->flags);
1182 schedule_delayed_work(&tp->schedule, 0);
1183 }
1184 } else {
1185 if (tp->speed & LINK_STATUS) {
1186 set_bit(RTL8152_LINK_CHG, &tp->flags);
1187 schedule_delayed_work(&tp->schedule, 0);
1188 }
1189 }
1190
1191resubmit:
1192 res = usb_submit_urb(urb, GFP_ATOMIC);
1193 if (res == -ENODEV)
1194 netif_device_detach(tp->netdev);
1195 else if (res)
1196 netif_err(tp, intr, tp->netdev,
Hayes Wang4a8deae2014-01-07 11:18:22 +08001197 "can't resubmit intr, status %d\n", res);
hayeswang40a82912013-08-14 20:54:40 +08001198}
1199
hayeswangebc2ec482013-08-14 20:54:38 +08001200static inline void *rx_agg_align(void *data)
1201{
hayeswang8e1f51b2014-01-02 11:22:41 +08001202 return (void *)ALIGN((uintptr_t)data, RX_ALIGN);
hayeswangebc2ec482013-08-14 20:54:38 +08001203}
1204
1205static inline void *tx_agg_align(void *data)
1206{
hayeswang8e1f51b2014-01-02 11:22:41 +08001207 return (void *)ALIGN((uintptr_t)data, TX_ALIGN);
hayeswangebc2ec482013-08-14 20:54:38 +08001208}
1209
1210static void free_all_mem(struct r8152 *tp)
1211{
1212 int i;
1213
1214 for (i = 0; i < RTL8152_MAX_RX; i++) {
hayeswang9629e3c2014-01-15 10:42:15 +08001215 usb_free_urb(tp->rx_info[i].urb);
1216 tp->rx_info[i].urb = NULL;
hayeswangebc2ec482013-08-14 20:54:38 +08001217
hayeswang9629e3c2014-01-15 10:42:15 +08001218 kfree(tp->rx_info[i].buffer);
1219 tp->rx_info[i].buffer = NULL;
1220 tp->rx_info[i].head = NULL;
hayeswangebc2ec482013-08-14 20:54:38 +08001221 }
1222
1223 for (i = 0; i < RTL8152_MAX_TX; i++) {
hayeswang9629e3c2014-01-15 10:42:15 +08001224 usb_free_urb(tp->tx_info[i].urb);
1225 tp->tx_info[i].urb = NULL;
hayeswangebc2ec482013-08-14 20:54:38 +08001226
hayeswang9629e3c2014-01-15 10:42:15 +08001227 kfree(tp->tx_info[i].buffer);
1228 tp->tx_info[i].buffer = NULL;
1229 tp->tx_info[i].head = NULL;
hayeswangebc2ec482013-08-14 20:54:38 +08001230 }
hayeswang40a82912013-08-14 20:54:40 +08001231
hayeswang9629e3c2014-01-15 10:42:15 +08001232 usb_free_urb(tp->intr_urb);
1233 tp->intr_urb = NULL;
hayeswang40a82912013-08-14 20:54:40 +08001234
hayeswang9629e3c2014-01-15 10:42:15 +08001235 kfree(tp->intr_buff);
1236 tp->intr_buff = NULL;
hayeswangebc2ec482013-08-14 20:54:38 +08001237}
1238
1239static int alloc_all_mem(struct r8152 *tp)
1240{
1241 struct net_device *netdev = tp->netdev;
hayeswang40a82912013-08-14 20:54:40 +08001242 struct usb_interface *intf = tp->intf;
1243 struct usb_host_interface *alt = intf->cur_altsetting;
1244 struct usb_host_endpoint *ep_intr = alt->endpoint + 2;
hayeswangebc2ec482013-08-14 20:54:38 +08001245 struct urb *urb;
1246 int node, i;
1247 u8 *buf;
1248
1249 node = netdev->dev.parent ? dev_to_node(netdev->dev.parent) : -1;
1250
1251 spin_lock_init(&tp->rx_lock);
1252 spin_lock_init(&tp->tx_lock);
1253 INIT_LIST_HEAD(&tp->rx_done);
1254 INIT_LIST_HEAD(&tp->tx_free);
1255 skb_queue_head_init(&tp->tx_queue);
1256
1257 for (i = 0; i < RTL8152_MAX_RX; i++) {
1258 buf = kmalloc_node(rx_buf_sz, GFP_KERNEL, node);
1259 if (!buf)
1260 goto err1;
1261
1262 if (buf != rx_agg_align(buf)) {
1263 kfree(buf);
hayeswang8e1f51b2014-01-02 11:22:41 +08001264 buf = kmalloc_node(rx_buf_sz + RX_ALIGN, GFP_KERNEL,
1265 node);
hayeswangebc2ec482013-08-14 20:54:38 +08001266 if (!buf)
1267 goto err1;
1268 }
1269
1270 urb = usb_alloc_urb(0, GFP_KERNEL);
1271 if (!urb) {
1272 kfree(buf);
1273 goto err1;
1274 }
1275
1276 INIT_LIST_HEAD(&tp->rx_info[i].list);
1277 tp->rx_info[i].context = tp;
1278 tp->rx_info[i].urb = urb;
1279 tp->rx_info[i].buffer = buf;
1280 tp->rx_info[i].head = rx_agg_align(buf);
1281 }
1282
1283 for (i = 0; i < RTL8152_MAX_TX; i++) {
1284 buf = kmalloc_node(rx_buf_sz, GFP_KERNEL, node);
1285 if (!buf)
1286 goto err1;
1287
1288 if (buf != tx_agg_align(buf)) {
1289 kfree(buf);
hayeswang8e1f51b2014-01-02 11:22:41 +08001290 buf = kmalloc_node(rx_buf_sz + TX_ALIGN, GFP_KERNEL,
1291 node);
hayeswangebc2ec482013-08-14 20:54:38 +08001292 if (!buf)
1293 goto err1;
1294 }
1295
1296 urb = usb_alloc_urb(0, GFP_KERNEL);
1297 if (!urb) {
1298 kfree(buf);
1299 goto err1;
1300 }
1301
1302 INIT_LIST_HEAD(&tp->tx_info[i].list);
1303 tp->tx_info[i].context = tp;
1304 tp->tx_info[i].urb = urb;
1305 tp->tx_info[i].buffer = buf;
1306 tp->tx_info[i].head = tx_agg_align(buf);
1307
1308 list_add_tail(&tp->tx_info[i].list, &tp->tx_free);
1309 }
1310
hayeswang40a82912013-08-14 20:54:40 +08001311 tp->intr_urb = usb_alloc_urb(0, GFP_KERNEL);
1312 if (!tp->intr_urb)
1313 goto err1;
1314
1315 tp->intr_buff = kmalloc(INTBUFSIZE, GFP_KERNEL);
1316 if (!tp->intr_buff)
1317 goto err1;
1318
1319 tp->intr_interval = (int)ep_intr->desc.bInterval;
1320 usb_fill_int_urb(tp->intr_urb, tp->udev, usb_rcvintpipe(tp->udev, 3),
1321 tp->intr_buff, INTBUFSIZE, intr_callback,
1322 tp, tp->intr_interval);
1323
hayeswangebc2ec482013-08-14 20:54:38 +08001324 return 0;
1325
1326err1:
1327 free_all_mem(tp);
1328 return -ENOMEM;
1329}
1330
hayeswang0de98f62013-08-16 16:09:35 +08001331static struct tx_agg *r8152_get_tx_agg(struct r8152 *tp)
1332{
1333 struct tx_agg *agg = NULL;
1334 unsigned long flags;
1335
hayeswang21949ab2014-03-07 11:04:35 +08001336 if (list_empty(&tp->tx_free))
1337 return NULL;
1338
hayeswang0de98f62013-08-16 16:09:35 +08001339 spin_lock_irqsave(&tp->tx_lock, flags);
1340 if (!list_empty(&tp->tx_free)) {
1341 struct list_head *cursor;
1342
1343 cursor = tp->tx_free.next;
1344 list_del_init(cursor);
1345 agg = list_entry(cursor, struct tx_agg, list);
1346 }
1347 spin_unlock_irqrestore(&tp->tx_lock, flags);
1348
1349 return agg;
1350}
1351
hayeswang60c89072014-03-07 11:04:39 +08001352static inline __be16 get_protocol(struct sk_buff *skb)
hayeswang5bd23882013-08-14 20:54:39 +08001353{
hayeswang60c89072014-03-07 11:04:39 +08001354 __be16 protocol;
hayeswang5bd23882013-08-14 20:54:39 +08001355
hayeswang60c89072014-03-07 11:04:39 +08001356 if (skb->protocol == htons(ETH_P_8021Q))
1357 protocol = vlan_eth_hdr(skb)->h_vlan_encapsulated_proto;
1358 else
1359 protocol = skb->protocol;
hayeswang5bd23882013-08-14 20:54:39 +08001360
hayeswang60c89072014-03-07 11:04:39 +08001361 return protocol;
1362}
1363
hayeswang6128d1bb2014-03-07 11:04:40 +08001364/*
1365 * r8152_csum_workaround()
1366 * The hw limites the value the transport offset. When the offset is out of the
1367 * range, calculate the checksum by sw.
1368 */
1369static void r8152_csum_workaround(struct r8152 *tp, struct sk_buff *skb,
1370 struct sk_buff_head *list)
1371{
1372 if (skb_shinfo(skb)->gso_size) {
1373 netdev_features_t features = tp->netdev->features;
1374 struct sk_buff_head seg_list;
1375 struct sk_buff *segs, *nskb;
1376
hayeswanga91d45f2014-07-11 16:48:27 +08001377 features &= ~(NETIF_F_SG | NETIF_F_IPV6_CSUM | NETIF_F_TSO6);
hayeswang6128d1bb2014-03-07 11:04:40 +08001378 segs = skb_gso_segment(skb, features);
1379 if (IS_ERR(segs) || !segs)
1380 goto drop;
1381
1382 __skb_queue_head_init(&seg_list);
1383
1384 do {
1385 nskb = segs;
1386 segs = segs->next;
1387 nskb->next = NULL;
1388 __skb_queue_tail(&seg_list, nskb);
1389 } while (segs);
1390
1391 skb_queue_splice(&seg_list, list);
1392 dev_kfree_skb(skb);
1393 } else if (skb->ip_summed == CHECKSUM_PARTIAL) {
1394 if (skb_checksum_help(skb) < 0)
1395 goto drop;
1396
1397 __skb_queue_head(list, skb);
1398 } else {
1399 struct net_device_stats *stats;
1400
1401drop:
1402 stats = &tp->netdev->stats;
1403 stats->tx_dropped++;
1404 dev_kfree_skb(skb);
1405 }
1406}
1407
1408/*
1409 * msdn_giant_send_check()
1410 * According to the document of microsoft, the TCP Pseudo Header excludes the
1411 * packet length for IPv6 TCP large packets.
1412 */
1413static int msdn_giant_send_check(struct sk_buff *skb)
1414{
1415 const struct ipv6hdr *ipv6h;
1416 struct tcphdr *th;
hayeswangfcb308d2014-03-11 10:20:32 +08001417 int ret;
1418
1419 ret = skb_cow_head(skb, 0);
1420 if (ret)
1421 return ret;
hayeswang6128d1bb2014-03-07 11:04:40 +08001422
1423 ipv6h = ipv6_hdr(skb);
1424 th = tcp_hdr(skb);
1425
1426 th->check = 0;
1427 th->check = ~tcp_v6_check(0, &ipv6h->saddr, &ipv6h->daddr, 0);
1428
hayeswangfcb308d2014-03-11 10:20:32 +08001429 return ret;
hayeswang6128d1bb2014-03-07 11:04:40 +08001430}
1431
hayeswang60c89072014-03-07 11:04:39 +08001432static int r8152_tx_csum(struct r8152 *tp, struct tx_desc *desc,
1433 struct sk_buff *skb, u32 len, u32 transport_offset)
1434{
1435 u32 mss = skb_shinfo(skb)->gso_size;
1436 u32 opts1, opts2 = 0;
1437 int ret = TX_CSUM_SUCCESS;
1438
1439 WARN_ON_ONCE(len > TX_LEN_MAX);
1440
1441 opts1 = len | TX_FS | TX_LS;
1442
1443 if (mss) {
hayeswang6128d1bb2014-03-07 11:04:40 +08001444 if (transport_offset > GTTCPHO_MAX) {
1445 netif_warn(tp, tx_err, tp->netdev,
1446 "Invalid transport offset 0x%x for TSO\n",
1447 transport_offset);
1448 ret = TX_CSUM_TSO;
1449 goto unavailable;
1450 }
1451
hayeswang60c89072014-03-07 11:04:39 +08001452 switch (get_protocol(skb)) {
1453 case htons(ETH_P_IP):
1454 opts1 |= GTSENDV4;
1455 break;
1456
hayeswang6128d1bb2014-03-07 11:04:40 +08001457 case htons(ETH_P_IPV6):
hayeswangfcb308d2014-03-11 10:20:32 +08001458 if (msdn_giant_send_check(skb)) {
1459 ret = TX_CSUM_TSO;
1460 goto unavailable;
1461 }
hayeswang6128d1bb2014-03-07 11:04:40 +08001462 opts1 |= GTSENDV6;
hayeswang6128d1bb2014-03-07 11:04:40 +08001463 break;
1464
hayeswang60c89072014-03-07 11:04:39 +08001465 default:
1466 WARN_ON_ONCE(1);
1467 break;
1468 }
1469
1470 opts1 |= transport_offset << GTTCPHO_SHIFT;
1471 opts2 |= min(mss, MSS_MAX) << MSS_SHIFT;
1472 } else if (skb->ip_summed == CHECKSUM_PARTIAL) {
hayeswang5bd23882013-08-14 20:54:39 +08001473 u8 ip_protocol;
hayeswang5bd23882013-08-14 20:54:39 +08001474
hayeswang6128d1bb2014-03-07 11:04:40 +08001475 if (transport_offset > TCPHO_MAX) {
1476 netif_warn(tp, tx_err, tp->netdev,
1477 "Invalid transport offset 0x%x\n",
1478 transport_offset);
1479 ret = TX_CSUM_NONE;
1480 goto unavailable;
1481 }
1482
hayeswang60c89072014-03-07 11:04:39 +08001483 switch (get_protocol(skb)) {
hayeswang5bd23882013-08-14 20:54:39 +08001484 case htons(ETH_P_IP):
1485 opts2 |= IPV4_CS;
1486 ip_protocol = ip_hdr(skb)->protocol;
1487 break;
1488
1489 case htons(ETH_P_IPV6):
1490 opts2 |= IPV6_CS;
1491 ip_protocol = ipv6_hdr(skb)->nexthdr;
1492 break;
1493
1494 default:
1495 ip_protocol = IPPROTO_RAW;
1496 break;
1497 }
1498
hayeswang60c89072014-03-07 11:04:39 +08001499 if (ip_protocol == IPPROTO_TCP)
hayeswang5bd23882013-08-14 20:54:39 +08001500 opts2 |= TCP_CS;
hayeswang60c89072014-03-07 11:04:39 +08001501 else if (ip_protocol == IPPROTO_UDP)
hayeswang5bd23882013-08-14 20:54:39 +08001502 opts2 |= UDP_CS;
hayeswang60c89072014-03-07 11:04:39 +08001503 else
hayeswang5bd23882013-08-14 20:54:39 +08001504 WARN_ON_ONCE(1);
hayeswang5bd23882013-08-14 20:54:39 +08001505
hayeswang60c89072014-03-07 11:04:39 +08001506 opts2 |= transport_offset << TCPHO_SHIFT;
hayeswang5bd23882013-08-14 20:54:39 +08001507 }
hayeswang60c89072014-03-07 11:04:39 +08001508
1509 desc->opts2 = cpu_to_le32(opts2);
1510 desc->opts1 = cpu_to_le32(opts1);
1511
hayeswang6128d1bb2014-03-07 11:04:40 +08001512unavailable:
hayeswang60c89072014-03-07 11:04:39 +08001513 return ret;
hayeswang5bd23882013-08-14 20:54:39 +08001514}
1515
hayeswangb1379d92013-08-16 16:09:37 +08001516static int r8152_tx_agg_fill(struct r8152 *tp, struct tx_agg *agg)
1517{
hayeswangd84130a2014-02-18 21:49:02 +08001518 struct sk_buff_head skb_head, *tx_queue = &tp->tx_queue;
hayeswang9a4be1b2014-02-18 21:49:07 +08001519 int remain, ret;
hayeswangb1379d92013-08-16 16:09:37 +08001520 u8 *tx_data;
1521
hayeswangd84130a2014-02-18 21:49:02 +08001522 __skb_queue_head_init(&skb_head);
hayeswang0c3121f2014-03-07 11:04:36 +08001523 spin_lock(&tx_queue->lock);
hayeswangd84130a2014-02-18 21:49:02 +08001524 skb_queue_splice_init(tx_queue, &skb_head);
hayeswang0c3121f2014-03-07 11:04:36 +08001525 spin_unlock(&tx_queue->lock);
hayeswangd84130a2014-02-18 21:49:02 +08001526
hayeswangb1379d92013-08-16 16:09:37 +08001527 tx_data = agg->head;
1528 agg->skb_num = agg->skb_len = 0;
hayeswang7937f9e2013-11-20 17:30:54 +08001529 remain = rx_buf_sz;
hayeswangb1379d92013-08-16 16:09:37 +08001530
hayeswang7937f9e2013-11-20 17:30:54 +08001531 while (remain >= ETH_ZLEN + sizeof(struct tx_desc)) {
hayeswangb1379d92013-08-16 16:09:37 +08001532 struct tx_desc *tx_desc;
1533 struct sk_buff *skb;
1534 unsigned int len;
hayeswang60c89072014-03-07 11:04:39 +08001535 u32 offset;
hayeswangb1379d92013-08-16 16:09:37 +08001536
hayeswangd84130a2014-02-18 21:49:02 +08001537 skb = __skb_dequeue(&skb_head);
hayeswangb1379d92013-08-16 16:09:37 +08001538 if (!skb)
1539 break;
1540
hayeswang60c89072014-03-07 11:04:39 +08001541 len = skb->len + sizeof(*tx_desc);
1542
1543 if (len > remain) {
hayeswangd84130a2014-02-18 21:49:02 +08001544 __skb_queue_head(&skb_head, skb);
hayeswangb1379d92013-08-16 16:09:37 +08001545 break;
1546 }
1547
hayeswang7937f9e2013-11-20 17:30:54 +08001548 tx_data = tx_agg_align(tx_data);
hayeswangb1379d92013-08-16 16:09:37 +08001549 tx_desc = (struct tx_desc *)tx_data;
hayeswang60c89072014-03-07 11:04:39 +08001550
1551 offset = (u32)skb_transport_offset(skb);
1552
hayeswang6128d1bb2014-03-07 11:04:40 +08001553 if (r8152_tx_csum(tp, tx_desc, skb, skb->len, offset)) {
1554 r8152_csum_workaround(tp, skb, &skb_head);
1555 continue;
1556 }
hayeswang60c89072014-03-07 11:04:39 +08001557
hayeswangb1379d92013-08-16 16:09:37 +08001558 tx_data += sizeof(*tx_desc);
1559
hayeswang60c89072014-03-07 11:04:39 +08001560 len = skb->len;
1561 if (skb_copy_bits(skb, 0, tx_data, len) < 0) {
1562 struct net_device_stats *stats = &tp->netdev->stats;
1563
1564 stats->tx_dropped++;
1565 dev_kfree_skb_any(skb);
1566 tx_data -= sizeof(*tx_desc);
1567 continue;
1568 }
hayeswangb1379d92013-08-16 16:09:37 +08001569
hayeswang7937f9e2013-11-20 17:30:54 +08001570 tx_data += len;
hayeswang60c89072014-03-07 11:04:39 +08001571 agg->skb_len += len;
1572 agg->skb_num++;
1573
1574 dev_kfree_skb_any(skb);
1575
hayeswang7937f9e2013-11-20 17:30:54 +08001576 remain = rx_buf_sz - (int)(tx_agg_align(tx_data) - agg->head);
hayeswangb1379d92013-08-16 16:09:37 +08001577 }
1578
hayeswangd84130a2014-02-18 21:49:02 +08001579 if (!skb_queue_empty(&skb_head)) {
hayeswang0c3121f2014-03-07 11:04:36 +08001580 spin_lock(&tx_queue->lock);
hayeswangd84130a2014-02-18 21:49:02 +08001581 skb_queue_splice(&skb_head, tx_queue);
hayeswang0c3121f2014-03-07 11:04:36 +08001582 spin_unlock(&tx_queue->lock);
hayeswangd84130a2014-02-18 21:49:02 +08001583 }
1584
hayeswang0c3121f2014-03-07 11:04:36 +08001585 netif_tx_lock(tp->netdev);
hayeswangdd1b1192013-11-20 17:30:56 +08001586
1587 if (netif_queue_stopped(tp->netdev) &&
1588 skb_queue_len(&tp->tx_queue) < tp->tx_qlen)
1589 netif_wake_queue(tp->netdev);
1590
hayeswang0c3121f2014-03-07 11:04:36 +08001591 netif_tx_unlock(tp->netdev);
hayeswang9a4be1b2014-02-18 21:49:07 +08001592
hayeswang0c3121f2014-03-07 11:04:36 +08001593 ret = usb_autopm_get_interface_async(tp->intf);
hayeswang9a4be1b2014-02-18 21:49:07 +08001594 if (ret < 0)
1595 goto out_tx_fill;
hayeswangdd1b1192013-11-20 17:30:56 +08001596
hayeswangb1379d92013-08-16 16:09:37 +08001597 usb_fill_bulk_urb(agg->urb, tp->udev, usb_sndbulkpipe(tp->udev, 2),
1598 agg->head, (int)(tx_data - (u8 *)agg->head),
1599 (usb_complete_t)write_bulk_callback, agg);
1600
hayeswang0c3121f2014-03-07 11:04:36 +08001601 ret = usb_submit_urb(agg->urb, GFP_ATOMIC);
hayeswang9a4be1b2014-02-18 21:49:07 +08001602 if (ret < 0)
hayeswang0c3121f2014-03-07 11:04:36 +08001603 usb_autopm_put_interface_async(tp->intf);
hayeswang9a4be1b2014-02-18 21:49:07 +08001604
1605out_tx_fill:
1606 return ret;
hayeswangb1379d92013-08-16 16:09:37 +08001607}
1608
hayeswang565cab02014-03-07 11:04:38 +08001609static u8 r8152_rx_csum(struct r8152 *tp, struct rx_desc *rx_desc)
1610{
1611 u8 checksum = CHECKSUM_NONE;
1612 u32 opts2, opts3;
1613
1614 if (tp->version == RTL_VER_01)
1615 goto return_result;
1616
1617 opts2 = le32_to_cpu(rx_desc->opts2);
1618 opts3 = le32_to_cpu(rx_desc->opts3);
1619
1620 if (opts2 & RD_IPV4_CS) {
1621 if (opts3 & IPF)
1622 checksum = CHECKSUM_NONE;
1623 else if ((opts2 & RD_UDP_CS) && (opts3 & UDPF))
1624 checksum = CHECKSUM_NONE;
1625 else if ((opts2 & RD_TCP_CS) && (opts3 & TCPF))
1626 checksum = CHECKSUM_NONE;
1627 else
1628 checksum = CHECKSUM_UNNECESSARY;
hayeswang6128d1bb2014-03-07 11:04:40 +08001629 } else if (RD_IPV6_CS) {
1630 if ((opts2 & RD_UDP_CS) && !(opts3 & UDPF))
1631 checksum = CHECKSUM_UNNECESSARY;
1632 else if ((opts2 & RD_TCP_CS) && !(opts3 & TCPF))
1633 checksum = CHECKSUM_UNNECESSARY;
hayeswang565cab02014-03-07 11:04:38 +08001634 }
1635
1636return_result:
1637 return checksum;
1638}
1639
hayeswangebc2ec482013-08-14 20:54:38 +08001640static void rx_bottom(struct r8152 *tp)
1641{
hayeswanga5a4f462013-08-16 16:09:34 +08001642 unsigned long flags;
hayeswangd84130a2014-02-18 21:49:02 +08001643 struct list_head *cursor, *next, rx_queue;
hayeswangebc2ec482013-08-14 20:54:38 +08001644
hayeswangd84130a2014-02-18 21:49:02 +08001645 if (list_empty(&tp->rx_done))
1646 return;
1647
1648 INIT_LIST_HEAD(&rx_queue);
hayeswanga5a4f462013-08-16 16:09:34 +08001649 spin_lock_irqsave(&tp->rx_lock, flags);
hayeswangd84130a2014-02-18 21:49:02 +08001650 list_splice_init(&tp->rx_done, &rx_queue);
1651 spin_unlock_irqrestore(&tp->rx_lock, flags);
1652
1653 list_for_each_safe(cursor, next, &rx_queue) {
hayeswang43a44782013-08-16 16:09:36 +08001654 struct rx_desc *rx_desc;
1655 struct rx_agg *agg;
hayeswang43a44782013-08-16 16:09:36 +08001656 int len_used = 0;
1657 struct urb *urb;
1658 u8 *rx_data;
1659 int ret;
1660
hayeswangebc2ec482013-08-14 20:54:38 +08001661 list_del_init(cursor);
hayeswangebc2ec482013-08-14 20:54:38 +08001662
1663 agg = list_entry(cursor, struct rx_agg, list);
1664 urb = agg->urb;
hayeswang0de98f62013-08-16 16:09:35 +08001665 if (urb->actual_length < ETH_ZLEN)
1666 goto submit;
hayeswangebc2ec482013-08-14 20:54:38 +08001667
hayeswangebc2ec482013-08-14 20:54:38 +08001668 rx_desc = agg->head;
1669 rx_data = agg->head;
hayeswang7937f9e2013-11-20 17:30:54 +08001670 len_used += sizeof(struct rx_desc);
hayeswangebc2ec482013-08-14 20:54:38 +08001671
hayeswang7937f9e2013-11-20 17:30:54 +08001672 while (urb->actual_length > len_used) {
hayeswang43a44782013-08-16 16:09:36 +08001673 struct net_device *netdev = tp->netdev;
hayeswang05e0f1a2014-03-06 15:07:18 +08001674 struct net_device_stats *stats = &netdev->stats;
hayeswang7937f9e2013-11-20 17:30:54 +08001675 unsigned int pkt_len;
hayeswang43a44782013-08-16 16:09:36 +08001676 struct sk_buff *skb;
1677
hayeswang7937f9e2013-11-20 17:30:54 +08001678 pkt_len = le32_to_cpu(rx_desc->opts1) & RX_LEN_MASK;
hayeswangebc2ec482013-08-14 20:54:38 +08001679 if (pkt_len < ETH_ZLEN)
1680 break;
1681
hayeswang7937f9e2013-11-20 17:30:54 +08001682 len_used += pkt_len;
1683 if (urb->actual_length < len_used)
1684 break;
1685
hayeswang8e1f51b2014-01-02 11:22:41 +08001686 pkt_len -= CRC_SIZE;
hayeswangebc2ec482013-08-14 20:54:38 +08001687 rx_data += sizeof(struct rx_desc);
1688
1689 skb = netdev_alloc_skb_ip_align(netdev, pkt_len);
1690 if (!skb) {
1691 stats->rx_dropped++;
hayeswang5e2f7482014-03-07 11:04:37 +08001692 goto find_next_rx;
hayeswangebc2ec482013-08-14 20:54:38 +08001693 }
hayeswang565cab02014-03-07 11:04:38 +08001694
1695 skb->ip_summed = r8152_rx_csum(tp, rx_desc);
hayeswangebc2ec482013-08-14 20:54:38 +08001696 memcpy(skb->data, rx_data, pkt_len);
1697 skb_put(skb, pkt_len);
1698 skb->protocol = eth_type_trans(skb, netdev);
hayeswang9d9aafa2014-02-18 21:49:09 +08001699 netif_receive_skb(skb);
hayeswangebc2ec482013-08-14 20:54:38 +08001700 stats->rx_packets++;
1701 stats->rx_bytes += pkt_len;
1702
hayeswang5e2f7482014-03-07 11:04:37 +08001703find_next_rx:
hayeswang8e1f51b2014-01-02 11:22:41 +08001704 rx_data = rx_agg_align(rx_data + pkt_len + CRC_SIZE);
hayeswangebc2ec482013-08-14 20:54:38 +08001705 rx_desc = (struct rx_desc *)rx_data;
hayeswangebc2ec482013-08-14 20:54:38 +08001706 len_used = (int)(rx_data - (u8 *)agg->head);
hayeswang7937f9e2013-11-20 17:30:54 +08001707 len_used += sizeof(struct rx_desc);
hayeswangebc2ec482013-08-14 20:54:38 +08001708 }
1709
hayeswang0de98f62013-08-16 16:09:35 +08001710submit:
hayeswangebc2ec482013-08-14 20:54:38 +08001711 ret = r8152_submit_rx(tp, agg, GFP_ATOMIC);
hayeswangebc2ec482013-08-14 20:54:38 +08001712 if (ret && ret != -ENODEV) {
hayeswangd84130a2014-02-18 21:49:02 +08001713 spin_lock_irqsave(&tp->rx_lock, flags);
1714 list_add_tail(&agg->list, &tp->rx_done);
1715 spin_unlock_irqrestore(&tp->rx_lock, flags);
hayeswangebc2ec482013-08-14 20:54:38 +08001716 tasklet_schedule(&tp->tl);
1717 }
1718 }
hayeswangebc2ec482013-08-14 20:54:38 +08001719}
1720
1721static void tx_bottom(struct r8152 *tp)
1722{
hayeswangebc2ec482013-08-14 20:54:38 +08001723 int res;
1724
hayeswangb1379d92013-08-16 16:09:37 +08001725 do {
1726 struct tx_agg *agg;
hayeswangebc2ec482013-08-14 20:54:38 +08001727
hayeswangb1379d92013-08-16 16:09:37 +08001728 if (skb_queue_empty(&tp->tx_queue))
hayeswangebc2ec482013-08-14 20:54:38 +08001729 break;
1730
hayeswangb1379d92013-08-16 16:09:37 +08001731 agg = r8152_get_tx_agg(tp);
1732 if (!agg)
hayeswangebc2ec482013-08-14 20:54:38 +08001733 break;
hayeswangb1379d92013-08-16 16:09:37 +08001734
1735 res = r8152_tx_agg_fill(tp, agg);
1736 if (res) {
hayeswang05e0f1a2014-03-06 15:07:18 +08001737 struct net_device *netdev = tp->netdev;
hayeswangb1379d92013-08-16 16:09:37 +08001738
1739 if (res == -ENODEV) {
1740 netif_device_detach(netdev);
1741 } else {
hayeswang05e0f1a2014-03-06 15:07:18 +08001742 struct net_device_stats *stats = &netdev->stats;
1743 unsigned long flags;
1744
hayeswangb1379d92013-08-16 16:09:37 +08001745 netif_warn(tp, tx_err, netdev,
1746 "failed tx_urb %d\n", res);
1747 stats->tx_dropped += agg->skb_num;
hayeswangdb8515e2014-03-06 15:07:16 +08001748
hayeswangb1379d92013-08-16 16:09:37 +08001749 spin_lock_irqsave(&tp->tx_lock, flags);
1750 list_add_tail(&agg->list, &tp->tx_free);
1751 spin_unlock_irqrestore(&tp->tx_lock, flags);
1752 }
hayeswangebc2ec482013-08-14 20:54:38 +08001753 }
hayeswangb1379d92013-08-16 16:09:37 +08001754 } while (res == 0);
hayeswangebc2ec482013-08-14 20:54:38 +08001755}
1756
1757static void bottom_half(unsigned long data)
1758{
1759 struct r8152 *tp;
1760
1761 tp = (struct r8152 *)data;
1762
1763 if (test_bit(RTL8152_UNPLUG, &tp->flags))
1764 return;
1765
1766 if (!test_bit(WORK_ENABLE, &tp->flags))
1767 return;
1768
hayeswang7559fb2f2013-08-16 16:09:38 +08001769 /* When link down, the driver would cancel all bulks. */
1770 /* This avoid the re-submitting bulk */
hayeswangebc2ec482013-08-14 20:54:38 +08001771 if (!netif_carrier_ok(tp->netdev))
1772 return;
1773
1774 rx_bottom(tp);
hayeswang0c3121f2014-03-07 11:04:36 +08001775 tx_bottom(tp);
hayeswangebc2ec482013-08-14 20:54:38 +08001776}
1777
1778static
1779int r8152_submit_rx(struct r8152 *tp, struct rx_agg *agg, gfp_t mem_flags)
1780{
1781 usb_fill_bulk_urb(agg->urb, tp->udev, usb_rcvbulkpipe(tp->udev, 1),
1782 agg->head, rx_buf_sz,
1783 (usb_complete_t)read_bulk_callback, agg);
1784
1785 return usb_submit_urb(agg->urb, mem_flags);
hayeswangac718b62013-05-02 16:01:25 +00001786}
1787
hayeswang00a5e362014-02-18 21:48:59 +08001788static void rtl_drop_queued_tx(struct r8152 *tp)
1789{
1790 struct net_device_stats *stats = &tp->netdev->stats;
hayeswangd84130a2014-02-18 21:49:02 +08001791 struct sk_buff_head skb_head, *tx_queue = &tp->tx_queue;
hayeswang00a5e362014-02-18 21:48:59 +08001792 struct sk_buff *skb;
1793
hayeswangd84130a2014-02-18 21:49:02 +08001794 if (skb_queue_empty(tx_queue))
1795 return;
1796
1797 __skb_queue_head_init(&skb_head);
hayeswang2685d412014-03-07 11:04:34 +08001798 spin_lock_bh(&tx_queue->lock);
hayeswangd84130a2014-02-18 21:49:02 +08001799 skb_queue_splice_init(tx_queue, &skb_head);
hayeswang2685d412014-03-07 11:04:34 +08001800 spin_unlock_bh(&tx_queue->lock);
hayeswangd84130a2014-02-18 21:49:02 +08001801
1802 while ((skb = __skb_dequeue(&skb_head))) {
hayeswang00a5e362014-02-18 21:48:59 +08001803 dev_kfree_skb(skb);
1804 stats->tx_dropped++;
1805 }
1806}
1807
hayeswangac718b62013-05-02 16:01:25 +00001808static void rtl8152_tx_timeout(struct net_device *netdev)
1809{
1810 struct r8152 *tp = netdev_priv(netdev);
hayeswangebc2ec482013-08-14 20:54:38 +08001811 int i;
1812
Hayes Wang4a8deae2014-01-07 11:18:22 +08001813 netif_warn(tp, tx_err, netdev, "Tx timeout\n");
hayeswangebc2ec482013-08-14 20:54:38 +08001814 for (i = 0; i < RTL8152_MAX_TX; i++)
1815 usb_unlink_urb(tp->tx_info[i].urb);
hayeswangac718b62013-05-02 16:01:25 +00001816}
1817
1818static void rtl8152_set_rx_mode(struct net_device *netdev)
1819{
1820 struct r8152 *tp = netdev_priv(netdev);
1821
hayeswang40a82912013-08-14 20:54:40 +08001822 if (tp->speed & LINK_STATUS) {
hayeswangac718b62013-05-02 16:01:25 +00001823 set_bit(RTL8152_SET_RX_MODE, &tp->flags);
hayeswang40a82912013-08-14 20:54:40 +08001824 schedule_delayed_work(&tp->schedule, 0);
1825 }
hayeswangac718b62013-05-02 16:01:25 +00001826}
1827
1828static void _rtl8152_set_rx_mode(struct net_device *netdev)
1829{
1830 struct r8152 *tp = netdev_priv(netdev);
hayeswang31787f52013-07-31 17:21:25 +08001831 u32 mc_filter[2]; /* Multicast hash filter */
1832 __le32 tmp[2];
hayeswangac718b62013-05-02 16:01:25 +00001833 u32 ocp_data;
1834
hayeswangac718b62013-05-02 16:01:25 +00001835 clear_bit(RTL8152_SET_RX_MODE, &tp->flags);
1836 netif_stop_queue(netdev);
1837 ocp_data = ocp_read_dword(tp, MCU_TYPE_PLA, PLA_RCR);
1838 ocp_data &= ~RCR_ACPT_ALL;
1839 ocp_data |= RCR_AB | RCR_APM;
1840
1841 if (netdev->flags & IFF_PROMISC) {
1842 /* Unconditionally log net taps. */
1843 netif_notice(tp, link, netdev, "Promiscuous mode enabled\n");
1844 ocp_data |= RCR_AM | RCR_AAP;
1845 mc_filter[1] = mc_filter[0] = 0xffffffff;
1846 } else if ((netdev_mc_count(netdev) > multicast_filter_limit) ||
1847 (netdev->flags & IFF_ALLMULTI)) {
1848 /* Too many to filter perfectly -- accept all multicasts. */
1849 ocp_data |= RCR_AM;
1850 mc_filter[1] = mc_filter[0] = 0xffffffff;
1851 } else {
1852 struct netdev_hw_addr *ha;
1853
1854 mc_filter[1] = mc_filter[0] = 0;
1855 netdev_for_each_mc_addr(ha, netdev) {
1856 int bit_nr = ether_crc(ETH_ALEN, ha->addr) >> 26;
1857 mc_filter[bit_nr >> 5] |= 1 << (bit_nr & 31);
1858 ocp_data |= RCR_AM;
1859 }
1860 }
1861
hayeswang31787f52013-07-31 17:21:25 +08001862 tmp[0] = __cpu_to_le32(swab32(mc_filter[1]));
1863 tmp[1] = __cpu_to_le32(swab32(mc_filter[0]));
hayeswangac718b62013-05-02 16:01:25 +00001864
hayeswang31787f52013-07-31 17:21:25 +08001865 pla_ocp_write(tp, PLA_MAR, BYTE_EN_DWORD, sizeof(tmp), tmp);
hayeswangac718b62013-05-02 16:01:25 +00001866 ocp_write_dword(tp, MCU_TYPE_PLA, PLA_RCR, ocp_data);
1867 netif_wake_queue(netdev);
hayeswangac718b62013-05-02 16:01:25 +00001868}
1869
1870static netdev_tx_t rtl8152_start_xmit(struct sk_buff *skb,
hayeswang0c3121f2014-03-07 11:04:36 +08001871 struct net_device *netdev)
hayeswangac718b62013-05-02 16:01:25 +00001872{
1873 struct r8152 *tp = netdev_priv(netdev);
hayeswangac718b62013-05-02 16:01:25 +00001874
hayeswangac718b62013-05-02 16:01:25 +00001875 skb_tx_timestamp(skb);
hayeswangebc2ec482013-08-14 20:54:38 +08001876
hayeswang61598782013-11-20 17:30:55 +08001877 skb_queue_tail(&tp->tx_queue, skb);
hayeswangebc2ec482013-08-14 20:54:38 +08001878
hayeswang0c3121f2014-03-07 11:04:36 +08001879 if (!list_empty(&tp->tx_free)) {
1880 if (test_bit(SELECTIVE_SUSPEND, &tp->flags)) {
1881 set_bit(SCHEDULE_TASKLET, &tp->flags);
1882 schedule_delayed_work(&tp->schedule, 0);
1883 } else {
1884 usb_mark_last_busy(tp->udev);
1885 tasklet_schedule(&tp->tl);
1886 }
1887 } else if (skb_queue_len(&tp->tx_queue) > tp->tx_qlen)
hayeswangdd1b1192013-11-20 17:30:56 +08001888 netif_stop_queue(netdev);
1889
hayeswangac718b62013-05-02 16:01:25 +00001890 return NETDEV_TX_OK;
1891}
1892
1893static void r8152b_reset_packet_filter(struct r8152 *tp)
1894{
1895 u32 ocp_data;
1896
1897 ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_FMC);
1898 ocp_data &= ~FMC_FCR_MCU_EN;
1899 ocp_write_word(tp, MCU_TYPE_PLA, PLA_FMC, ocp_data);
1900 ocp_data |= FMC_FCR_MCU_EN;
1901 ocp_write_word(tp, MCU_TYPE_PLA, PLA_FMC, ocp_data);
1902}
1903
1904static void rtl8152_nic_reset(struct r8152 *tp)
1905{
1906 int i;
1907
1908 ocp_write_byte(tp, MCU_TYPE_PLA, PLA_CR, CR_RST);
1909
1910 for (i = 0; i < 1000; i++) {
1911 if (!(ocp_read_byte(tp, MCU_TYPE_PLA, PLA_CR) & CR_RST))
1912 break;
1913 udelay(100);
1914 }
1915}
1916
hayeswangdd1b1192013-11-20 17:30:56 +08001917static void set_tx_qlen(struct r8152 *tp)
1918{
1919 struct net_device *netdev = tp->netdev;
1920
1921 tp->tx_qlen = rx_buf_sz / (netdev->mtu + VLAN_ETH_HLEN + VLAN_HLEN +
1922 sizeof(struct tx_desc));
1923}
1924
hayeswangac718b62013-05-02 16:01:25 +00001925static inline u8 rtl8152_get_speed(struct r8152 *tp)
1926{
1927 return ocp_read_byte(tp, MCU_TYPE_PLA, PLA_PHYSTATUS);
1928}
1929
hayeswang507605a2014-01-02 11:22:43 +08001930static void rtl_set_eee_plus(struct r8152 *tp)
hayeswangac718b62013-05-02 16:01:25 +00001931{
hayeswangebc2ec482013-08-14 20:54:38 +08001932 u32 ocp_data;
hayeswangac718b62013-05-02 16:01:25 +00001933 u8 speed;
1934
1935 speed = rtl8152_get_speed(tp);
hayeswangebc2ec482013-08-14 20:54:38 +08001936 if (speed & _10bps) {
hayeswangac718b62013-05-02 16:01:25 +00001937 ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_EEEP_CR);
hayeswangebc2ec482013-08-14 20:54:38 +08001938 ocp_data |= EEEP_CR_EEEP_TX;
hayeswangac718b62013-05-02 16:01:25 +00001939 ocp_write_word(tp, MCU_TYPE_PLA, PLA_EEEP_CR, ocp_data);
1940 } else {
1941 ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_EEEP_CR);
hayeswangebc2ec482013-08-14 20:54:38 +08001942 ocp_data &= ~EEEP_CR_EEEP_TX;
hayeswangac718b62013-05-02 16:01:25 +00001943 ocp_write_word(tp, MCU_TYPE_PLA, PLA_EEEP_CR, ocp_data);
1944 }
hayeswang507605a2014-01-02 11:22:43 +08001945}
1946
hayeswang00a5e362014-02-18 21:48:59 +08001947static void rxdy_gated_en(struct r8152 *tp, bool enable)
1948{
1949 u32 ocp_data;
1950
1951 ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_MISC_1);
1952 if (enable)
1953 ocp_data |= RXDY_GATED_EN;
1954 else
1955 ocp_data &= ~RXDY_GATED_EN;
1956 ocp_write_word(tp, MCU_TYPE_PLA, PLA_MISC_1, ocp_data);
1957}
1958
hayeswang445f7f42014-09-23 16:31:47 +08001959static int rtl_start_rx(struct r8152 *tp)
1960{
1961 int i, ret = 0;
1962
1963 INIT_LIST_HEAD(&tp->rx_done);
1964 for (i = 0; i < RTL8152_MAX_RX; i++) {
1965 INIT_LIST_HEAD(&tp->rx_info[i].list);
1966 ret = r8152_submit_rx(tp, &tp->rx_info[i], GFP_KERNEL);
1967 if (ret)
1968 break;
1969 }
1970
1971 return ret;
1972}
1973
1974static int rtl_stop_rx(struct r8152 *tp)
1975{
1976 int i;
1977
1978 for (i = 0; i < RTL8152_MAX_RX; i++)
1979 usb_kill_urb(tp->rx_info[i].urb);
1980
1981 return 0;
1982}
1983
hayeswang507605a2014-01-02 11:22:43 +08001984static int rtl_enable(struct r8152 *tp)
1985{
1986 u32 ocp_data;
hayeswangac718b62013-05-02 16:01:25 +00001987
1988 r8152b_reset_packet_filter(tp);
1989
1990 ocp_data = ocp_read_byte(tp, MCU_TYPE_PLA, PLA_CR);
1991 ocp_data |= CR_RE | CR_TE;
1992 ocp_write_byte(tp, MCU_TYPE_PLA, PLA_CR, ocp_data);
1993
hayeswang00a5e362014-02-18 21:48:59 +08001994 rxdy_gated_en(tp, false);
hayeswangac718b62013-05-02 16:01:25 +00001995
hayeswang445f7f42014-09-23 16:31:47 +08001996 return rtl_start_rx(tp);
hayeswangac718b62013-05-02 16:01:25 +00001997}
1998
hayeswang507605a2014-01-02 11:22:43 +08001999static int rtl8152_enable(struct r8152 *tp)
2000{
hayeswang68714382014-04-11 17:54:31 +08002001 if (test_bit(RTL8152_UNPLUG, &tp->flags))
2002 return -ENODEV;
2003
hayeswang507605a2014-01-02 11:22:43 +08002004 set_tx_qlen(tp);
2005 rtl_set_eee_plus(tp);
2006
2007 return rtl_enable(tp);
2008}
2009
hayeswang43779f82014-01-02 11:25:10 +08002010static void r8153_set_rx_agg(struct r8152 *tp)
2011{
2012 u8 speed;
2013
2014 speed = rtl8152_get_speed(tp);
2015 if (speed & _1000bps) {
2016 if (tp->udev->speed == USB_SPEED_SUPER) {
2017 ocp_write_dword(tp, MCU_TYPE_USB, USB_RX_BUF_TH,
2018 RX_THR_SUPPER);
2019 ocp_write_dword(tp, MCU_TYPE_USB, USB_RX_EARLY_AGG,
2020 EARLY_AGG_SUPPER);
2021 } else {
2022 ocp_write_dword(tp, MCU_TYPE_USB, USB_RX_BUF_TH,
2023 RX_THR_HIGH);
2024 ocp_write_dword(tp, MCU_TYPE_USB, USB_RX_EARLY_AGG,
2025 EARLY_AGG_HIGH);
2026 }
2027 } else {
2028 ocp_write_dword(tp, MCU_TYPE_USB, USB_RX_BUF_TH, RX_THR_SLOW);
2029 ocp_write_dword(tp, MCU_TYPE_USB, USB_RX_EARLY_AGG,
2030 EARLY_AGG_SLOW);
2031 }
2032}
2033
2034static int rtl8153_enable(struct r8152 *tp)
2035{
hayeswang68714382014-04-11 17:54:31 +08002036 if (test_bit(RTL8152_UNPLUG, &tp->flags))
2037 return -ENODEV;
2038
hayeswang43779f82014-01-02 11:25:10 +08002039 set_tx_qlen(tp);
2040 rtl_set_eee_plus(tp);
2041 r8153_set_rx_agg(tp);
2042
2043 return rtl_enable(tp);
2044}
2045
hayeswangd70b1132014-09-19 15:17:18 +08002046static void rtl_disable(struct r8152 *tp)
hayeswangac718b62013-05-02 16:01:25 +00002047{
hayeswangebc2ec482013-08-14 20:54:38 +08002048 u32 ocp_data;
2049 int i;
hayeswangac718b62013-05-02 16:01:25 +00002050
hayeswang68714382014-04-11 17:54:31 +08002051 if (test_bit(RTL8152_UNPLUG, &tp->flags)) {
2052 rtl_drop_queued_tx(tp);
2053 return;
2054 }
2055
hayeswangac718b62013-05-02 16:01:25 +00002056 ocp_data = ocp_read_dword(tp, MCU_TYPE_PLA, PLA_RCR);
2057 ocp_data &= ~RCR_ACPT_ALL;
2058 ocp_write_dword(tp, MCU_TYPE_PLA, PLA_RCR, ocp_data);
2059
hayeswang00a5e362014-02-18 21:48:59 +08002060 rtl_drop_queued_tx(tp);
hayeswangebc2ec482013-08-14 20:54:38 +08002061
2062 for (i = 0; i < RTL8152_MAX_TX; i++)
2063 usb_kill_urb(tp->tx_info[i].urb);
hayeswangac718b62013-05-02 16:01:25 +00002064
hayeswang00a5e362014-02-18 21:48:59 +08002065 rxdy_gated_en(tp, true);
hayeswangac718b62013-05-02 16:01:25 +00002066
2067 for (i = 0; i < 1000; i++) {
2068 ocp_data = ocp_read_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL);
2069 if ((ocp_data & FIFO_EMPTY) == FIFO_EMPTY)
2070 break;
2071 mdelay(1);
2072 }
2073
2074 for (i = 0; i < 1000; i++) {
2075 if (ocp_read_word(tp, MCU_TYPE_PLA, PLA_TCR0) & TCR0_TX_EMPTY)
2076 break;
2077 mdelay(1);
2078 }
2079
hayeswang445f7f42014-09-23 16:31:47 +08002080 rtl_stop_rx(tp);
hayeswangac718b62013-05-02 16:01:25 +00002081
2082 rtl8152_nic_reset(tp);
2083}
2084
hayeswang00a5e362014-02-18 21:48:59 +08002085static void r8152_power_cut_en(struct r8152 *tp, bool enable)
2086{
2087 u32 ocp_data;
2088
2089 ocp_data = ocp_read_word(tp, MCU_TYPE_USB, USB_UPS_CTRL);
2090 if (enable)
2091 ocp_data |= POWER_CUT;
2092 else
2093 ocp_data &= ~POWER_CUT;
2094 ocp_write_word(tp, MCU_TYPE_USB, USB_UPS_CTRL, ocp_data);
2095
2096 ocp_data = ocp_read_word(tp, MCU_TYPE_USB, USB_PM_CTRL_STATUS);
2097 ocp_data &= ~RESUME_INDICATE;
2098 ocp_write_word(tp, MCU_TYPE_USB, USB_PM_CTRL_STATUS, ocp_data);
hayeswang00a5e362014-02-18 21:48:59 +08002099}
2100
hayeswang21ff2e82014-02-18 21:49:06 +08002101#define WAKE_ANY (WAKE_PHY | WAKE_MAGIC | WAKE_UCAST | WAKE_BCAST | WAKE_MCAST)
2102
2103static u32 __rtl_get_wol(struct r8152 *tp)
2104{
2105 u32 ocp_data;
2106 u32 wolopts = 0;
2107
2108 ocp_data = ocp_read_byte(tp, MCU_TYPE_PLA, PLA_CONFIG5);
2109 if (!(ocp_data & LAN_WAKE_EN))
2110 return 0;
2111
2112 ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_CONFIG34);
2113 if (ocp_data & LINK_ON_WAKE_EN)
2114 wolopts |= WAKE_PHY;
2115
2116 ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_CONFIG5);
2117 if (ocp_data & UWF_EN)
2118 wolopts |= WAKE_UCAST;
2119 if (ocp_data & BWF_EN)
2120 wolopts |= WAKE_BCAST;
2121 if (ocp_data & MWF_EN)
2122 wolopts |= WAKE_MCAST;
2123
2124 ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_CFG_WOL);
2125 if (ocp_data & MAGIC_EN)
2126 wolopts |= WAKE_MAGIC;
2127
2128 return wolopts;
2129}
2130
2131static void __rtl_set_wol(struct r8152 *tp, u32 wolopts)
2132{
2133 u32 ocp_data;
2134
2135 ocp_write_byte(tp, MCU_TYPE_PLA, PLA_CRWECR, CRWECR_CONFIG);
2136
2137 ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_CONFIG34);
2138 ocp_data &= ~LINK_ON_WAKE_EN;
2139 if (wolopts & WAKE_PHY)
2140 ocp_data |= LINK_ON_WAKE_EN;
2141 ocp_write_word(tp, MCU_TYPE_PLA, PLA_CONFIG34, ocp_data);
2142
2143 ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_CONFIG5);
2144 ocp_data &= ~(UWF_EN | BWF_EN | MWF_EN | LAN_WAKE_EN);
2145 if (wolopts & WAKE_UCAST)
2146 ocp_data |= UWF_EN;
2147 if (wolopts & WAKE_BCAST)
2148 ocp_data |= BWF_EN;
2149 if (wolopts & WAKE_MCAST)
2150 ocp_data |= MWF_EN;
2151 if (wolopts & WAKE_ANY)
2152 ocp_data |= LAN_WAKE_EN;
2153 ocp_write_word(tp, MCU_TYPE_PLA, PLA_CONFIG5, ocp_data);
2154
2155 ocp_write_byte(tp, MCU_TYPE_PLA, PLA_CRWECR, CRWECR_NORAML);
2156
2157 ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_CFG_WOL);
2158 ocp_data &= ~MAGIC_EN;
2159 if (wolopts & WAKE_MAGIC)
2160 ocp_data |= MAGIC_EN;
2161 ocp_write_word(tp, MCU_TYPE_PLA, PLA_CFG_WOL, ocp_data);
2162
2163 if (wolopts & WAKE_ANY)
2164 device_set_wakeup_enable(&tp->udev->dev, true);
2165 else
2166 device_set_wakeup_enable(&tp->udev->dev, false);
2167}
2168
hayeswang9a4be1b2014-02-18 21:49:07 +08002169static void rtl_runtime_suspend_enable(struct r8152 *tp, bool enable)
2170{
2171 if (enable) {
2172 u32 ocp_data;
2173
2174 __rtl_set_wol(tp, WAKE_ANY);
2175
2176 ocp_write_byte(tp, MCU_TYPE_PLA, PLA_CRWECR, CRWECR_CONFIG);
2177
2178 ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_CONFIG34);
2179 ocp_data |= LINK_OFF_WAKE_EN;
2180 ocp_write_word(tp, MCU_TYPE_PLA, PLA_CONFIG34, ocp_data);
2181
2182 ocp_write_byte(tp, MCU_TYPE_PLA, PLA_CRWECR, CRWECR_NORAML);
2183 } else {
2184 __rtl_set_wol(tp, tp->saved_wolopts);
2185 }
2186}
2187
hayeswangaa66a5f2014-02-18 21:49:04 +08002188static void rtl_phy_reset(struct r8152 *tp)
2189{
2190 u16 data;
2191 int i;
2192
2193 clear_bit(PHY_RESET, &tp->flags);
2194
2195 data = r8152_mdio_read(tp, MII_BMCR);
2196
2197 /* don't reset again before the previous one complete */
2198 if (data & BMCR_RESET)
2199 return;
2200
2201 data |= BMCR_RESET;
2202 r8152_mdio_write(tp, MII_BMCR, data);
2203
2204 for (i = 0; i < 50; i++) {
2205 msleep(20);
2206 if ((r8152_mdio_read(tp, MII_BMCR) & BMCR_RESET) == 0)
2207 break;
2208 }
2209}
2210
hayeswang43499682014-02-18 21:48:58 +08002211static void r8153_teredo_off(struct r8152 *tp)
2212{
2213 u32 ocp_data;
2214
2215 ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_TEREDO_CFG);
2216 ocp_data &= ~(TEREDO_SEL | TEREDO_RS_EVENT_MASK | OOB_TEREDO_EN);
2217 ocp_write_word(tp, MCU_TYPE_PLA, PLA_TEREDO_CFG, ocp_data);
2218
2219 ocp_write_word(tp, MCU_TYPE_PLA, PLA_WDT6_CTRL, WDT6_SET_MODE);
2220 ocp_write_word(tp, MCU_TYPE_PLA, PLA_REALWOW_TIMER, 0);
2221 ocp_write_dword(tp, MCU_TYPE_PLA, PLA_TEREDO_TIMER, 0);
2222}
2223
2224static void r8152b_disable_aldps(struct r8152 *tp)
2225{
2226 ocp_reg_write(tp, OCP_ALDPS_CONFIG, ENPDNPS | LINKENA | DIS_SDSAVE);
2227 msleep(20);
2228}
2229
2230static inline void r8152b_enable_aldps(struct r8152 *tp)
2231{
2232 ocp_reg_write(tp, OCP_ALDPS_CONFIG, ENPWRSAVE | ENPDNPS |
2233 LINKENA | DIS_SDSAVE);
2234}
2235
hayeswangd70b1132014-09-19 15:17:18 +08002236static void rtl8152_disable(struct r8152 *tp)
2237{
2238 r8152b_disable_aldps(tp);
2239 rtl_disable(tp);
2240 r8152b_enable_aldps(tp);
2241}
2242
hayeswang43499682014-02-18 21:48:58 +08002243static void r8152b_hw_phy_cfg(struct r8152 *tp)
2244{
hayeswangf0cbe0a2014-02-18 21:49:03 +08002245 u16 data;
2246
2247 data = r8152_mdio_read(tp, MII_BMCR);
2248 if (data & BMCR_PDOWN) {
2249 data &= ~BMCR_PDOWN;
2250 r8152_mdio_write(tp, MII_BMCR, data);
2251 }
2252
hayeswangaa66a5f2014-02-18 21:49:04 +08002253 set_bit(PHY_RESET, &tp->flags);
hayeswang43499682014-02-18 21:48:58 +08002254}
2255
hayeswangac718b62013-05-02 16:01:25 +00002256static void r8152b_exit_oob(struct r8152 *tp)
2257{
hayeswangdb8515e2014-03-06 15:07:16 +08002258 u32 ocp_data;
2259 int i;
hayeswangac718b62013-05-02 16:01:25 +00002260
2261 ocp_data = ocp_read_dword(tp, MCU_TYPE_PLA, PLA_RCR);
2262 ocp_data &= ~RCR_ACPT_ALL;
2263 ocp_write_dword(tp, MCU_TYPE_PLA, PLA_RCR, ocp_data);
2264
hayeswang00a5e362014-02-18 21:48:59 +08002265 rxdy_gated_en(tp, true);
hayeswangda9bd112014-02-18 21:49:08 +08002266 r8153_teredo_off(tp);
hayeswang7e9da482014-02-18 21:49:05 +08002267 r8152b_hw_phy_cfg(tp);
hayeswangac718b62013-05-02 16:01:25 +00002268
2269 ocp_write_byte(tp, MCU_TYPE_PLA, PLA_CRWECR, CRWECR_NORAML);
2270 ocp_write_byte(tp, MCU_TYPE_PLA, PLA_CR, 0x00);
2271
2272 ocp_data = ocp_read_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL);
2273 ocp_data &= ~NOW_IS_OOB;
2274 ocp_write_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL, ocp_data);
2275
2276 ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_SFF_STS_7);
2277 ocp_data &= ~MCU_BORW_EN;
2278 ocp_write_word(tp, MCU_TYPE_PLA, PLA_SFF_STS_7, ocp_data);
2279
2280 for (i = 0; i < 1000; i++) {
2281 ocp_data = ocp_read_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL);
2282 if (ocp_data & LINK_LIST_READY)
2283 break;
2284 mdelay(1);
2285 }
2286
2287 ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_SFF_STS_7);
2288 ocp_data |= RE_INIT_LL;
2289 ocp_write_word(tp, MCU_TYPE_PLA, PLA_SFF_STS_7, ocp_data);
2290
2291 for (i = 0; i < 1000; i++) {
2292 ocp_data = ocp_read_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL);
2293 if (ocp_data & LINK_LIST_READY)
2294 break;
2295 mdelay(1);
2296 }
2297
2298 rtl8152_nic_reset(tp);
2299
2300 /* rx share fifo credit full threshold */
2301 ocp_write_dword(tp, MCU_TYPE_PLA, PLA_RXFIFO_CTRL0, RXFIFO_THR1_NORMAL);
2302
hayeswanga3cc4652014-07-24 16:37:43 +08002303 if (tp->udev->speed == USB_SPEED_FULL ||
2304 tp->udev->speed == USB_SPEED_LOW) {
hayeswangac718b62013-05-02 16:01:25 +00002305 /* rx share fifo credit near full threshold */
2306 ocp_write_dword(tp, MCU_TYPE_PLA, PLA_RXFIFO_CTRL1,
2307 RXFIFO_THR2_FULL);
2308 ocp_write_dword(tp, MCU_TYPE_PLA, PLA_RXFIFO_CTRL2,
2309 RXFIFO_THR3_FULL);
2310 } else {
2311 /* rx share fifo credit near full threshold */
2312 ocp_write_dword(tp, MCU_TYPE_PLA, PLA_RXFIFO_CTRL1,
2313 RXFIFO_THR2_HIGH);
2314 ocp_write_dword(tp, MCU_TYPE_PLA, PLA_RXFIFO_CTRL2,
2315 RXFIFO_THR3_HIGH);
2316 }
2317
2318 /* TX share fifo free credit full threshold */
2319 ocp_write_dword(tp, MCU_TYPE_PLA, PLA_TXFIFO_CTRL, TXFIFO_THR_NORMAL);
2320
2321 ocp_write_byte(tp, MCU_TYPE_USB, USB_TX_AGG, TX_AGG_MAX_THRESHOLD);
hayeswang8e1f51b2014-01-02 11:22:41 +08002322 ocp_write_dword(tp, MCU_TYPE_USB, USB_RX_BUF_TH, RX_THR_HIGH);
hayeswangac718b62013-05-02 16:01:25 +00002323 ocp_write_dword(tp, MCU_TYPE_USB, USB_TX_DMA,
2324 TEST_MODE_DISABLE | TX_SIZE_ADJUST1);
2325
2326 ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_CPCR);
2327 ocp_data &= ~CPCR_RX_VLAN;
2328 ocp_write_word(tp, MCU_TYPE_PLA, PLA_CPCR, ocp_data);
2329
2330 ocp_write_word(tp, MCU_TYPE_PLA, PLA_RMS, RTL8152_RMS);
2331
2332 ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_TCR0);
2333 ocp_data |= TCR0_AUTO_FIFO;
2334 ocp_write_word(tp, MCU_TYPE_PLA, PLA_TCR0, ocp_data);
2335}
2336
2337static void r8152b_enter_oob(struct r8152 *tp)
2338{
hayeswang45f4a192014-01-06 17:08:41 +08002339 u32 ocp_data;
2340 int i;
hayeswangac718b62013-05-02 16:01:25 +00002341
2342 ocp_data = ocp_read_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL);
2343 ocp_data &= ~NOW_IS_OOB;
2344 ocp_write_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL, ocp_data);
2345
2346 ocp_write_dword(tp, MCU_TYPE_PLA, PLA_RXFIFO_CTRL0, RXFIFO_THR1_OOB);
2347 ocp_write_dword(tp, MCU_TYPE_PLA, PLA_RXFIFO_CTRL1, RXFIFO_THR2_OOB);
2348 ocp_write_dword(tp, MCU_TYPE_PLA, PLA_RXFIFO_CTRL2, RXFIFO_THR3_OOB);
2349
hayeswangd70b1132014-09-19 15:17:18 +08002350 rtl_disable(tp);
hayeswangac718b62013-05-02 16:01:25 +00002351
2352 for (i = 0; i < 1000; i++) {
2353 ocp_data = ocp_read_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL);
2354 if (ocp_data & LINK_LIST_READY)
2355 break;
2356 mdelay(1);
2357 }
2358
2359 ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_SFF_STS_7);
2360 ocp_data |= RE_INIT_LL;
2361 ocp_write_word(tp, MCU_TYPE_PLA, PLA_SFF_STS_7, ocp_data);
2362
2363 for (i = 0; i < 1000; i++) {
2364 ocp_data = ocp_read_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL);
2365 if (ocp_data & LINK_LIST_READY)
2366 break;
2367 mdelay(1);
2368 }
2369
2370 ocp_write_word(tp, MCU_TYPE_PLA, PLA_RMS, RTL8152_RMS);
2371
hayeswangac718b62013-05-02 16:01:25 +00002372 ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_CPCR);
2373 ocp_data |= CPCR_RX_VLAN;
2374 ocp_write_word(tp, MCU_TYPE_PLA, PLA_CPCR, ocp_data);
2375
2376 ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PAL_BDC_CR);
2377 ocp_data |= ALDPS_PROXY_MODE;
2378 ocp_write_word(tp, MCU_TYPE_PLA, PAL_BDC_CR, ocp_data);
2379
2380 ocp_data = ocp_read_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL);
2381 ocp_data |= NOW_IS_OOB | DIS_MCU_CLROOB;
2382 ocp_write_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL, ocp_data);
2383
hayeswang00a5e362014-02-18 21:48:59 +08002384 rxdy_gated_en(tp, false);
hayeswangac718b62013-05-02 16:01:25 +00002385
2386 ocp_data = ocp_read_dword(tp, MCU_TYPE_PLA, PLA_RCR);
2387 ocp_data |= RCR_APM | RCR_AM | RCR_AB;
2388 ocp_write_dword(tp, MCU_TYPE_PLA, PLA_RCR, ocp_data);
2389}
2390
hayeswang43779f82014-01-02 11:25:10 +08002391static void r8153_hw_phy_cfg(struct r8152 *tp)
2392{
2393 u32 ocp_data;
2394 u16 data;
2395
2396 ocp_reg_write(tp, OCP_ADC_CFG, CKADSEL_L | ADC_EN | EN_EMI_L);
hayeswangf0cbe0a2014-02-18 21:49:03 +08002397 data = r8152_mdio_read(tp, MII_BMCR);
2398 if (data & BMCR_PDOWN) {
2399 data &= ~BMCR_PDOWN;
2400 r8152_mdio_write(tp, MII_BMCR, data);
2401 }
hayeswang43779f82014-01-02 11:25:10 +08002402
2403 if (tp->version == RTL_VER_03) {
2404 data = ocp_reg_read(tp, OCP_EEE_CFG);
2405 data &= ~CTAP_SHORT_EN;
2406 ocp_reg_write(tp, OCP_EEE_CFG, data);
2407 }
2408
2409 data = ocp_reg_read(tp, OCP_POWER_CFG);
2410 data |= EEE_CLKDIV_EN;
2411 ocp_reg_write(tp, OCP_POWER_CFG, data);
2412
2413 data = ocp_reg_read(tp, OCP_DOWN_SPEED);
2414 data |= EN_10M_BGOFF;
2415 ocp_reg_write(tp, OCP_DOWN_SPEED, data);
2416 data = ocp_reg_read(tp, OCP_POWER_CFG);
2417 data |= EN_10M_PLLOFF;
2418 ocp_reg_write(tp, OCP_POWER_CFG, data);
2419 data = sram_read(tp, SRAM_IMPEDANCE);
2420 data &= ~RX_DRIVING_MASK;
2421 sram_write(tp, SRAM_IMPEDANCE, data);
2422
2423 ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_PHY_PWR);
2424 ocp_data |= PFM_PWM_SWITCH;
2425 ocp_write_word(tp, MCU_TYPE_PLA, PLA_PHY_PWR, ocp_data);
2426
2427 data = sram_read(tp, SRAM_LPF_CFG);
2428 data |= LPF_AUTO_TUNE;
2429 sram_write(tp, SRAM_LPF_CFG, data);
2430
2431 data = sram_read(tp, SRAM_10M_AMP1);
2432 data |= GDAC_IB_UPALL;
2433 sram_write(tp, SRAM_10M_AMP1, data);
2434 data = sram_read(tp, SRAM_10M_AMP2);
2435 data |= AMP_DN;
2436 sram_write(tp, SRAM_10M_AMP2, data);
hayeswangaa66a5f2014-02-18 21:49:04 +08002437
2438 set_bit(PHY_RESET, &tp->flags);
hayeswang43779f82014-01-02 11:25:10 +08002439}
2440
hayeswangb9702722014-02-18 21:49:00 +08002441static void r8153_u1u2en(struct r8152 *tp, bool enable)
hayeswang43779f82014-01-02 11:25:10 +08002442{
2443 u8 u1u2[8];
2444
2445 if (enable)
2446 memset(u1u2, 0xff, sizeof(u1u2));
2447 else
2448 memset(u1u2, 0x00, sizeof(u1u2));
2449
2450 usb_ocp_write(tp, USB_TOLERANCE, BYTE_EN_SIX_BYTES, sizeof(u1u2), u1u2);
2451}
2452
hayeswangb9702722014-02-18 21:49:00 +08002453static void r8153_u2p3en(struct r8152 *tp, bool enable)
hayeswang43779f82014-01-02 11:25:10 +08002454{
2455 u32 ocp_data;
2456
2457 ocp_data = ocp_read_word(tp, MCU_TYPE_USB, USB_U2P3_CTRL);
2458 if (enable)
2459 ocp_data |= U2P3_ENABLE;
2460 else
2461 ocp_data &= ~U2P3_ENABLE;
2462 ocp_write_word(tp, MCU_TYPE_USB, USB_U2P3_CTRL, ocp_data);
2463}
2464
hayeswangb9702722014-02-18 21:49:00 +08002465static void r8153_power_cut_en(struct r8152 *tp, bool enable)
hayeswang43779f82014-01-02 11:25:10 +08002466{
2467 u32 ocp_data;
2468
2469 ocp_data = ocp_read_word(tp, MCU_TYPE_USB, USB_POWER_CUT);
2470 if (enable)
2471 ocp_data |= PWR_EN | PHASE2_EN;
2472 else
2473 ocp_data &= ~(PWR_EN | PHASE2_EN);
2474 ocp_write_word(tp, MCU_TYPE_USB, USB_POWER_CUT, ocp_data);
2475
2476 ocp_data = ocp_read_word(tp, MCU_TYPE_USB, USB_MISC_0);
2477 ocp_data &= ~PCUT_STATUS;
2478 ocp_write_word(tp, MCU_TYPE_USB, USB_MISC_0, ocp_data);
2479}
2480
hayeswang43779f82014-01-02 11:25:10 +08002481static void r8153_first_init(struct r8152 *tp)
2482{
2483 u32 ocp_data;
2484 int i;
2485
hayeswang00a5e362014-02-18 21:48:59 +08002486 rxdy_gated_en(tp, true);
hayeswang43779f82014-01-02 11:25:10 +08002487 r8153_teredo_off(tp);
2488
2489 ocp_data = ocp_read_dword(tp, MCU_TYPE_PLA, PLA_RCR);
2490 ocp_data &= ~RCR_ACPT_ALL;
2491 ocp_write_dword(tp, MCU_TYPE_PLA, PLA_RCR, ocp_data);
2492
2493 r8153_hw_phy_cfg(tp);
2494
2495 rtl8152_nic_reset(tp);
2496
2497 ocp_data = ocp_read_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL);
2498 ocp_data &= ~NOW_IS_OOB;
2499 ocp_write_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL, ocp_data);
2500
2501 ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_SFF_STS_7);
2502 ocp_data &= ~MCU_BORW_EN;
2503 ocp_write_word(tp, MCU_TYPE_PLA, PLA_SFF_STS_7, ocp_data);
2504
2505 for (i = 0; i < 1000; i++) {
2506 ocp_data = ocp_read_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL);
2507 if (ocp_data & LINK_LIST_READY)
2508 break;
2509 mdelay(1);
2510 }
2511
2512 ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_SFF_STS_7);
2513 ocp_data |= RE_INIT_LL;
2514 ocp_write_word(tp, MCU_TYPE_PLA, PLA_SFF_STS_7, ocp_data);
2515
2516 for (i = 0; i < 1000; i++) {
2517 ocp_data = ocp_read_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL);
2518 if (ocp_data & LINK_LIST_READY)
2519 break;
2520 mdelay(1);
2521 }
2522
2523 ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_CPCR);
2524 ocp_data &= ~CPCR_RX_VLAN;
2525 ocp_write_word(tp, MCU_TYPE_PLA, PLA_CPCR, ocp_data);
2526
hayeswang69b4b7a2014-07-10 10:58:54 +08002527 ocp_write_word(tp, MCU_TYPE_PLA, PLA_RMS, RTL8153_RMS);
2528 ocp_write_byte(tp, MCU_TYPE_PLA, PLA_MTPS, MTPS_JUMBO);
hayeswang43779f82014-01-02 11:25:10 +08002529
2530 ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_TCR0);
2531 ocp_data |= TCR0_AUTO_FIFO;
2532 ocp_write_word(tp, MCU_TYPE_PLA, PLA_TCR0, ocp_data);
2533
2534 rtl8152_nic_reset(tp);
2535
2536 /* rx share fifo credit full threshold */
2537 ocp_write_dword(tp, MCU_TYPE_PLA, PLA_RXFIFO_CTRL0, RXFIFO_THR1_NORMAL);
2538 ocp_write_word(tp, MCU_TYPE_PLA, PLA_RXFIFO_CTRL1, RXFIFO_THR2_NORMAL);
2539 ocp_write_word(tp, MCU_TYPE_PLA, PLA_RXFIFO_CTRL2, RXFIFO_THR3_NORMAL);
2540 /* TX share fifo free credit full threshold */
2541 ocp_write_dword(tp, MCU_TYPE_PLA, PLA_TXFIFO_CTRL, TXFIFO_THR_NORMAL2);
2542
hayeswang9629e3c2014-01-15 10:42:15 +08002543 /* rx aggregation */
hayeswang43779f82014-01-02 11:25:10 +08002544 ocp_data = ocp_read_word(tp, MCU_TYPE_USB, USB_USB_CTRL);
2545 ocp_data &= ~RX_AGG_DISABLE;
2546 ocp_write_word(tp, MCU_TYPE_USB, USB_USB_CTRL, ocp_data);
2547}
2548
2549static void r8153_enter_oob(struct r8152 *tp)
2550{
2551 u32 ocp_data;
2552 int i;
2553
2554 ocp_data = ocp_read_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL);
2555 ocp_data &= ~NOW_IS_OOB;
2556 ocp_write_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL, ocp_data);
2557
hayeswangd70b1132014-09-19 15:17:18 +08002558 rtl_disable(tp);
hayeswang43779f82014-01-02 11:25:10 +08002559
2560 for (i = 0; i < 1000; i++) {
2561 ocp_data = ocp_read_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL);
2562 if (ocp_data & LINK_LIST_READY)
2563 break;
2564 mdelay(1);
2565 }
2566
2567 ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_SFF_STS_7);
2568 ocp_data |= RE_INIT_LL;
2569 ocp_write_word(tp, MCU_TYPE_PLA, PLA_SFF_STS_7, ocp_data);
2570
2571 for (i = 0; i < 1000; i++) {
2572 ocp_data = ocp_read_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL);
2573 if (ocp_data & LINK_LIST_READY)
2574 break;
2575 mdelay(1);
2576 }
2577
hayeswang69b4b7a2014-07-10 10:58:54 +08002578 ocp_write_word(tp, MCU_TYPE_PLA, PLA_RMS, RTL8153_RMS);
hayeswang43779f82014-01-02 11:25:10 +08002579
hayeswang43779f82014-01-02 11:25:10 +08002580 ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_TEREDO_CFG);
2581 ocp_data &= ~TEREDO_WAKE_MASK;
2582 ocp_write_word(tp, MCU_TYPE_PLA, PLA_TEREDO_CFG, ocp_data);
2583
2584 ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_CPCR);
2585 ocp_data |= CPCR_RX_VLAN;
2586 ocp_write_word(tp, MCU_TYPE_PLA, PLA_CPCR, ocp_data);
2587
2588 ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PAL_BDC_CR);
2589 ocp_data |= ALDPS_PROXY_MODE;
2590 ocp_write_word(tp, MCU_TYPE_PLA, PAL_BDC_CR, ocp_data);
2591
2592 ocp_data = ocp_read_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL);
2593 ocp_data |= NOW_IS_OOB | DIS_MCU_CLROOB;
2594 ocp_write_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL, ocp_data);
2595
hayeswang00a5e362014-02-18 21:48:59 +08002596 rxdy_gated_en(tp, false);
hayeswang43779f82014-01-02 11:25:10 +08002597
2598 ocp_data = ocp_read_dword(tp, MCU_TYPE_PLA, PLA_RCR);
2599 ocp_data |= RCR_APM | RCR_AM | RCR_AB;
2600 ocp_write_dword(tp, MCU_TYPE_PLA, PLA_RCR, ocp_data);
2601}
2602
2603static void r8153_disable_aldps(struct r8152 *tp)
2604{
2605 u16 data;
2606
2607 data = ocp_reg_read(tp, OCP_POWER_CFG);
2608 data &= ~EN_ALDPS;
2609 ocp_reg_write(tp, OCP_POWER_CFG, data);
2610 msleep(20);
2611}
2612
2613static void r8153_enable_aldps(struct r8152 *tp)
2614{
2615 u16 data;
2616
2617 data = ocp_reg_read(tp, OCP_POWER_CFG);
2618 data |= EN_ALDPS;
2619 ocp_reg_write(tp, OCP_POWER_CFG, data);
2620}
2621
hayeswangd70b1132014-09-19 15:17:18 +08002622static void rtl8153_disable(struct r8152 *tp)
2623{
2624 r8153_disable_aldps(tp);
2625 rtl_disable(tp);
2626 r8153_enable_aldps(tp);
2627}
2628
hayeswangac718b62013-05-02 16:01:25 +00002629static int rtl8152_set_speed(struct r8152 *tp, u8 autoneg, u16 speed, u8 duplex)
2630{
hayeswang43779f82014-01-02 11:25:10 +08002631 u16 bmcr, anar, gbcr;
hayeswangac718b62013-05-02 16:01:25 +00002632 int ret = 0;
2633
2634 cancel_delayed_work_sync(&tp->schedule);
2635 anar = r8152_mdio_read(tp, MII_ADVERTISE);
2636 anar &= ~(ADVERTISE_10HALF | ADVERTISE_10FULL |
2637 ADVERTISE_100HALF | ADVERTISE_100FULL);
hayeswang43779f82014-01-02 11:25:10 +08002638 if (tp->mii.supports_gmii) {
2639 gbcr = r8152_mdio_read(tp, MII_CTRL1000);
2640 gbcr &= ~(ADVERTISE_1000FULL | ADVERTISE_1000HALF);
2641 } else {
2642 gbcr = 0;
2643 }
hayeswangac718b62013-05-02 16:01:25 +00002644
2645 if (autoneg == AUTONEG_DISABLE) {
2646 if (speed == SPEED_10) {
2647 bmcr = 0;
2648 anar |= ADVERTISE_10HALF | ADVERTISE_10FULL;
2649 } else if (speed == SPEED_100) {
2650 bmcr = BMCR_SPEED100;
2651 anar |= ADVERTISE_100HALF | ADVERTISE_100FULL;
hayeswang43779f82014-01-02 11:25:10 +08002652 } else if (speed == SPEED_1000 && tp->mii.supports_gmii) {
2653 bmcr = BMCR_SPEED1000;
2654 gbcr |= ADVERTISE_1000FULL | ADVERTISE_1000HALF;
hayeswangac718b62013-05-02 16:01:25 +00002655 } else {
2656 ret = -EINVAL;
2657 goto out;
2658 }
2659
2660 if (duplex == DUPLEX_FULL)
2661 bmcr |= BMCR_FULLDPLX;
2662 } else {
2663 if (speed == SPEED_10) {
2664 if (duplex == DUPLEX_FULL)
2665 anar |= ADVERTISE_10HALF | ADVERTISE_10FULL;
2666 else
2667 anar |= ADVERTISE_10HALF;
2668 } else if (speed == SPEED_100) {
2669 if (duplex == DUPLEX_FULL) {
2670 anar |= ADVERTISE_10HALF | ADVERTISE_10FULL;
2671 anar |= ADVERTISE_100HALF | ADVERTISE_100FULL;
2672 } else {
2673 anar |= ADVERTISE_10HALF;
2674 anar |= ADVERTISE_100HALF;
2675 }
hayeswang43779f82014-01-02 11:25:10 +08002676 } else if (speed == SPEED_1000 && tp->mii.supports_gmii) {
2677 if (duplex == DUPLEX_FULL) {
2678 anar |= ADVERTISE_10HALF | ADVERTISE_10FULL;
2679 anar |= ADVERTISE_100HALF | ADVERTISE_100FULL;
2680 gbcr |= ADVERTISE_1000FULL | ADVERTISE_1000HALF;
2681 } else {
2682 anar |= ADVERTISE_10HALF;
2683 anar |= ADVERTISE_100HALF;
2684 gbcr |= ADVERTISE_1000HALF;
2685 }
hayeswangac718b62013-05-02 16:01:25 +00002686 } else {
2687 ret = -EINVAL;
2688 goto out;
2689 }
2690
2691 bmcr = BMCR_ANENABLE | BMCR_ANRESTART;
2692 }
2693
hayeswangaa66a5f2014-02-18 21:49:04 +08002694 if (test_bit(PHY_RESET, &tp->flags))
2695 bmcr |= BMCR_RESET;
2696
hayeswang43779f82014-01-02 11:25:10 +08002697 if (tp->mii.supports_gmii)
2698 r8152_mdio_write(tp, MII_CTRL1000, gbcr);
2699
hayeswangac718b62013-05-02 16:01:25 +00002700 r8152_mdio_write(tp, MII_ADVERTISE, anar);
2701 r8152_mdio_write(tp, MII_BMCR, bmcr);
2702
hayeswangaa66a5f2014-02-18 21:49:04 +08002703 if (test_bit(PHY_RESET, &tp->flags)) {
2704 int i;
2705
2706 clear_bit(PHY_RESET, &tp->flags);
2707 for (i = 0; i < 50; i++) {
2708 msleep(20);
2709 if ((r8152_mdio_read(tp, MII_BMCR) & BMCR_RESET) == 0)
2710 break;
2711 }
2712 }
2713
hayeswangac718b62013-05-02 16:01:25 +00002714out:
hayeswangac718b62013-05-02 16:01:25 +00002715
2716 return ret;
2717}
2718
hayeswangd70b1132014-09-19 15:17:18 +08002719static void rtl8152_up(struct r8152 *tp)
2720{
2721 if (test_bit(RTL8152_UNPLUG, &tp->flags))
2722 return;
2723
2724 r8152b_disable_aldps(tp);
2725 r8152b_exit_oob(tp);
2726 r8152b_enable_aldps(tp);
2727}
2728
hayeswangac718b62013-05-02 16:01:25 +00002729static void rtl8152_down(struct r8152 *tp)
2730{
hayeswang68714382014-04-11 17:54:31 +08002731 if (test_bit(RTL8152_UNPLUG, &tp->flags)) {
2732 rtl_drop_queued_tx(tp);
2733 return;
2734 }
2735
hayeswang00a5e362014-02-18 21:48:59 +08002736 r8152_power_cut_en(tp, false);
hayeswangac718b62013-05-02 16:01:25 +00002737 r8152b_disable_aldps(tp);
2738 r8152b_enter_oob(tp);
2739 r8152b_enable_aldps(tp);
2740}
2741
hayeswangd70b1132014-09-19 15:17:18 +08002742static void rtl8153_up(struct r8152 *tp)
2743{
2744 if (test_bit(RTL8152_UNPLUG, &tp->flags))
2745 return;
2746
2747 r8153_disable_aldps(tp);
2748 r8153_first_init(tp);
2749 r8153_enable_aldps(tp);
2750}
2751
hayeswang43779f82014-01-02 11:25:10 +08002752static void rtl8153_down(struct r8152 *tp)
2753{
hayeswang68714382014-04-11 17:54:31 +08002754 if (test_bit(RTL8152_UNPLUG, &tp->flags)) {
2755 rtl_drop_queued_tx(tp);
2756 return;
2757 }
2758
hayeswangb9702722014-02-18 21:49:00 +08002759 r8153_u1u2en(tp, false);
2760 r8153_power_cut_en(tp, false);
hayeswang43779f82014-01-02 11:25:10 +08002761 r8153_disable_aldps(tp);
2762 r8153_enter_oob(tp);
2763 r8153_enable_aldps(tp);
2764}
2765
hayeswangac718b62013-05-02 16:01:25 +00002766static void set_carrier(struct r8152 *tp)
2767{
2768 struct net_device *netdev = tp->netdev;
2769 u8 speed;
2770
hayeswang40a82912013-08-14 20:54:40 +08002771 clear_bit(RTL8152_LINK_CHG, &tp->flags);
hayeswangac718b62013-05-02 16:01:25 +00002772 speed = rtl8152_get_speed(tp);
2773
2774 if (speed & LINK_STATUS) {
2775 if (!(tp->speed & LINK_STATUS)) {
hayeswangc81229c2014-01-02 11:22:42 +08002776 tp->rtl_ops.enable(tp);
hayeswangac718b62013-05-02 16:01:25 +00002777 set_bit(RTL8152_SET_RX_MODE, &tp->flags);
2778 netif_carrier_on(netdev);
2779 }
2780 } else {
2781 if (tp->speed & LINK_STATUS) {
2782 netif_carrier_off(netdev);
hayeswangebc2ec482013-08-14 20:54:38 +08002783 tasklet_disable(&tp->tl);
hayeswangc81229c2014-01-02 11:22:42 +08002784 tp->rtl_ops.disable(tp);
hayeswangebc2ec482013-08-14 20:54:38 +08002785 tasklet_enable(&tp->tl);
hayeswangac718b62013-05-02 16:01:25 +00002786 }
2787 }
2788 tp->speed = speed;
2789}
2790
2791static void rtl_work_func_t(struct work_struct *work)
2792{
2793 struct r8152 *tp = container_of(work, struct r8152, schedule.work);
2794
hayeswang9a4be1b2014-02-18 21:49:07 +08002795 if (usb_autopm_get_interface(tp->intf) < 0)
2796 return;
2797
hayeswangac718b62013-05-02 16:01:25 +00002798 if (!test_bit(WORK_ENABLE, &tp->flags))
2799 goto out1;
2800
2801 if (test_bit(RTL8152_UNPLUG, &tp->flags))
2802 goto out1;
2803
hayeswang40a82912013-08-14 20:54:40 +08002804 if (test_bit(RTL8152_LINK_CHG, &tp->flags))
2805 set_carrier(tp);
hayeswangac718b62013-05-02 16:01:25 +00002806
2807 if (test_bit(RTL8152_SET_RX_MODE, &tp->flags))
2808 _rtl8152_set_rx_mode(tp->netdev);
2809
hayeswang0c3121f2014-03-07 11:04:36 +08002810 if (test_bit(SCHEDULE_TASKLET, &tp->flags) &&
2811 (tp->speed & LINK_STATUS)) {
2812 clear_bit(SCHEDULE_TASKLET, &tp->flags);
2813 tasklet_schedule(&tp->tl);
2814 }
hayeswangaa66a5f2014-02-18 21:49:04 +08002815
2816 if (test_bit(PHY_RESET, &tp->flags))
2817 rtl_phy_reset(tp);
2818
hayeswangac718b62013-05-02 16:01:25 +00002819out1:
hayeswang9a4be1b2014-02-18 21:49:07 +08002820 usb_autopm_put_interface(tp->intf);
hayeswangac718b62013-05-02 16:01:25 +00002821}
2822
2823static int rtl8152_open(struct net_device *netdev)
2824{
2825 struct r8152 *tp = netdev_priv(netdev);
2826 int res = 0;
2827
hayeswang7e9da482014-02-18 21:49:05 +08002828 res = alloc_all_mem(tp);
2829 if (res)
2830 goto out;
2831
hayeswang9a4be1b2014-02-18 21:49:07 +08002832 res = usb_autopm_get_interface(tp->intf);
2833 if (res < 0) {
2834 free_all_mem(tp);
2835 goto out;
2836 }
2837
2838 /* The WORK_ENABLE may be set when autoresume occurs */
2839 if (test_bit(WORK_ENABLE, &tp->flags)) {
2840 clear_bit(WORK_ENABLE, &tp->flags);
2841 usb_kill_urb(tp->intr_urb);
2842 cancel_delayed_work_sync(&tp->schedule);
2843 if (tp->speed & LINK_STATUS)
2844 tp->rtl_ops.disable(tp);
2845 }
2846
hayeswang7e9da482014-02-18 21:49:05 +08002847 tp->rtl_ops.up(tp);
2848
hayeswang43779f82014-01-02 11:25:10 +08002849 rtl8152_set_speed(tp, AUTONEG_ENABLE,
2850 tp->mii.supports_gmii ? SPEED_1000 : SPEED_100,
2851 DUPLEX_FULL);
hayeswang40a82912013-08-14 20:54:40 +08002852 tp->speed = 0;
2853 netif_carrier_off(netdev);
hayeswangac718b62013-05-02 16:01:25 +00002854 netif_start_queue(netdev);
2855 set_bit(WORK_ENABLE, &tp->flags);
hayeswangdb8515e2014-03-06 15:07:16 +08002856
hayeswang3d55f442014-02-06 11:55:48 +08002857 res = usb_submit_urb(tp->intr_urb, GFP_KERNEL);
2858 if (res) {
2859 if (res == -ENODEV)
2860 netif_device_detach(tp->netdev);
2861 netif_warn(tp, ifup, netdev, "intr_urb submit failed: %d\n",
2862 res);
hayeswang7e9da482014-02-18 21:49:05 +08002863 free_all_mem(tp);
hayeswang3d55f442014-02-06 11:55:48 +08002864 }
2865
hayeswang9a4be1b2014-02-18 21:49:07 +08002866 usb_autopm_put_interface(tp->intf);
hayeswangac718b62013-05-02 16:01:25 +00002867
hayeswang7e9da482014-02-18 21:49:05 +08002868out:
hayeswangac718b62013-05-02 16:01:25 +00002869 return res;
2870}
2871
2872static int rtl8152_close(struct net_device *netdev)
2873{
2874 struct r8152 *tp = netdev_priv(netdev);
2875 int res = 0;
2876
2877 clear_bit(WORK_ENABLE, &tp->flags);
hayeswang3d55f442014-02-06 11:55:48 +08002878 usb_kill_urb(tp->intr_urb);
hayeswangac718b62013-05-02 16:01:25 +00002879 cancel_delayed_work_sync(&tp->schedule);
2880 netif_stop_queue(netdev);
hayeswang9a4be1b2014-02-18 21:49:07 +08002881
2882 res = usb_autopm_get_interface(tp->intf);
2883 if (res < 0) {
2884 rtl_drop_queued_tx(tp);
2885 } else {
2886 /*
2887 * The autosuspend may have been enabled and wouldn't
2888 * be disable when autoresume occurs, because the
2889 * netif_running() would be false.
2890 */
2891 if (test_bit(SELECTIVE_SUSPEND, &tp->flags)) {
2892 rtl_runtime_suspend_enable(tp, false);
2893 clear_bit(SELECTIVE_SUSPEND, &tp->flags);
2894 }
2895
2896 tasklet_disable(&tp->tl);
2897 tp->rtl_ops.down(tp);
2898 tasklet_enable(&tp->tl);
2899 usb_autopm_put_interface(tp->intf);
2900 }
hayeswangac718b62013-05-02 16:01:25 +00002901
hayeswang7e9da482014-02-18 21:49:05 +08002902 free_all_mem(tp);
2903
hayeswangac718b62013-05-02 16:01:25 +00002904 return res;
2905}
2906
hayeswangac718b62013-05-02 16:01:25 +00002907static void r8152b_enable_eee(struct r8152 *tp)
2908{
hayeswang45f4a192014-01-06 17:08:41 +08002909 u32 ocp_data;
hayeswangac718b62013-05-02 16:01:25 +00002910
2911 ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_EEE_CR);
2912 ocp_data |= EEE_RX_EN | EEE_TX_EN;
2913 ocp_write_word(tp, MCU_TYPE_PLA, PLA_EEE_CR, ocp_data);
2914 ocp_reg_write(tp, OCP_EEE_CONFIG1, RG_TXLPI_MSK_HFDUP | RG_MATCLR_EN |
2915 EEE_10_CAP | EEE_NWAY_EN |
2916 TX_QUIET_EN | RX_QUIET_EN |
2917 SDRISETIME | RG_RXLPI_MSK_HFDUP |
2918 SDFALLTIME);
2919 ocp_reg_write(tp, OCP_EEE_CONFIG2, RG_LPIHYS_NUM | RG_DACQUIET_EN |
2920 RG_LDVQUIET_EN | RG_CKRSEL |
2921 RG_EEEPRG_EN);
2922 ocp_reg_write(tp, OCP_EEE_CONFIG3, FST_SNR_EYE_R | RG_LFS_SEL | MSK_PH);
2923 ocp_reg_write(tp, OCP_EEE_AR, FUN_ADDR | DEVICE_ADDR);
2924 ocp_reg_write(tp, OCP_EEE_DATA, EEE_ADDR);
2925 ocp_reg_write(tp, OCP_EEE_AR, FUN_DATA | DEVICE_ADDR);
2926 ocp_reg_write(tp, OCP_EEE_DATA, EEE_DATA);
2927 ocp_reg_write(tp, OCP_EEE_AR, 0x0000);
2928}
2929
hayeswang43779f82014-01-02 11:25:10 +08002930static void r8153_enable_eee(struct r8152 *tp)
2931{
2932 u32 ocp_data;
2933 u16 data;
2934
2935 ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_EEE_CR);
2936 ocp_data |= EEE_RX_EN | EEE_TX_EN;
2937 ocp_write_word(tp, MCU_TYPE_PLA, PLA_EEE_CR, ocp_data);
2938 data = ocp_reg_read(tp, OCP_EEE_CFG);
2939 data |= EEE10_EN;
2940 ocp_reg_write(tp, OCP_EEE_CFG, data);
2941 data = ocp_reg_read(tp, OCP_EEE_CFG2);
2942 data |= MY1000_EEE | MY100_EEE;
2943 ocp_reg_write(tp, OCP_EEE_CFG2, data);
2944}
2945
hayeswangac718b62013-05-02 16:01:25 +00002946static void r8152b_enable_fc(struct r8152 *tp)
2947{
2948 u16 anar;
2949
2950 anar = r8152_mdio_read(tp, MII_ADVERTISE);
2951 anar |= ADVERTISE_PAUSE_CAP | ADVERTISE_PAUSE_ASYM;
2952 r8152_mdio_write(tp, MII_ADVERTISE, anar);
2953}
2954
hayeswang4f1d4d52014-03-11 16:24:19 +08002955static void rtl_tally_reset(struct r8152 *tp)
2956{
2957 u32 ocp_data;
2958
2959 ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_RSTTALLY);
2960 ocp_data |= TALLY_RESET;
2961 ocp_write_word(tp, MCU_TYPE_PLA, PLA_RSTTALLY, ocp_data);
2962}
2963
hayeswangac718b62013-05-02 16:01:25 +00002964static void r8152b_init(struct r8152 *tp)
2965{
hayeswangebc2ec482013-08-14 20:54:38 +08002966 u32 ocp_data;
hayeswangac718b62013-05-02 16:01:25 +00002967
hayeswang68714382014-04-11 17:54:31 +08002968 if (test_bit(RTL8152_UNPLUG, &tp->flags))
2969 return;
2970
hayeswangd70b1132014-09-19 15:17:18 +08002971 r8152b_disable_aldps(tp);
2972
hayeswangac718b62013-05-02 16:01:25 +00002973 if (tp->version == RTL_VER_01) {
2974 ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_LED_FEATURE);
2975 ocp_data &= ~LED_MODE_MASK;
2976 ocp_write_word(tp, MCU_TYPE_PLA, PLA_LED_FEATURE, ocp_data);
2977 }
2978
hayeswang00a5e362014-02-18 21:48:59 +08002979 r8152_power_cut_en(tp, false);
hayeswangac718b62013-05-02 16:01:25 +00002980
hayeswangac718b62013-05-02 16:01:25 +00002981 ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_PHY_PWR);
2982 ocp_data |= TX_10M_IDLE_EN | PFM_PWM_SWITCH;
2983 ocp_write_word(tp, MCU_TYPE_PLA, PLA_PHY_PWR, ocp_data);
2984 ocp_data = ocp_read_dword(tp, MCU_TYPE_PLA, PLA_MAC_PWR_CTRL);
2985 ocp_data &= ~MCU_CLK_RATIO_MASK;
2986 ocp_data |= MCU_CLK_RATIO | D3_CLK_GATED_EN;
2987 ocp_write_dword(tp, MCU_TYPE_PLA, PLA_MAC_PWR_CTRL, ocp_data);
2988 ocp_data = GPHY_STS_MSK | SPEED_DOWN_MSK |
2989 SPDWN_RXDV_MSK | SPDWN_LINKCHG_MSK;
2990 ocp_write_word(tp, MCU_TYPE_PLA, PLA_GPHY_INTR_IMR, ocp_data);
2991
2992 r8152b_enable_eee(tp);
2993 r8152b_enable_aldps(tp);
2994 r8152b_enable_fc(tp);
hayeswang4f1d4d52014-03-11 16:24:19 +08002995 rtl_tally_reset(tp);
hayeswangac718b62013-05-02 16:01:25 +00002996
hayeswangebc2ec482013-08-14 20:54:38 +08002997 /* enable rx aggregation */
hayeswangac718b62013-05-02 16:01:25 +00002998 ocp_data = ocp_read_word(tp, MCU_TYPE_USB, USB_USB_CTRL);
hayeswangebc2ec482013-08-14 20:54:38 +08002999 ocp_data &= ~RX_AGG_DISABLE;
hayeswangac718b62013-05-02 16:01:25 +00003000 ocp_write_word(tp, MCU_TYPE_USB, USB_USB_CTRL, ocp_data);
3001}
3002
hayeswang43779f82014-01-02 11:25:10 +08003003static void r8153_init(struct r8152 *tp)
3004{
3005 u32 ocp_data;
3006 int i;
3007
hayeswang68714382014-04-11 17:54:31 +08003008 if (test_bit(RTL8152_UNPLUG, &tp->flags))
3009 return;
3010
hayeswangd70b1132014-09-19 15:17:18 +08003011 r8153_disable_aldps(tp);
hayeswangb9702722014-02-18 21:49:00 +08003012 r8153_u1u2en(tp, false);
hayeswang43779f82014-01-02 11:25:10 +08003013
3014 for (i = 0; i < 500; i++) {
3015 if (ocp_read_word(tp, MCU_TYPE_PLA, PLA_BOOT_CTRL) &
3016 AUTOLOAD_DONE)
3017 break;
3018 msleep(20);
3019 }
3020
3021 for (i = 0; i < 500; i++) {
3022 ocp_data = ocp_reg_read(tp, OCP_PHY_STATUS) & PHY_STAT_MASK;
3023 if (ocp_data == PHY_STAT_LAN_ON || ocp_data == PHY_STAT_PWRDN)
3024 break;
3025 msleep(20);
3026 }
3027
hayeswangb9702722014-02-18 21:49:00 +08003028 r8153_u2p3en(tp, false);
hayeswang43779f82014-01-02 11:25:10 +08003029
3030 ocp_data = ocp_read_word(tp, MCU_TYPE_USB, USB_WDT11_CTRL);
3031 ocp_data &= ~TIMER11_EN;
3032 ocp_write_word(tp, MCU_TYPE_USB, USB_WDT11_CTRL, ocp_data);
3033
hayeswang43779f82014-01-02 11:25:10 +08003034 ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_LED_FEATURE);
3035 ocp_data &= ~LED_MODE_MASK;
3036 ocp_write_word(tp, MCU_TYPE_PLA, PLA_LED_FEATURE, ocp_data);
3037
3038 ocp_data = ocp_read_byte(tp, MCU_TYPE_USB, USB_LPM_CTRL);
3039 ocp_data &= ~LPM_TIMER_MASK;
3040 if (tp->udev->speed == USB_SPEED_SUPER)
3041 ocp_data |= LPM_TIMER_500US;
3042 else
3043 ocp_data |= LPM_TIMER_500MS;
3044 ocp_write_byte(tp, MCU_TYPE_USB, USB_LPM_CTRL, ocp_data);
3045
3046 ocp_data = ocp_read_word(tp, MCU_TYPE_USB, USB_AFE_CTRL2);
3047 ocp_data &= ~SEN_VAL_MASK;
3048 ocp_data |= SEN_VAL_NORMAL | SEL_RXIDLE;
3049 ocp_write_word(tp, MCU_TYPE_USB, USB_AFE_CTRL2, ocp_data);
3050
hayeswangb9702722014-02-18 21:49:00 +08003051 r8153_power_cut_en(tp, false);
3052 r8153_u1u2en(tp, true);
hayeswang43779f82014-01-02 11:25:10 +08003053
hayeswang43779f82014-01-02 11:25:10 +08003054 ocp_write_word(tp, MCU_TYPE_PLA, PLA_MAC_PWR_CTRL, ALDPS_SPDWN_RATIO);
3055 ocp_write_word(tp, MCU_TYPE_PLA, PLA_MAC_PWR_CTRL2, EEE_SPDWN_RATIO);
3056 ocp_write_word(tp, MCU_TYPE_PLA, PLA_MAC_PWR_CTRL3,
3057 PKT_AVAIL_SPDWN_EN | SUSPEND_SPDWN_EN |
3058 U1U2_SPDWN_EN | L1_SPDWN_EN);
3059 ocp_write_word(tp, MCU_TYPE_PLA, PLA_MAC_PWR_CTRL4,
3060 PWRSAVE_SPDWN_EN | RXDV_SPDWN_EN | TX10MIDLE_EN |
3061 TP100_SPDWN_EN | TP500_SPDWN_EN | TP1000_SPDWN_EN |
3062 EEE_SPDWN_EN);
3063
3064 r8153_enable_eee(tp);
3065 r8153_enable_aldps(tp);
3066 r8152b_enable_fc(tp);
hayeswang4f1d4d52014-03-11 16:24:19 +08003067 rtl_tally_reset(tp);
hayeswang43779f82014-01-02 11:25:10 +08003068}
3069
hayeswangac718b62013-05-02 16:01:25 +00003070static int rtl8152_suspend(struct usb_interface *intf, pm_message_t message)
3071{
3072 struct r8152 *tp = usb_get_intfdata(intf);
3073
hayeswang9a4be1b2014-02-18 21:49:07 +08003074 if (PMSG_IS_AUTO(message))
3075 set_bit(SELECTIVE_SUSPEND, &tp->flags);
3076 else
3077 netif_device_detach(tp->netdev);
hayeswangac718b62013-05-02 16:01:25 +00003078
3079 if (netif_running(tp->netdev)) {
3080 clear_bit(WORK_ENABLE, &tp->flags);
hayeswang40a82912013-08-14 20:54:40 +08003081 usb_kill_urb(tp->intr_urb);
hayeswangac718b62013-05-02 16:01:25 +00003082 cancel_delayed_work_sync(&tp->schedule);
hayeswang445f7f42014-09-23 16:31:47 +08003083 tasklet_disable(&tp->tl);
hayeswang9a4be1b2014-02-18 21:49:07 +08003084 if (test_bit(SELECTIVE_SUSPEND, &tp->flags)) {
hayeswang445f7f42014-09-23 16:31:47 +08003085 rtl_stop_rx(tp);
hayeswang9a4be1b2014-02-18 21:49:07 +08003086 rtl_runtime_suspend_enable(tp, true);
3087 } else {
hayeswang9a4be1b2014-02-18 21:49:07 +08003088 tp->rtl_ops.down(tp);
hayeswang9a4be1b2014-02-18 21:49:07 +08003089 }
hayeswang445f7f42014-09-23 16:31:47 +08003090 tasklet_enable(&tp->tl);
hayeswangac718b62013-05-02 16:01:25 +00003091 }
3092
hayeswangac718b62013-05-02 16:01:25 +00003093 return 0;
3094}
3095
3096static int rtl8152_resume(struct usb_interface *intf)
3097{
3098 struct r8152 *tp = usb_get_intfdata(intf);
3099
hayeswang9a4be1b2014-02-18 21:49:07 +08003100 if (!test_bit(SELECTIVE_SUSPEND, &tp->flags)) {
3101 tp->rtl_ops.init(tp);
3102 netif_device_attach(tp->netdev);
3103 }
3104
hayeswangac718b62013-05-02 16:01:25 +00003105 if (netif_running(tp->netdev)) {
hayeswang9a4be1b2014-02-18 21:49:07 +08003106 if (test_bit(SELECTIVE_SUSPEND, &tp->flags)) {
3107 rtl_runtime_suspend_enable(tp, false);
3108 clear_bit(SELECTIVE_SUSPEND, &tp->flags);
hayeswang445f7f42014-09-23 16:31:47 +08003109 set_bit(WORK_ENABLE, &tp->flags);
hayeswang9a4be1b2014-02-18 21:49:07 +08003110 if (tp->speed & LINK_STATUS)
hayeswang445f7f42014-09-23 16:31:47 +08003111 rtl_start_rx(tp);
hayeswang9a4be1b2014-02-18 21:49:07 +08003112 } else {
3113 tp->rtl_ops.up(tp);
3114 rtl8152_set_speed(tp, AUTONEG_ENABLE,
hayeswang43779f82014-01-02 11:25:10 +08003115 tp->mii.supports_gmii ? SPEED_1000 : SPEED_100,
3116 DUPLEX_FULL);
hayeswang445f7f42014-09-23 16:31:47 +08003117 tp->speed = 0;
3118 netif_carrier_off(tp->netdev);
3119 set_bit(WORK_ENABLE, &tp->flags);
hayeswang9a4be1b2014-02-18 21:49:07 +08003120 }
hayeswang40a82912013-08-14 20:54:40 +08003121 usb_submit_urb(tp->intr_urb, GFP_KERNEL);
hayeswangac718b62013-05-02 16:01:25 +00003122 }
3123
3124 return 0;
3125}
3126
hayeswang21ff2e82014-02-18 21:49:06 +08003127static void rtl8152_get_wol(struct net_device *dev, struct ethtool_wolinfo *wol)
3128{
3129 struct r8152 *tp = netdev_priv(dev);
3130
hayeswang9a4be1b2014-02-18 21:49:07 +08003131 if (usb_autopm_get_interface(tp->intf) < 0)
3132 return;
3133
hayeswang21ff2e82014-02-18 21:49:06 +08003134 wol->supported = WAKE_ANY;
3135 wol->wolopts = __rtl_get_wol(tp);
hayeswang9a4be1b2014-02-18 21:49:07 +08003136
3137 usb_autopm_put_interface(tp->intf);
hayeswang21ff2e82014-02-18 21:49:06 +08003138}
3139
3140static int rtl8152_set_wol(struct net_device *dev, struct ethtool_wolinfo *wol)
3141{
3142 struct r8152 *tp = netdev_priv(dev);
hayeswang9a4be1b2014-02-18 21:49:07 +08003143 int ret;
3144
3145 ret = usb_autopm_get_interface(tp->intf);
3146 if (ret < 0)
3147 goto out_set_wol;
hayeswang21ff2e82014-02-18 21:49:06 +08003148
3149 __rtl_set_wol(tp, wol->wolopts);
3150 tp->saved_wolopts = wol->wolopts & WAKE_ANY;
3151
hayeswang9a4be1b2014-02-18 21:49:07 +08003152 usb_autopm_put_interface(tp->intf);
3153
3154out_set_wol:
3155 return ret;
hayeswang21ff2e82014-02-18 21:49:06 +08003156}
3157
hayeswanga5ec27c2014-02-18 21:49:11 +08003158static u32 rtl8152_get_msglevel(struct net_device *dev)
3159{
3160 struct r8152 *tp = netdev_priv(dev);
3161
3162 return tp->msg_enable;
3163}
3164
3165static void rtl8152_set_msglevel(struct net_device *dev, u32 value)
3166{
3167 struct r8152 *tp = netdev_priv(dev);
3168
3169 tp->msg_enable = value;
3170}
3171
hayeswangac718b62013-05-02 16:01:25 +00003172static void rtl8152_get_drvinfo(struct net_device *netdev,
3173 struct ethtool_drvinfo *info)
3174{
3175 struct r8152 *tp = netdev_priv(netdev);
3176
3177 strncpy(info->driver, MODULENAME, ETHTOOL_BUSINFO_LEN);
3178 strncpy(info->version, DRIVER_VERSION, ETHTOOL_BUSINFO_LEN);
3179 usb_make_path(tp->udev, info->bus_info, sizeof(info->bus_info));
3180}
3181
3182static
3183int rtl8152_get_settings(struct net_device *netdev, struct ethtool_cmd *cmd)
3184{
3185 struct r8152 *tp = netdev_priv(netdev);
3186
3187 if (!tp->mii.mdio_read)
3188 return -EOPNOTSUPP;
3189
3190 return mii_ethtool_gset(&tp->mii, cmd);
3191}
3192
3193static int rtl8152_set_settings(struct net_device *dev, struct ethtool_cmd *cmd)
3194{
3195 struct r8152 *tp = netdev_priv(dev);
hayeswang9a4be1b2014-02-18 21:49:07 +08003196 int ret;
hayeswangac718b62013-05-02 16:01:25 +00003197
hayeswang9a4be1b2014-02-18 21:49:07 +08003198 ret = usb_autopm_get_interface(tp->intf);
3199 if (ret < 0)
3200 goto out;
3201
3202 ret = rtl8152_set_speed(tp, cmd->autoneg, cmd->speed, cmd->duplex);
3203
3204 usb_autopm_put_interface(tp->intf);
3205
3206out:
3207 return ret;
hayeswangac718b62013-05-02 16:01:25 +00003208}
3209
hayeswang4f1d4d52014-03-11 16:24:19 +08003210static const char rtl8152_gstrings[][ETH_GSTRING_LEN] = {
3211 "tx_packets",
3212 "rx_packets",
3213 "tx_errors",
3214 "rx_errors",
3215 "rx_missed",
3216 "align_errors",
3217 "tx_single_collisions",
3218 "tx_multi_collisions",
3219 "rx_unicast",
3220 "rx_broadcast",
3221 "rx_multicast",
3222 "tx_aborted",
3223 "tx_underrun",
3224};
3225
3226static int rtl8152_get_sset_count(struct net_device *dev, int sset)
3227{
3228 switch (sset) {
3229 case ETH_SS_STATS:
3230 return ARRAY_SIZE(rtl8152_gstrings);
3231 default:
3232 return -EOPNOTSUPP;
3233 }
3234}
3235
3236static void rtl8152_get_ethtool_stats(struct net_device *dev,
3237 struct ethtool_stats *stats, u64 *data)
3238{
3239 struct r8152 *tp = netdev_priv(dev);
3240 struct tally_counter tally;
3241
hayeswang0b030242014-07-08 14:49:28 +08003242 if (usb_autopm_get_interface(tp->intf) < 0)
3243 return;
3244
hayeswang4f1d4d52014-03-11 16:24:19 +08003245 generic_ocp_read(tp, PLA_TALLYCNT, sizeof(tally), &tally, MCU_TYPE_PLA);
3246
hayeswang0b030242014-07-08 14:49:28 +08003247 usb_autopm_put_interface(tp->intf);
3248
hayeswang4f1d4d52014-03-11 16:24:19 +08003249 data[0] = le64_to_cpu(tally.tx_packets);
3250 data[1] = le64_to_cpu(tally.rx_packets);
3251 data[2] = le64_to_cpu(tally.tx_errors);
3252 data[3] = le32_to_cpu(tally.rx_errors);
3253 data[4] = le16_to_cpu(tally.rx_missed);
3254 data[5] = le16_to_cpu(tally.align_errors);
3255 data[6] = le32_to_cpu(tally.tx_one_collision);
3256 data[7] = le32_to_cpu(tally.tx_multi_collision);
3257 data[8] = le64_to_cpu(tally.rx_unicast);
3258 data[9] = le64_to_cpu(tally.rx_broadcast);
3259 data[10] = le32_to_cpu(tally.rx_multicast);
3260 data[11] = le16_to_cpu(tally.tx_aborted);
3261 data[12] = le16_to_cpu(tally.tx_underun);
3262}
3263
3264static void rtl8152_get_strings(struct net_device *dev, u32 stringset, u8 *data)
3265{
3266 switch (stringset) {
3267 case ETH_SS_STATS:
3268 memcpy(data, *rtl8152_gstrings, sizeof(rtl8152_gstrings));
3269 break;
3270 }
3271}
3272
hayeswangac718b62013-05-02 16:01:25 +00003273static struct ethtool_ops ops = {
3274 .get_drvinfo = rtl8152_get_drvinfo,
3275 .get_settings = rtl8152_get_settings,
3276 .set_settings = rtl8152_set_settings,
3277 .get_link = ethtool_op_get_link,
hayeswanga5ec27c2014-02-18 21:49:11 +08003278 .get_msglevel = rtl8152_get_msglevel,
3279 .set_msglevel = rtl8152_set_msglevel,
hayeswang21ff2e82014-02-18 21:49:06 +08003280 .get_wol = rtl8152_get_wol,
3281 .set_wol = rtl8152_set_wol,
hayeswang4f1d4d52014-03-11 16:24:19 +08003282 .get_strings = rtl8152_get_strings,
3283 .get_sset_count = rtl8152_get_sset_count,
3284 .get_ethtool_stats = rtl8152_get_ethtool_stats,
hayeswangac718b62013-05-02 16:01:25 +00003285};
3286
3287static int rtl8152_ioctl(struct net_device *netdev, struct ifreq *rq, int cmd)
3288{
3289 struct r8152 *tp = netdev_priv(netdev);
3290 struct mii_ioctl_data *data = if_mii(rq);
hayeswang9a4be1b2014-02-18 21:49:07 +08003291 int res;
3292
hayeswang68714382014-04-11 17:54:31 +08003293 if (test_bit(RTL8152_UNPLUG, &tp->flags))
3294 return -ENODEV;
3295
hayeswang9a4be1b2014-02-18 21:49:07 +08003296 res = usb_autopm_get_interface(tp->intf);
3297 if (res < 0)
3298 goto out;
hayeswangac718b62013-05-02 16:01:25 +00003299
3300 switch (cmd) {
3301 case SIOCGMIIPHY:
3302 data->phy_id = R8152_PHY_ID; /* Internal PHY */
3303 break;
3304
3305 case SIOCGMIIREG:
3306 data->val_out = r8152_mdio_read(tp, data->reg_num);
3307 break;
3308
3309 case SIOCSMIIREG:
3310 if (!capable(CAP_NET_ADMIN)) {
3311 res = -EPERM;
3312 break;
3313 }
3314 r8152_mdio_write(tp, data->reg_num, data->val_in);
3315 break;
3316
3317 default:
3318 res = -EOPNOTSUPP;
3319 }
3320
hayeswang9a4be1b2014-02-18 21:49:07 +08003321 usb_autopm_put_interface(tp->intf);
3322
3323out:
hayeswangac718b62013-05-02 16:01:25 +00003324 return res;
3325}
3326
hayeswang69b4b7a2014-07-10 10:58:54 +08003327static int rtl8152_change_mtu(struct net_device *dev, int new_mtu)
3328{
3329 struct r8152 *tp = netdev_priv(dev);
3330
3331 switch (tp->version) {
3332 case RTL_VER_01:
3333 case RTL_VER_02:
3334 return eth_change_mtu(dev, new_mtu);
3335 default:
3336 break;
3337 }
3338
3339 if (new_mtu < 68 || new_mtu > RTL8153_MAX_MTU)
3340 return -EINVAL;
3341
3342 dev->mtu = new_mtu;
3343
3344 return 0;
3345}
3346
hayeswangac718b62013-05-02 16:01:25 +00003347static const struct net_device_ops rtl8152_netdev_ops = {
3348 .ndo_open = rtl8152_open,
3349 .ndo_stop = rtl8152_close,
3350 .ndo_do_ioctl = rtl8152_ioctl,
3351 .ndo_start_xmit = rtl8152_start_xmit,
3352 .ndo_tx_timeout = rtl8152_tx_timeout,
3353 .ndo_set_rx_mode = rtl8152_set_rx_mode,
3354 .ndo_set_mac_address = rtl8152_set_mac_address,
hayeswang69b4b7a2014-07-10 10:58:54 +08003355 .ndo_change_mtu = rtl8152_change_mtu,
hayeswangac718b62013-05-02 16:01:25 +00003356 .ndo_validate_addr = eth_validate_addr,
3357};
3358
3359static void r8152b_get_version(struct r8152 *tp)
3360{
3361 u32 ocp_data;
3362 u16 version;
3363
3364 ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_TCR1);
3365 version = (u16)(ocp_data & VERSION_MASK);
3366
3367 switch (version) {
3368 case 0x4c00:
3369 tp->version = RTL_VER_01;
3370 break;
3371 case 0x4c10:
3372 tp->version = RTL_VER_02;
3373 break;
hayeswang43779f82014-01-02 11:25:10 +08003374 case 0x5c00:
3375 tp->version = RTL_VER_03;
3376 tp->mii.supports_gmii = 1;
3377 break;
3378 case 0x5c10:
3379 tp->version = RTL_VER_04;
3380 tp->mii.supports_gmii = 1;
3381 break;
3382 case 0x5c20:
3383 tp->version = RTL_VER_05;
3384 tp->mii.supports_gmii = 1;
3385 break;
hayeswangac718b62013-05-02 16:01:25 +00003386 default:
3387 netif_info(tp, probe, tp->netdev,
3388 "Unknown version 0x%04x\n", version);
3389 break;
3390 }
3391}
3392
hayeswange3fe0b12014-01-02 11:22:39 +08003393static void rtl8152_unload(struct r8152 *tp)
3394{
hayeswang68714382014-04-11 17:54:31 +08003395 if (test_bit(RTL8152_UNPLUG, &tp->flags))
3396 return;
3397
hayeswang00a5e362014-02-18 21:48:59 +08003398 if (tp->version != RTL_VER_01)
3399 r8152_power_cut_en(tp, true);
hayeswange3fe0b12014-01-02 11:22:39 +08003400}
3401
hayeswang43779f82014-01-02 11:25:10 +08003402static void rtl8153_unload(struct r8152 *tp)
3403{
hayeswang68714382014-04-11 17:54:31 +08003404 if (test_bit(RTL8152_UNPLUG, &tp->flags))
3405 return;
3406
hayeswang49be1722014-10-01 13:25:11 +08003407 r8153_power_cut_en(tp, false);
hayeswang43779f82014-01-02 11:25:10 +08003408}
3409
hayeswang31ca1de2014-01-06 17:08:43 +08003410static int rtl_ops_init(struct r8152 *tp, const struct usb_device_id *id)
hayeswangc81229c2014-01-02 11:22:42 +08003411{
3412 struct rtl_ops *ops = &tp->rtl_ops;
hayeswang31ca1de2014-01-06 17:08:43 +08003413 int ret = -ENODEV;
hayeswangc81229c2014-01-02 11:22:42 +08003414
3415 switch (id->idVendor) {
3416 case VENDOR_ID_REALTEK:
3417 switch (id->idProduct) {
3418 case PRODUCT_ID_RTL8152:
3419 ops->init = r8152b_init;
3420 ops->enable = rtl8152_enable;
3421 ops->disable = rtl8152_disable;
hayeswangd70b1132014-09-19 15:17:18 +08003422 ops->up = rtl8152_up;
hayeswangc81229c2014-01-02 11:22:42 +08003423 ops->down = rtl8152_down;
3424 ops->unload = rtl8152_unload;
hayeswang31ca1de2014-01-06 17:08:43 +08003425 ret = 0;
hayeswangc81229c2014-01-02 11:22:42 +08003426 break;
hayeswang43779f82014-01-02 11:25:10 +08003427 case PRODUCT_ID_RTL8153:
3428 ops->init = r8153_init;
3429 ops->enable = rtl8153_enable;
hayeswangd70b1132014-09-19 15:17:18 +08003430 ops->disable = rtl8153_disable;
3431 ops->up = rtl8153_up;
hayeswang43779f82014-01-02 11:25:10 +08003432 ops->down = rtl8153_down;
3433 ops->unload = rtl8153_unload;
hayeswang31ca1de2014-01-06 17:08:43 +08003434 ret = 0;
hayeswang43779f82014-01-02 11:25:10 +08003435 break;
3436 default:
hayeswang43779f82014-01-02 11:25:10 +08003437 break;
3438 }
3439 break;
3440
3441 case VENDOR_ID_SAMSUNG:
3442 switch (id->idProduct) {
3443 case PRODUCT_ID_SAMSUNG:
3444 ops->init = r8153_init;
3445 ops->enable = rtl8153_enable;
hayeswangd70b1132014-09-19 15:17:18 +08003446 ops->disable = rtl8153_disable;
3447 ops->up = rtl8153_up;
hayeswang43779f82014-01-02 11:25:10 +08003448 ops->down = rtl8153_down;
3449 ops->unload = rtl8153_unload;
hayeswang31ca1de2014-01-06 17:08:43 +08003450 ret = 0;
hayeswang43779f82014-01-02 11:25:10 +08003451 break;
hayeswangc81229c2014-01-02 11:22:42 +08003452 default:
hayeswangc81229c2014-01-02 11:22:42 +08003453 break;
3454 }
3455 break;
3456
3457 default:
hayeswangc81229c2014-01-02 11:22:42 +08003458 break;
3459 }
3460
hayeswang31ca1de2014-01-06 17:08:43 +08003461 if (ret)
3462 netif_err(tp, probe, tp->netdev, "Unknown Device\n");
3463
hayeswangc81229c2014-01-02 11:22:42 +08003464 return ret;
3465}
3466
hayeswangac718b62013-05-02 16:01:25 +00003467static int rtl8152_probe(struct usb_interface *intf,
3468 const struct usb_device_id *id)
3469{
3470 struct usb_device *udev = interface_to_usbdev(intf);
3471 struct r8152 *tp;
3472 struct net_device *netdev;
hayeswangebc2ec482013-08-14 20:54:38 +08003473 int ret;
hayeswangac718b62013-05-02 16:01:25 +00003474
hayeswang10c32712014-03-04 20:47:48 +08003475 if (udev->actconfig->desc.bConfigurationValue != 1) {
3476 usb_driver_set_configuration(udev, 1);
3477 return -ENODEV;
3478 }
3479
3480 usb_reset_device(udev);
hayeswangac718b62013-05-02 16:01:25 +00003481 netdev = alloc_etherdev(sizeof(struct r8152));
3482 if (!netdev) {
Hayes Wang4a8deae2014-01-07 11:18:22 +08003483 dev_err(&intf->dev, "Out of memory\n");
hayeswangac718b62013-05-02 16:01:25 +00003484 return -ENOMEM;
3485 }
3486
hayeswangebc2ec482013-08-14 20:54:38 +08003487 SET_NETDEV_DEV(netdev, &intf->dev);
hayeswangac718b62013-05-02 16:01:25 +00003488 tp = netdev_priv(netdev);
3489 tp->msg_enable = 0x7FFF;
3490
hayeswange3ad4122014-01-06 17:08:42 +08003491 tp->udev = udev;
3492 tp->netdev = netdev;
3493 tp->intf = intf;
3494
hayeswang31ca1de2014-01-06 17:08:43 +08003495 ret = rtl_ops_init(tp, id);
3496 if (ret)
3497 goto out;
hayeswangc81229c2014-01-02 11:22:42 +08003498
hayeswangebc2ec482013-08-14 20:54:38 +08003499 tasklet_init(&tp->tl, bottom_half, (unsigned long)tp);
hayeswangac718b62013-05-02 16:01:25 +00003500 INIT_DELAYED_WORK(&tp->schedule, rtl_work_func_t);
3501
hayeswangac718b62013-05-02 16:01:25 +00003502 netdev->netdev_ops = &rtl8152_netdev_ops;
3503 netdev->watchdog_timeo = RTL8152_TX_TIMEOUT;
hayeswang5bd23882013-08-14 20:54:39 +08003504
hayeswang60c89072014-03-07 11:04:39 +08003505 netdev->features |= NETIF_F_RXCSUM | NETIF_F_IP_CSUM | NETIF_F_SG |
hayeswang6128d1bb2014-03-07 11:04:40 +08003506 NETIF_F_TSO | NETIF_F_FRAGLIST | NETIF_F_IPV6_CSUM |
3507 NETIF_F_TSO6;
hayeswang60c89072014-03-07 11:04:39 +08003508 netdev->hw_features = NETIF_F_RXCSUM | NETIF_F_IP_CSUM | NETIF_F_SG |
hayeswang6128d1bb2014-03-07 11:04:40 +08003509 NETIF_F_TSO | NETIF_F_FRAGLIST |
3510 NETIF_F_IPV6_CSUM | NETIF_F_TSO6;
hayeswangdb8515e2014-03-06 15:07:16 +08003511
Wilfried Klaebe7ad24ea2014-05-11 00:12:32 +00003512 netdev->ethtool_ops = &ops;
hayeswang60c89072014-03-07 11:04:39 +08003513 netif_set_gso_max_size(netdev, RTL_LIMITED_TSO_SIZE);
hayeswangac718b62013-05-02 16:01:25 +00003514
3515 tp->mii.dev = netdev;
3516 tp->mii.mdio_read = read_mii_word;
3517 tp->mii.mdio_write = write_mii_word;
3518 tp->mii.phy_id_mask = 0x3f;
3519 tp->mii.reg_num_mask = 0x1f;
3520 tp->mii.phy_id = R8152_PHY_ID;
3521 tp->mii.supports_gmii = 0;
3522
hayeswang9a4be1b2014-02-18 21:49:07 +08003523 intf->needs_remote_wakeup = 1;
3524
hayeswangac718b62013-05-02 16:01:25 +00003525 r8152b_get_version(tp);
hayeswangc81229c2014-01-02 11:22:42 +08003526 tp->rtl_ops.init(tp);
hayeswangac718b62013-05-02 16:01:25 +00003527 set_ethernet_addr(tp);
3528
hayeswangac718b62013-05-02 16:01:25 +00003529 usb_set_intfdata(intf, tp);
hayeswangac718b62013-05-02 16:01:25 +00003530
hayeswangebc2ec482013-08-14 20:54:38 +08003531 ret = register_netdev(netdev);
3532 if (ret != 0) {
Hayes Wang4a8deae2014-01-07 11:18:22 +08003533 netif_err(tp, probe, netdev, "couldn't register the device\n");
hayeswangebc2ec482013-08-14 20:54:38 +08003534 goto out1;
hayeswangac718b62013-05-02 16:01:25 +00003535 }
3536
hayeswang21ff2e82014-02-18 21:49:06 +08003537 tp->saved_wolopts = __rtl_get_wol(tp);
3538 if (tp->saved_wolopts)
3539 device_set_wakeup_enable(&udev->dev, true);
3540 else
3541 device_set_wakeup_enable(&udev->dev, false);
3542
Hayes Wang4a8deae2014-01-07 11:18:22 +08003543 netif_info(tp, probe, netdev, "%s\n", DRIVER_VERSION);
hayeswangac718b62013-05-02 16:01:25 +00003544
3545 return 0;
3546
hayeswangac718b62013-05-02 16:01:25 +00003547out1:
hayeswangebc2ec482013-08-14 20:54:38 +08003548 usb_set_intfdata(intf, NULL);
hayeswangac718b62013-05-02 16:01:25 +00003549out:
3550 free_netdev(netdev);
hayeswangebc2ec482013-08-14 20:54:38 +08003551 return ret;
hayeswangac718b62013-05-02 16:01:25 +00003552}
3553
hayeswangac718b62013-05-02 16:01:25 +00003554static void rtl8152_disconnect(struct usb_interface *intf)
3555{
3556 struct r8152 *tp = usb_get_intfdata(intf);
3557
3558 usb_set_intfdata(intf, NULL);
3559 if (tp) {
hayeswangf561de32014-09-30 16:48:01 +08003560 struct usb_device *udev = tp->udev;
3561
3562 if (udev->state == USB_STATE_NOTATTACHED)
3563 set_bit(RTL8152_UNPLUG, &tp->flags);
3564
hayeswangac718b62013-05-02 16:01:25 +00003565 tasklet_kill(&tp->tl);
3566 unregister_netdev(tp->netdev);
hayeswangc81229c2014-01-02 11:22:42 +08003567 tp->rtl_ops.unload(tp);
hayeswangac718b62013-05-02 16:01:25 +00003568 free_netdev(tp->netdev);
3569 }
3570}
3571
3572/* table of devices that work with this driver */
3573static struct usb_device_id rtl8152_table[] = {
hayeswang10c32712014-03-04 20:47:48 +08003574 {USB_DEVICE(VENDOR_ID_REALTEK, PRODUCT_ID_RTL8152)},
3575 {USB_DEVICE(VENDOR_ID_REALTEK, PRODUCT_ID_RTL8153)},
3576 {USB_DEVICE(VENDOR_ID_SAMSUNG, PRODUCT_ID_SAMSUNG)},
hayeswangac718b62013-05-02 16:01:25 +00003577 {}
3578};
3579
3580MODULE_DEVICE_TABLE(usb, rtl8152_table);
3581
3582static struct usb_driver rtl8152_driver = {
3583 .name = MODULENAME,
hayeswangebc2ec482013-08-14 20:54:38 +08003584 .id_table = rtl8152_table,
hayeswangac718b62013-05-02 16:01:25 +00003585 .probe = rtl8152_probe,
3586 .disconnect = rtl8152_disconnect,
hayeswangac718b62013-05-02 16:01:25 +00003587 .suspend = rtl8152_suspend,
hayeswangebc2ec482013-08-14 20:54:38 +08003588 .resume = rtl8152_resume,
3589 .reset_resume = rtl8152_resume,
hayeswang9a4be1b2014-02-18 21:49:07 +08003590 .supports_autosuspend = 1,
hayeswanga6347822014-02-18 21:49:10 +08003591 .disable_hub_initiated_lpm = 1,
hayeswangac718b62013-05-02 16:01:25 +00003592};
3593
Sachin Kamatb4236daa2013-05-16 17:48:08 +00003594module_usb_driver(rtl8152_driver);
hayeswangac718b62013-05-02 16:01:25 +00003595
3596MODULE_AUTHOR(DRIVER_AUTHOR);
3597MODULE_DESCRIPTION(DRIVER_DESC);
3598MODULE_LICENSE("GPL");