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Xiaohu.Huang83a0b702021-12-28 11:06:24 +08001/*
yang.li5bef2f62022-01-11 14:08:06 +08002 * Copyright (c) 2021-2022 Amlogic, Inc. All rights reserved.
Xiaohu.Huang83a0b702021-12-28 11:06:24 +08003 *
yang.li5bef2f62022-01-11 14:08:06 +08004 * SPDX-License-Identifier: MIT
Xiaohu.Huang83a0b702021-12-28 11:06:24 +08005 */
6
Xiaohu.Huang83a0b702021-12-28 11:06:24 +08007#ifndef __COMMON_H
8#define __COMMON_H
9
10#ifdef __cplusplus
11extern "C" {
12#endif
13#include <stdint.h>
14#include <errno.h>
15
Xiaohu.Huang83a0b702021-12-28 11:06:24 +080016/* Macros to access registers */
17#define REG32_ADDR(addr) ((volatile uint32_t *)(uintptr_t)(addr))
18#define REG16_ADDR(addr) ((volatile uint16_t *)(uintptr_t)(addr))
xiaohu.huange7678d12022-05-10 00:56:48 +080019#define REG8_ADDR(addr) ((volatile uint8_t *)(uintptr_t)(addr))
Xiaohu.Huang83a0b702021-12-28 11:06:24 +080020
21#define REG32(addr) (*REG32_ADDR(addr))
22#define REG16(addr) (*REG16_ADDR(addr))
xiaohu.huange7678d12022-05-10 00:56:48 +080023#define REG8(addr) (*REG8_ADDR(addr))
Xiaohu.Huang83a0b702021-12-28 11:06:24 +080024
xiaohu.huange7678d12022-05-10 00:56:48 +080025#define BIT(nr) (1UL << (nr))
26#define REG32_UPDATE_BITS(addr, mask, val) \
27 do { \
28 uint32_t _v = REG32((unsigned long)addr); \
29 _v &= (~(mask)); \
30 _v |= ((val) & (mask)); \
31 REG32((unsigned long)addr) = _v; \
32 } while (0)
Xiaohu.Huang83a0b702021-12-28 11:06:24 +080033
34#ifndef FIELD_PREP
xiaohu.huange7678d12022-05-10 00:56:48 +080035#define FIELD_PREP(_mask, _val) (((typeof(_mask))(_val) << (ffs(_mask) - 1)) & (_mask))
Xiaohu.Huang83a0b702021-12-28 11:06:24 +080036#endif
37
38#ifndef FIELD_GET
xiaohu.huange7678d12022-05-10 00:56:48 +080039#define FIELD_GET(_mask, _reg) ((typeof(_mask))(((_reg) & (_mask)) >> (ffs(_mask) - 1)))
Xiaohu.Huang83a0b702021-12-28 11:06:24 +080040#endif
41
42#define ARRAY_SIZE(x) (sizeof(x) / sizeof((x)[0]))
43
44#define BITS_PER_LONG (sizeof(unsigned long) == 8 ? 64 : 32)
xiaohu.huange7678d12022-05-10 00:56:48 +080045#define GENMASK(h, l) (((~0UL) << (l)) & (~0UL >> (BITS_PER_LONG - 1 - (h))))
46#define IS_ALIGNED(x, a) (((unsigned long)(x) & ((unsigned long)(a)-1)) == 0)
47#define _RET_IP_ ((unsigned long)__builtin_return_address(0))
48#define _THIS_IP_ \
49 ({ \
50 __label__ __here; \
51__here: \
52 (unsigned long)&&__here; \
53 })
Xiaohu.Huang83a0b702021-12-28 11:06:24 +080054#define __round_mask(x, y) ((__typeof__(x))((y)-1))
xiaohu.huange7678d12022-05-10 00:56:48 +080055#define round_up(x, y) ((((x)-1) | __round_mask(x, y)) + 1)
Xiaohu.Huang83a0b702021-12-28 11:06:24 +080056#define round_down(x, y) ((x) & ~__round_mask(x, y))
57
58typedef uint64_t u64;
59typedef uint32_t u32;
60typedef uint16_t u16;
61typedef uint8_t u8;
62typedef int64_t s64;
63typedef int32_t s32;
64typedef int16_t s16;
65typedef int8_t s8;
66
67#ifndef BIT
68#define BIT(x) (1 << (x))
69#endif
70
71#ifdef __cplusplus
72}
73#endif
74#endif