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bangzheng.liu146fa082024-01-11 11:30:33 +08001/*
2 * Copyright (c) 2021-2022 Amlogic, Inc. All rights reserved.
3 *
4 * SPDX-License-Identifier: MIT
5 */
6
7#ifndef _SARADC_DATA_H_
8#define _SARADC_DATA_H_
9
10#include <register.h>
11
12#define SAR_CLK_BASE CLKCTRL_SAR_CLK_CTRL0
13#define SARADC_BASE SAR_ADC_REG0
14
Huqiang Qinf9a3d772024-07-04 13:32:20 +080015#define SAR_SYS_CLK_EN_BASE CLKCTRL_SYS_CLK_EN0_REG2
16#define SAR_SYS_CLK_EN_BIT 28
17
Huqiang Qin1ec12c72024-06-26 19:14:04 +080018#define SARADC_REG7_INIT 0x00000c11
19#define SARADC_REG8_INIT 0x0280614d
20#define SARADC_REG3_INIT 0x10a02403
21#define SARADC_REG4_INIT 0x001dd080
22#define SARADC_REG5_INIT 0x00103c0b
23#define SARADC_REG6_INIT 0x00000031
24#define SARADC_REG9_INIT 0x0000e4e4
25#define SARADC_REG10_INIT 0x74543414
26#define SARADC_REG11_INIT 0xf4d4b494
bangzheng.liu146fa082024-01-11 11:30:33 +080027
28/* s7d saradc interrupt num */
29#define SARADC_INTERRUPT_NUM 181
30
Huqiang Qinf9a3d772024-07-04 13:32:20 +080031#define SARADC_REG_NUM ((0x3c >> 2) + 2)
bangzheng.liu146fa082024-01-11 11:30:33 +080032
33#endif