| bangzheng.liu | fe648a9 | 2023-10-27 13:18:41 +0800 | [diff] [blame] | 1 | /* |
| Huqiang Qin | cc18481 | 2024-04-10 14:50:04 +0800 | [diff] [blame] | 2 | * Copyright (c) 2021-2024 Amlogic, Inc. All rights reserved. |
| bangzheng.liu | fe648a9 | 2023-10-27 13:18:41 +0800 | [diff] [blame] | 3 | * |
| 4 | * SPDX-License-Identifier: MIT |
| 5 | */ |
| 6 | |
| 7 | #ifndef _SARADC_DATA_H_ |
| 8 | #define _SARADC_DATA_H_ |
| 9 | |
| 10 | #include <register.h> |
| 11 | |
| 12 | #define SAR_CLK_BASE CLKCTRL_SAR_CLK_CTRL0 |
| 13 | #define SARADC_BASE SAR_ADC_REG0 |
| 14 | |
| Huqiang Qin | f9a3d77 | 2024-07-04 13:32:20 +0800 | [diff] [blame] | 15 | #define SAR_SYS_CLK_EN_BASE CLKCTRL_SYS_CLK_EN0_REG2 |
| 16 | #define SAR_SYS_CLK_EN_BIT 28 |
| 17 | |
| Huqiang Qin | 4388c24 | 2024-07-01 16:21:59 +0800 | [diff] [blame] | 18 | #define SARADC_REG7_INIT 0x00000c11 |
| Huqiang Qin | 1ec12c7 | 2024-06-26 19:14:04 +0800 | [diff] [blame] | 19 | #define SARADC_REG8_INIT 0x0280614d |
| 20 | #define SARADC_REG3_INIT 0x10a02403 |
| 21 | #define SARADC_REG4_INIT 0x00000080 |
| Huqiang Qin | 1ec12c7 | 2024-06-26 19:14:04 +0800 | [diff] [blame] | 22 | #define SARADC_REG9_INIT 0x0000e4e4 |
| 23 | #define SARADC_REG10_INIT 0x74543414 |
| 24 | #define SARADC_REG11_INIT 0xf4d4b494 |
| 25 | |
| bangzheng.liu | fe648a9 | 2023-10-27 13:18:41 +0800 | [diff] [blame] | 26 | /* s7d saradc interrupt num */ |
| 27 | #define SARADC_INTERRUPT_NUM 181 |
| 28 | |
| Huqiang Qin | f9a3d77 | 2024-07-04 13:32:20 +0800 | [diff] [blame] | 29 | #define SARADC_REG_NUM ((0x3c >> 2) + 2) |
| bangzheng.liu | fe648a9 | 2023-10-27 13:18:41 +0800 | [diff] [blame] | 30 | |
| 31 | #endif |