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Wenjie Qiao8a73a562023-02-23 18:37:14 +08001// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
2/*
3 * Copyright (c) 2019 Amlogic, Inc. All rights reserved.
4 */
5
6#include <common.h>
7#include <command.h>
8#include <env.h>
9#include <malloc.h>
10#include <asm/byteorder.h>
11#include <amlogic/clk_measure.h>
12#include <amlogic/media/vout/hdmitx21/hdmitx.h>
Wenjie Qiao389d3ea2023-05-25 16:07:03 +080013#include <linux/delay.h>
Wenjie Qiao4bdbbee2024-02-01 10:16:44 +080014#include <image.h>
Wenjie Qiao8a73a562023-02-23 18:37:14 +080015#include <amlogic/media/dv/dolby_vision.h>
16#include <linux/libfdt_env.h>
Wenjie Qiao4bdbbee2024-02-01 10:16:44 +080017#include <amlogic/media/vout/dsc.h>
xiang.wu114497ab2024-02-21 14:57:05 +080018#include <amlogic/media/vout/aml_vinfo.h>
19#include <linux/arm-smccc.h>
Wenjie Qiao8a73a562023-02-23 18:37:14 +080020
21static unsigned char edid_raw_buf[512] = {0};
Wenjie Qiao389d3ea2023-05-25 16:07:03 +080022/* there may be outputmode/2/3 when in multi-display case,
23 * sel_hdmimode is used to save the selected hdmi mode
24 */
25static char sel_hdmimode[MODE_LEN] = {0};
Wenjie Qiao8a73a562023-02-23 18:37:14 +080026
27static void dump_full_edid(const unsigned char *buf)
28{
29 int i;
30 int blk_no;
31
32 if (!buf)
33 return;
34 blk_no = buf[126] + 1;
35 if (blk_no > 4)
36 blk_no = 4;
Wenjie Qiao389d3ea2023-05-25 16:07:03 +080037
38 if (blk_no == 2)
39 if (buf[128 + 4] == 0xe2 && buf[128 + 5] == 0x78)
40 blk_no = buf[128 + 6] + 1;
xiang.wu114497ab2024-02-21 14:57:05 +080041 if (blk_no > EDID_MAX_BLOCK)
42 blk_no = EDID_MAX_BLOCK;
Wenjie Qiao389d3ea2023-05-25 16:07:03 +080043
Wenjie Qiao8a73a562023-02-23 18:37:14 +080044 printf("dump EDID rawdata\n");
45 printf(" ");
46 for (i = 0; i < blk_no * EDID_BLK_SIZE; i++)
47 printf("%02x", buf[i]);
48 printf("\n");
49}
50
51static int do_edid(cmd_tbl_t *cmdtp, int flag, int argc, char *const argv[])
52{
53 unsigned char st = 0;
54 struct hdmitx_dev *hdev = get_hdmitx21_device();
55
56 memset(edid_raw_buf, 0, ARRAY_SIZE(edid_raw_buf));
57
58 st = hdev->hwop.read_edid(edid_raw_buf);
59
60 if (!st)
61 printf("edid read failed\n");
62
63 return st;
64}
65
66static int do_rx_det(cmd_tbl_t *cmdtp, int flag, int argc, char *const argv[])
67{
68 unsigned char st = 0;
69 struct hdmitx_dev *hdev = get_hdmitx21_device();
70
71 memset(edid_raw_buf, 0, ARRAY_SIZE(edid_raw_buf));
72
73 // read edid raw data
74 // current only support read 1 byte edid data
75 st = hdev->hwop.read_edid(edid_raw_buf);
76
77 if (st) {
78 if (edid_raw_buf[250] == 0xfb && edid_raw_buf[251] == 0x0c) {
79 printf("RX is FBC\n");
80
81 // set outputmode ENV
82 switch (edid_raw_buf[252] & 0x0f) {
83 case 0x0:
84 run_command("setenv outputmode 1080p50hz", 0);
85 break;
86 case 0x1:
87 run_command("setenv outputmode 2160p50hz420", 0);
88 break;
89 case 0x2:
90 run_command("setenv outputmode 1080p50hz44410bit", 0);
91 break;
92 case 0x3:
93 run_command("setenv outputmode 2160p50hz42010bit", 0);
94 break;
95 case 0x4:
96 run_command("setenv outputmode 2160p50hz42210bit", 0);
97 break;
98 case 0x5:
99 run_command("setenv outputmode 2160p50hz", 0);
100 break;
101 default:
102 run_command("setenv outputmode 1080p50hz", 0);
103 break;
104 }
105
106 /*et RX 3D Info*/
107 switch ((edid_raw_buf[252] >> 4) & 0x0f) {
108 case 0x00:
109 run_command("setenv rx_3d_info 0", 0);
110 break;
111 case 0x01:
112 run_command("setenv rx_3d_info 1", 0);
113 break;
114 case 0x02:
115 run_command("setenv rx_3d_info 2", 0);
116 break;
117 case 0x03:
118 run_command("setenv rx_3d_info 3", 0);
119 break;
120 case 0x04:
121 run_command("setenv rx_3d_info 4", 0);
122 break;
123 default:
124 break;
125 }
126
127 switch (edid_raw_buf[253]) {
128 case 0x1:
129 /*TODO*/
130 break;
131 case 0x2:
132 /*TODO*/
133 break;
134 default:
135 break;
136 }
137 }
138 } else {
139 printf("edid read failed\n");
140 }
141
142 return st;
143}
144
Wenjie Qiao389d3ea2023-05-25 16:07:03 +0800145static void save_default_720p(void)
146{
147 memcpy(sel_hdmimode, DEFAULT_HDMI_MODE, sizeof(DEFAULT_HDMI_MODE));
148 if (is_hdmi_mode(env_get("outputmode")))
149 env_set("outputmode", DEFAULT_HDMI_MODE);
150 else if (is_hdmi_mode(env_get("outputmode2")))
151 env_set("outputmode2", DEFAULT_HDMI_MODE);
152 else if (is_hdmi_mode(env_get("outputmode3")))
153 env_set("outputmode3", DEFAULT_HDMI_MODE);
154 env_set("colorattribute", DEFAULT_COLOR_FORMAT);
155}
156
Wenjie Qiao8a73a562023-02-23 18:37:14 +0800157static void hdmitx_mask_rx_info(struct hdmitx_dev *hdev)
158{
Wenjie Qiao8a73a562023-02-23 18:37:14 +0800159 if (!hdev || !hdev->para)
160 return;
161
Wenjie Qiao389d3ea2023-05-25 16:07:03 +0800162 if (env_get("colorattribute"))
163 hdmitx21_get_fmtpara(sel_hdmimode, env_get("colorattribute"));
164
Wenjie Qiao8a73a562023-02-23 18:37:14 +0800165 /* when current output color depth is 8bit, mask hdr capability */
166 /* refer to SWPL-44445 for more detail */
167 if (hdev->para->cd == COLORDEPTH_24B)
168 memset(&hdev->RXCap.hdr_info, 0, sizeof(struct hdr_info));
169}
170
Wenjie Qiao4bdbbee2024-02-01 10:16:44 +0800171/* If environment qms_en is true, and RX supports QMS, and the
172 * output mode is BRR then enable TX QMS
173 */
174static void qms_scene_pre_process(struct hdmitx_dev *hdev)
175{
176 bool env_qms_en = 0;
177 bool rx_qms_cap = 0;
178 enum hdmi_vic qms_brr_vic = HDMI_UNKNOWN;
179 const struct hdmi_timing *t = NULL;
180 char *color = NULL;
zongdong.jiao1ac547f2024-03-06 13:43:31 +0800181 const char *i_modes[3] = {
182 "480i", "576i", "1080i",
183 };
184 char *mode;
185 int i;
186
187 /* if current mode is interlaced mode, then skip QMS */
188 mode = env_get("hdmi_mode");
189 if (!mode)
190 return;
191 for (i = 0; i < 3; i++) {
192 if (strstr(mode, i_modes[i]))
193 return;
194 }
Wenjie Qiao4bdbbee2024-02-01 10:16:44 +0800195
196 /* check uboot environment */
197 if (env_get("qms_en") && (env_get_ulong("qms_en", 10, 0) == 1))
198 env_qms_en = 1;
199
200 rx_qms_cap = hdev->RXCap.qms;
201
202 qms_brr_vic = hdmitx_find_brr_vic(hdev->vic);
203
204 if (env_qms_en && rx_qms_cap && qms_brr_vic != HDMI_UNKNOWN)
205 hdev->qms_en = 1;
206 pr_info("QMS: env %d rx %d vic %d brr_vic %d\n", env_qms_en, rx_qms_cap,
207 hdev->vic, qms_brr_vic);
208 if (!hdev->qms_en)
209 return;
210 hdev->brr_vic = qms_brr_vic;
211 /* save brr_vic to vic without the environment */
212 hdev->vic = hdev->brr_vic;
213 /* reconfig the hdmi para */
214 t = hdmitx21_gettiming_from_vic(hdev->brr_vic);
215 if (!t) {
216 pr_info("not find brr_vic %d timing\n", hdev->brr_vic);
217 return;
218 }
219 color = env_get("user_colorattribute");
220 if (!color)
221 color = env_get("colorattribute");
222 hdev->para = hdmitx21_get_fmtpara(t->sname ? t->sname : t->name, color);
223}
224
225static void qms_scene_post_process(struct hdmitx_dev *hdev)
226{
227 // Init QMS parameter
228 vrr_init_qms_para(hdev);
229}
230
Wenjie Qiao8a73a562023-02-23 18:37:14 +0800231static int do_output(cmd_tbl_t *cmdtp, int flag, int argc, char *const argv[])
232{
233 const struct hdmi_timing *timing = NULL;
234 struct hdmitx_dev *hdev = get_hdmitx21_device();
235
xiang.wu1a6d6f1d2023-08-04 14:13:00 +0800236#ifdef CONFIG_PXP_EMULATOR
237 hdmitx21_pxp_init(1);
238#endif
Wenjie Qiao8a73a562023-02-23 18:37:14 +0800239 if (argc < 1)
240 return cmd_usage(cmdtp);
241
242 if (strcmp(argv[1], "list") == 0) {
243 hdev->hwop.list_support_modes();
244 } else if (strcmp(argv[1], "bist") == 0) {
245 unsigned int mode = 0;
246
247 if (strcmp(argv[2], "off") == 0)
248 mode = 0;
249 else if (strcmp(argv[2], "line") == 0)
250 mode = 2;
251 else if (strcmp(argv[2], "dot") == 0)
252 mode = 3;
253 else if (strcmp(argv[2], "x") == 0)
254 mode = 'x';
255 else if (strcmp(argv[2], "X") == 0)
256 mode = 'X';
257 else
258 mode = simple_strtoul(argv[2], NULL, 10);
259 hdev->hwop.test_bist(mode);
260 } else if (strcmp(argv[1], "prbs") == 0) {
261 hdev->para->cs = HDMI_COLORSPACE_RGB;
262 hdev->para->cd = COLORDEPTH_24B;
263 hdev->vic = HDMI_16_1920x1080p60_16x9;
264 hdmitx21_set(hdev);
265 hdev->hwop.test_prbs();
266 } else if (strncmp(argv[1], "div40", 5) == 0) {
267 bool div40 = 0;
268
269 if (argv[1][5] == '1')
270 div40 = 1;
271 hdev->hwop.set_div40(div40);
272 } else { /* "output" */
Wenjie Qiao389d3ea2023-05-25 16:07:03 +0800273 if (!hdev->pxp_mode) {
xiang.wu114497ab2024-02-21 14:57:05 +0800274 if (!hdmitx_edid_check_data_valid(0, hdev->rawedid)) {
Wenjie Qiao389d3ea2023-05-25 16:07:03 +0800275 /* in SWPL-34712: if EDID parsing error in kernel,
276 * only forcely output default mode(480p,RGB,8bit)
277 * in sysctl, not save the default mode to env.
278 * if uboot follow this rule, will cause issue OTT-19333:
279 * uboot read edid error and then output default mode,
280 * without save it mode env. if then kernel edid normal,
281 * sysctrl/kernel get mode from env, the actual output
282 * mode differs with outputmode env,it will
283 * cause display abnormal(such as stretch). so don't
284 * follow this rule in uboot, that's to say the actual
285 * output mode needs to stays with the outputmode env.
286 */
287 printf("edid parsing ng, forcely output 720p, rgb,8bit\n");
288 save_default_720p();
289 hdev->vic = HDMI_4_1280x720p60_16x9;
290 hdev->para =
291 hdmitx21_get_fmtpara("720p60hz", "rgb,8bit");
292 hdev->para->cs = HDMI_COLORSPACE_RGB;
293 hdev->para->cd = COLORDEPTH_24B;
294 hdmitx21_set(hdev);
295 return CMD_RET_SUCCESS;
296 }
Wenjie Qiao8a73a562023-02-23 18:37:14 +0800297 }
298 if (!env_get("colorattribute"))
299 env_set("colorattribute", "444,8bit");
300 hdev->para = hdmitx21_get_fmtpara(argv[1], env_get("colorattribute"));
301 hdev->vic = hdev->para->timing.vic;
xiang.wu114497ab2024-02-21 14:57:05 +0800302 if (hdev->vic == HDMI_0_UNKNOWN) {
Wenjie Qiao8a73a562023-02-23 18:37:14 +0800303 /* Not find VIC */
304 printf("Not find '%s' mapped VIC\n", argv[1]);
305 return CMD_RET_FAILURE;
306 }
307 if (strstr(argv[1], "hz420"))
308 hdev->para->cs = HDMI_COLORSPACE_YUV420;
309 /* S5 support over 6G, T7 not support */
310 switch (hdev->vic) {
311 case HDMI_96_3840x2160p50_16x9:
312 case HDMI_97_3840x2160p60_16x9:
313 case HDMI_101_4096x2160p50_256x135:
314 case HDMI_102_4096x2160p60_256x135:
315 case HDMI_106_3840x2160p50_64x27:
316 case HDMI_107_3840x2160p60_64x27:
Wenjie Qiao4bdbbee2024-02-01 10:16:44 +0800317 if (hdev->chip_type != MESON_CPU_ID_S5) {
Wenjie Qiao8a73a562023-02-23 18:37:14 +0800318 if (hdev->para->cs == HDMI_COLORSPACE_RGB ||
319 hdev->para->cs == HDMI_COLORSPACE_YUV444) {
320 if (hdev->para->cd != COLORDEPTH_24B) {
321 printf("vic %d cs %d has no cd %d\n",
322 hdev->vic,
323 hdev->para->cs,
324 hdev->para->cd);
325 hdev->para->cd = COLORDEPTH_24B;
326 printf("set cd as %d\n", COLORDEPTH_24B);
327 }
328 }
329 }
330 break;
331 default:
332 /* In Spec2.1 Table 7-34, greater than 2160p30hz will support y420 */
333 timing = hdmitx21_gettiming_from_vic(hdev->vic);
334 if (!timing)
335 break;
336 if (timing->v_active > 2160 && timing->v_freq > 30000)
337 break;
338 if (timing->v_active >= 4320)
339 break;
340 if (hdev->para->cs == HDMI_COLORSPACE_YUV420) {
341 printf("vic %d has no cs %d\n", hdev->vic,
342 hdev->para->cs);
343 hdev->para->cs = HDMI_COLORSPACE_YUV444;
344 printf("set cs as %d\n", HDMI_COLORSPACE_YUV444);
345 }
346 break;
347 }
348 printf("set hdmitx VIC = %d CS = %d CD = %d\n",
349 hdev->vic, hdev->para->cs, hdev->para->cd);
Wenjie Qiao4bdbbee2024-02-01 10:16:44 +0800350 qms_scene_pre_process(hdev);
Wenjie Qiao8a73a562023-02-23 18:37:14 +0800351 /* currently, hdmi mode is always set, if
352 * mode set abort/exit, need to add return
353 * result of mode setting, so that vout
354 * driver will pass it to kernel, and do
355 * mode setting again when vout init in kernel
356 */
357 hdmitx21_set(hdev);
Wenjie Qiao4bdbbee2024-02-01 10:16:44 +0800358 qms_scene_post_process(hdev);
Wenjie Qiao389d3ea2023-05-25 16:07:03 +0800359 if (hdev->frl_rate && !hdev->flt_train_st) {
360 /* FLT training failed, need go to tmds mode */
361 printf("hdmitx frl training failed, set tmds mode\n");
362 run_command("setenv hdmimode 1080p60hz", 0);
363 run_command("setenv colorattribute 422,12bit", 0);
364 run_command("run init_display_base", 0);
365 }
Wenjie Qiao8a73a562023-02-23 18:37:14 +0800366 }
367 return CMD_RET_SUCCESS;
368}
369
370static int do_clkmsr(cmd_tbl_t *cmdtp, int flag, int argc, char *const argv[])
371{
Wenjie Qiao4bdbbee2024-02-01 10:16:44 +0800372 struct hdmitx_dev *hdev = get_hdmitx21_device();
373
374 if (hdev->chip_type == MESON_CPU_ID_S5) {
375 clk_msr(4);
376 clk_msr(8);
377 clk_msr(16);
378 clk_msr(27);
379 clk_msr(63);
380 clk_msr(64);
381 clk_msr(66);
382 clk_msr(68);
383 clk_msr(69);
384 clk_msr(70);
385 clk_msr(71);
386 clk_msr(72);
387 clk_msr(73);
388 clk_msr(74);
389 clk_msr(75);
390 clk_msr(76);
391 clk_msr(79);
392 clk_msr(82);
393 clk_msr(89);
394 clk_msr(90);
395 clk_msr(91);
396 clk_msr(92);
397 clk_msr(93);
398 clk_msr(94);
399 clk_msr(95);
400 return CMD_RET_SUCCESS;
401 }
Wenjie Qiao8a73a562023-02-23 18:37:14 +0800402 clk_msr(51);
403 clk_msr(59);
404 clk_msr(61);
405 clk_msr(76);
406 clk_msr(77);
407 clk_msr(78);
408 clk_msr(80);
409 clk_msr(81);
410 clk_msr(82);
411 clk_msr(83);
412 clk_msr(219);
413 clk_msr(220);
414 clk_msr(221);
415 clk_msr(222);
416 return CMD_RET_SUCCESS;
417}
418
419static int do_blank(cmd_tbl_t *cmdtp, int flag, int argc, char *const argv[])
420{
421 struct hdmitx_dev *hdev = get_hdmitx21_device();
422
423 if (argc < 1)
424 return cmd_usage(cmdtp);
425
426 if (strcmp(argv[1], "1") == 0)
427 hdev->hwop.output_blank(1);
428 if (strcmp(argv[1], "0") == 0)
429 hdev->hwop.output_blank(0);
430
431 return CMD_RET_SUCCESS;
432}
433
434static int do_off(cmd_tbl_t *cmdtp, int flag, int argc, char *const argv[])
435{
436 struct hdmitx_dev *hdev = get_hdmitx21_device();
437
xiang.wu114497ab2024-02-21 14:57:05 +0800438 hdev->vic = HDMI_0_UNKNOWN;
Wenjie Qiao4bdbbee2024-02-01 10:16:44 +0800439 if (hdev->chip_type == MESON_CPU_ID_S5)
440 hdmitx_module_disable();
Wenjie Qiao8a73a562023-02-23 18:37:14 +0800441 hdev->hwop.turn_off();
442 printf("turn off hdmitx\n");
443 return 1;
444}
445
446static int do_dump(cmd_tbl_t *cmdtp, int flag, int argc, char *const argv[])
447{
448 struct hdmitx_dev *hdev = get_hdmitx21_device();
449
450 hdev->hwop.dump_regs();
451 return 1;
452}
453
454static int do_reg(cmd_tbl_t *cmdtp, int flag, int argc, char *const argv[])
455{
456 unsigned long addr = 0;
457 unsigned int data = 0;
458
459 if (argc < 1)
460 return cmd_usage(cmdtp);
461
462 if (strncmp(argv[1], "rh", 2) == 0) {
463 addr = strtoul(argv[1] + 2, NULL, 16);
464 data = hdmitx21_rd_reg((unsigned int)addr);
465 printf("rd[0x%lx] 0x%x\n", addr, data);
466 }
467
468 if (strncmp(argv[1], "wh", 2) == 0) {
469 addr = strtoul(argv[1] + 2, NULL, 16);
470 data = strtoul(argv[2], NULL, 16);
471 hdmitx21_wr_reg(addr, data);
472 printf("wr[0x%lx] 0x%x\n", addr, data);
473 }
474
475 return 1;
476}
477
xiang.wu1a6d6f1d2023-08-04 14:13:00 +0800478static int do_pbist(cmd_tbl_t *cmdtp, int flag, int argc, char *const argv[])
479{
480 struct hdmitx_dev *hdev = get_hdmitx21_device();
481
482 if (strcmp(argv[1], "1") == 0)
483 hdmitx21_pbist_config(hdev, hdev->vic, 1);
484 if (strcmp(argv[1], "0") == 0)
485 hdmitx21_pbist_config(hdev, hdev->vic, 0);
486 return 1;
487}
488
xiang.wu1492f3642024-01-08 14:06:40 +0800489static int do_s7_clk_config(cmd_tbl_t *cmdtp, int flag, int argc, char *const argv[])
490{
491 struct hdmitx_dev *hdev = get_hdmitx21_device();
492
493 if (strcmp(argv[1], "1") == 0) {
494 hdev->s7_clk_config = 1;
495 pr_info("s7_clk_config = %d\n", hdev->s7_clk_config);
496 } if (strcmp(argv[1], "0") == 0) {
497 hdev->s7_clk_config = 0;
498 pr_info("s7_clk_config = %d\n", hdev->s7_clk_config);
499 }
500 return 1;
501}
502
xiang.wu114497ab2024-02-21 14:57:05 +0800503static int get_rterm(cmd_tbl_t *cmdtp, int flag, int argc, char *const argv[])
504{
505 struct arm_smccc_res res;
506 u8 rterm_efuse;
507
508 arm_smccc_smc(HDCPTX_IOOPR, HDMITX_GET_RTERM, 0, 0, 0, 0, 0, 0, &res);
509 rterm_efuse = (unsigned int)((res.a0) & 0xffffffff);
510 pr_info("rterm_efuse = %d\n", rterm_efuse);
511 return 1;
512}
513
xiang.wu1a6d6f1d2023-08-04 14:13:00 +0800514static int do_debug(cmd_tbl_t *cmdtp, int flag, int argc, char *const argv[])
515{
516 unsigned int enable_all = 0;
517 int pkt_op = 0;
518 unsigned int mov_val = 0;
519 unsigned char pb[28] = {0x46, 0xD0, 0x00, 0x00, 0x00, 0x00, 0x46, 0xD0,
520 0x00, 0x10, 0x21, 0xaa, 0x9b, 0x96, 0x19, 0xfc, 0x19, 0x75, 0xd5, 0x78,
521 0x10, 0x21, 0xaa, 0x9b, 0x96, 0x19, 0xfc, 0x19};
522 unsigned char hb[3] = {0x01, 0x02, 0x03};
523
524 if (argc < 1)
525 return cmd_usage(cmdtp);
526
527 if (strncmp(argv[1], "pkt", 3) == 0) {
528 enable_all = strtoul(argv[1] + 3, NULL, 16);
529 pkt_op = strtoul(argv[2], NULL, 16);
530 mov_val = strtoul(argv[3], NULL, 10);
531 pkt_send_position_change(enable_all, pkt_op, mov_val);
532 } else if (strncmp(argv[1], "w_dhdr", 6) == 0 ) {
533 hdmitx21_write_dhdr_sram();
534 } else if (strncmp(argv[1], "r_dhdr", 6) == 0 ) {
535 hdmitx21_read_dhdr_sram();
536 } else if (strncmp(argv[1], "t_avi", 4) == 0 ) {
537 printf("test send avi pkt\n");
538 hdmi_avi_infoframe_rawset(hb, pb);
539 } else if (strncmp(argv[1], "t_audio", 7) == 0 ) {
540 printf("test send audio pkt\n");
541 hdmi_audio_infoframe_rawset(hb, pb);
542 } else if (strncmp(argv[1], "t_sbtm", 6) == 0 ) {
543 printf("test send SBTM pkt\n");
544 hdmitx21_send_sbtm_pkt();
545 }
546
547 return 1;
548}
549
Wenjie Qiao8a73a562023-02-23 18:37:14 +0800550static bool check_vic_exist(struct hdmitx_dev *hdev, enum hdmi_vic vic,
551 int count)
552{
553 struct rx_cap *rxcap = NULL;
554 int i;
555
556 rxcap = &hdev->RXCap;
557 for (i = 0; i < count; i++)
558 if (vic == rxcap->VIC[i])
559 return 1;
560
561 return 0;
562}
563
564static void disp_cap_show(struct hdmitx_dev *hdev)
565{
566 struct rx_cap *rxcap = NULL;
567 const struct hdmi_timing *timing = NULL;
568 enum hdmi_vic vic;
569 int i;
570
571 if (!hdev)
572 return;
573
574 rxcap = &hdev->RXCap;
575 printf("disp_cap\n");
576 for (i = 0; i < rxcap->VIC_count && i < VIC_MAX_NUM; i++) {
577 vic = rxcap->VIC[i];
578 if (check_vic_exist(hdev, vic, i))
579 continue;
580 timing = hdmitx21_gettiming_from_vic(vic);
581 if (timing && vic < HDMITX_VESA_OFFSET && !is_vic_over_limited_1080p(vic))
582 printf(" %s\n", timing->sname ? timing->sname : timing->name);
583 }
xiang.wu114497ab2024-02-21 14:57:05 +0800584 printf("420_cap\n");
585 for (i = 0; i < Y420_VIC_MAX_NUM; i++) {
586 vic = rxcap->y420_vic[i];
587 printf("420vic:%d\n", vic);
588 }
Wenjie Qiao8a73a562023-02-23 18:37:14 +0800589}
590
591static void vesa_cap_show(struct hdmitx_dev *hdev)
592{
593}
594
595static void dc_cap_show(struct hdmitx_dev *hdev)
596{
597 enum hdmi_vic vic = HDMI_0_UNKNOWN;
598 struct rx_cap *prxcap = &hdev->RXCap;
599 const struct dv_info *dv = &hdev->RXCap.dv_info;
600
601 printf("dc_cap\n");
602 if (prxcap->dc_36bit_420)
603 printf("420,12bit\n");
604 if (prxcap->dc_30bit_420) {
605 printf("420,10bit\n");
606 printf("420,8bit\n");
607 } else {
608 vic = hdmitx_edid_get_VIC(hdev, "2160p60hz420", 0);
609 if (vic != HDMI_0_UNKNOWN) {
610 printf("420,8bit\n");
611 goto next444;
612 }
613 vic = hdmitx_edid_get_VIC(hdev, "2160p50hz420", 0);
614 if (vic != HDMI_0_UNKNOWN) {
615 printf("420,8bit\n");
616 goto next444;
617 }
618 vic = hdmitx_edid_get_VIC(hdev, "smpte60hz420", 0);
619 if (vic != HDMI_0_UNKNOWN) {
620 printf("420,8bit\n");
621 goto next444;
622 }
623 vic = hdmitx_edid_get_VIC(hdev, "smpte50hz420", 0);
624 if (vic != HDMI_0_UNKNOWN) {
625 printf("420,8bit\n");
626 goto next444;
627 }
628 }
629next444:
630 if (prxcap->native_Mode & (1 << 5)) {
631 if (prxcap->dc_y444) {
632 if (prxcap->dc_36bit || dv->sup_10b_12b_444 == 0x2)
633 printf("444,12bit\n");
634 if (prxcap->dc_30bit || dv->sup_10b_12b_444 == 0x1)
635 printf("444,10bit\n");
636 }
637 printf("444,8bit\n");
638 }
639 /* y422, not check dc */
640 if (prxcap->native_Mode & (1 << 4)) {
641 printf("422,12bit\n");
642 printf("422,10bit\n");
643 printf("422,8bit\n");
644 }
645
646 if (prxcap->dc_36bit || dv->sup_10b_12b_444 == 0x2)
647 printf("rgb,12bit\n");
648 if (prxcap->dc_30bit || dv->sup_10b_12b_444 == 0x1)
649 printf("rgb,10bit\n");
650 printf("rgb,8bit\n");
651}
652
653static void aud_cap_show(struct hdmitx_dev *hdev)
654{
655}
656
657static void hdr_cap_show(struct hdmitx_dev *hdev)
658{
659 int hdr10plugsupported = 0;
660 struct hdr_info *hdr = &hdev->RXCap.hdr_info;
xiang.wu114497ab2024-02-21 14:57:05 +0800661 const struct hdr10_plus_info *hdr10p = &hdev->RXCap.hdr_info.hdr10plus_info;
Wenjie Qiao8a73a562023-02-23 18:37:14 +0800662
663 printf("\nhdr_cap\n");
664 if (hdr10p->ieeeoui == HDR10_PLUS_IEEE_OUI &&
665 hdr10p->application_version != 0xFF)
666 hdr10plugsupported = 1;
667 printf("HDR10Plus Supported: %d\n", hdr10plugsupported);
668 printf("HDR Static Metadata:\n");
669 printf(" Supported EOTF:\n");
xiang.wu114497ab2024-02-21 14:57:05 +0800670 printf(" Traditional SDR: %d\n", !!(hdr->hdr_support & HDR_SUP_EOTF_SDR));
671 printf(" Traditional HDR: %d\n", !!(hdr->hdr_support & HDR_SUP_EOTF_HDR));
672 printf(" SMPTE ST 2084: %d\n", !!(hdr->hdr_support & HDR_SUP_EOTF_SMPTE_ST_2084));
673 printf(" Hybrid Log-Gamma: %d\n", !!(hdr->hdr_support & HDR_SUP_EOTF_HLG));
674 printf(" Supported SMD type1: %d\n", hdr->static_metadata_type1);
Wenjie Qiao8a73a562023-02-23 18:37:14 +0800675 printf(" Luminance Data\n");
xiang.wu114497ab2024-02-21 14:57:05 +0800676 printf(" Max: %d\n", hdr->lumi_max);
677 printf(" Avg: %d\n", hdr->lumi_avg);
678 printf(" Min: %d\n\n", hdr->lumi_min);
Wenjie Qiao8a73a562023-02-23 18:37:14 +0800679 printf("HDR Dynamic Metadata:");
680}
681
682static void _dv_cap_show(const struct dv_info *dv)
683{
684 int i;
685
686 if (dv->ieeeoui != DV_IEEE_OUI || dv->block_flag != CORRECT) {
687 printf("The Rx don't support DolbyVision\n");
688 return;
689 }
690 printf("DolbyVision RX support list:\n");
691
692 if (dv->ver == 0) {
693 printf("VSVDB Version: V%d\n", dv->ver);
694 printf("2160p%shz: 1\n", dv->sup_2160p60hz ? "60" : "30");
695 printf("Support mode:\n");
696 printf(" DV_RGB_444_8BIT\n");
697 if (dv->sup_yuv422_12bit)
698 printf(" DV_YCbCr_422_12BIT\n");
699 }
700 if (dv->ver == 1) {
701 printf("VSVDB Version: V%d(%d-byte)\n", dv->ver, dv->length + 1);
702 if (dv->length == 0xB) {
703 printf("2160p%shz: 1\n", dv->sup_2160p60hz ? "60" : "30");
704 printf("Support mode:\n");
705 printf(" DV_RGB_444_8BIT\n");
706 if (dv->sup_yuv422_12bit)
707 printf(" DV_YCbCr_422_12BIT\n");
708 if (dv->low_latency == 0x01)
709 printf(" LL_YCbCr_422_12BIT\n");
710 }
711
712 if (dv->length == 0xE) {
713 printf("2160p%shz: 1\n", dv->sup_2160p60hz ? "60" : "30");
714 printf("Support mode:\n");
715 printf(" DV_RGB_444_8BIT\n");
716 if (dv->sup_yuv422_12bit)
717 printf(" DV_YCbCr_422_12BIT\n");
718 }
719 }
720 if (dv->ver == 2) {
721 printf("VSVDB Version: V%d\n", dv->ver);
722 printf("2160p%shz: 1\n", dv->sup_2160p60hz ? "60" : "30");
723 printf("Support mode:\n");
724 if (dv->Interface != 0x00 && dv->Interface != 0x01) {
725 printf(" DV_RGB_444_8BIT\n");
726 if (dv->sup_yuv422_12bit)
727 printf(" DV_YCbCr_422_12BIT\n");
728 }
729 printf(" LL_YCbCr_422_12BIT\n");
730 if (dv->Interface == 0x01 || dv->Interface == 0x03) {
731 if (dv->sup_10b_12b_444 == 0x1)
732 printf(" LL_RGB_444_10BIT\n");
733 if (dv->sup_10b_12b_444 == 0x2)
734 printf(" LL_RGB_444_12BIT\n");
735 }
736 }
737 printf("IEEEOUI: 0x%06x\n", dv->ieeeoui);
738 printf("VSVDB: ");
739 for (i = 0; i < (dv->length + 1); i++)
740 printf("%02x", dv->rawdata[i]);
741 printf("\n");
742}
743
744static void dv_cap_show(struct hdmitx_dev *hdev)
745{
746 const struct dv_info *dv = &hdev->RXCap.dv_info;
747
748 printf("dv_cap\n");
749 if (dv->ieeeoui != DV_IEEE_OUI) {
750 printf("The Rx don't support DolbyVision\n");
751 return;
752 }
753 _dv_cap_show(dv);
754}
755
756static void edid_cap_show(struct hdmitx_dev *hdev)
757{
758 int i;
759 struct rx_cap *prxcap = &hdev->RXCap;
760
xiang.wu114497ab2024-02-21 14:57:05 +0800761 printf("Rx EDID Parse:\n");
762 printf("Rx Manufacturer Name: %s\n", prxcap->IDManufacturerName);
763 printf("Rx Product Code: %02x%02x\n",
764 prxcap->IDProductCode[0], prxcap->IDProductCode[1]);
765 printf("Rx Serial Number: %02x%02x%02x%02x\n",
766 prxcap->IDSerialNumber[0],
767 prxcap->IDSerialNumber[1],
768 prxcap->IDSerialNumber[2],
769 prxcap->IDSerialNumber[3]);
770 printf("Rx Product Name: %s\n", prxcap->ReceiverProductName);
Wenjie Qiao8a73a562023-02-23 18:37:14 +0800771
xiang.wu114497ab2024-02-21 14:57:05 +0800772 printf("Manufacture Week: %d\n", prxcap->manufacture_week);
773 printf("Manufacture Year: %d\n", prxcap->manufacture_year + 1990);
Wenjie Qiao8a73a562023-02-23 18:37:14 +0800774
xiang.wu114497ab2024-02-21 14:57:05 +0800775 printf("Physical size(mm): %d x %d\n",
776 prxcap->physical_width, prxcap->physical_height);
777
778 printf("EDID Version: %d.%d\n",
779 prxcap->edid_version, prxcap->edid_revision);
780
781/* printf(
782 * "EDID block number: 0x%x\n", tx_comm->EDID_buf[0x7e]);
783 *
784 *
785 * printf(
786 * "Source Physical Address[a.b.c.d]: %x.%x.%x.%x\n",
787 * hdmitx_device->hdmi_info.vsdb_phy_addr.a,
788 * hdmitx_device->hdmi_info.vsdb_phy_addr.b,
789 * hdmitx_device->hdmi_info.vsdb_phy_addr.c,
790 * hdmitx_device->hdmi_info.vsdb_phy_addr.d);
791 */
792
793 // TODO native_vic2
Wenjie Qiao8a73a562023-02-23 18:37:14 +0800794 printf("native Mode %x, VIC (native %d):\n",
xiang.wu114497ab2024-02-21 14:57:05 +0800795 prxcap->native_Mode, prxcap->native_vic);
Wenjie Qiao8a73a562023-02-23 18:37:14 +0800796
797 printf("ColorDeepSupport %x\n", prxcap->ColorDeepSupport);
798
xiang.wu114497ab2024-02-21 14:57:05 +0800799 for (i = 0; i < prxcap->VIC_count ; i++) {
Wenjie Qiao8a73a562023-02-23 18:37:14 +0800800 printf("%d ", prxcap->VIC[i]);
xiang.wu114497ab2024-02-21 14:57:05 +0800801 }
Wenjie Qiao8a73a562023-02-23 18:37:14 +0800802 printf("\n");
xiang.wu114497ab2024-02-21 14:57:05 +0800803 printf("Audio {format, channel, freq, cce}\n");
804 for (i = 0; i < prxcap->AUD_count; i++) {
805 printf("{%d, %d, %x, %x}\n",
806 prxcap->RxAudioCap[i].audio_format_code,
807 prxcap->RxAudioCap[i].channel_num_max,
808 prxcap->RxAudioCap[i].freq_cc,
809 prxcap->RxAudioCap[i].cc3);
810 }
811 printf("Speaker Allocation: %x\n", prxcap->RxSpeakerAllocation);
812 printf("Vendor: 0x%x ( %s device)\n", prxcap->ieeeoui, (prxcap->ieeeoui) ? "HDMI" : "DVI");
Wenjie Qiao8a73a562023-02-23 18:37:14 +0800813
814 printf("MaxTMDSClock1 %d MHz\n", prxcap->Max_TMDS_Clock1 * 5);
815
xiang.wu114497ab2024-02-21 14:57:05 +0800816 if (prxcap->hf_ieeeoui) {
817 printf("Vendor2: 0x%x\n",
818 prxcap->hf_ieeeoui);
819 printf("MaxTMDSClock2 %d MHz\n",
820 prxcap->Max_TMDS_Clock2 * 5);
Wenjie Qiao8a73a562023-02-23 18:37:14 +0800821 }
822
xiang.wu114497ab2024-02-21 14:57:05 +0800823 printf("MaxFRLRate: %d\n", prxcap->max_frl_rate);
Wenjie Qiao8a73a562023-02-23 18:37:14 +0800824
xiang.wu114497ab2024-02-21 14:57:05 +0800825 if (prxcap->allm)
826 printf("ALLM: %x\n", prxcap->allm);
Wenjie Qiao8a73a562023-02-23 18:37:14 +0800827
xiang.wu114497ab2024-02-21 14:57:05 +0800828 if (prxcap->cnc3)
829 printf("Game/CNC3: %x\n", prxcap->cnc3);
Wenjie Qiao8a73a562023-02-23 18:37:14 +0800830
xiang.wu114497ab2024-02-21 14:57:05 +0800831 printf("vLatency: ");
832 if (prxcap->vLatency == LATENCY_INVALID_UNKNOWN)
Wenjie Qiao8a73a562023-02-23 18:37:14 +0800833 printf(" Invalid/Unknown\n");
xiang.wu114497ab2024-02-21 14:57:05 +0800834 else if (prxcap->vLatency == LATENCY_NOT_SUPPORT)
Wenjie Qiao8a73a562023-02-23 18:37:14 +0800835 printf(" UnSupported\n");
836 else
xiang.wu114497ab2024-02-21 14:57:05 +0800837 printf(" %d\n", prxcap->vLatency);
838
839 printf("aLatency: ");
840 if (prxcap->aLatency == LATENCY_INVALID_UNKNOWN)
841 printf(" Invalid/Unknown\n");
842 else if (prxcap->aLatency == LATENCY_NOT_SUPPORT)
843 printf(" UnSupported\n");
844 else
845 printf(" %d\n", prxcap->aLatency);
846
847 printf("i_vLatency: ");
848 if (prxcap->i_vLatency == LATENCY_INVALID_UNKNOWN)
849 printf(" Invalid/Unknown\n");
850 else if (prxcap->i_vLatency == LATENCY_NOT_SUPPORT)
851 printf(" UnSupported\n");
852 else
853 printf(" %d\n", prxcap->i_vLatency);
854
855 printf("i_aLatency: ");
856 if (prxcap->i_aLatency == LATENCY_INVALID_UNKNOWN)
857 printf(" Invalid/Unknown\n");
858 else if (prxcap->i_aLatency == LATENCY_NOT_SUPPORT)
859 printf(" UnSupported\n");
860 else
861 printf(" %d\n", prxcap->i_aLatency);
Wenjie Qiao8a73a562023-02-23 18:37:14 +0800862
863 if (prxcap->colorimetry_data)
864 printf("ColorMetry: 0x%x\n", prxcap->colorimetry_data);
Wenjie Qiao8a73a562023-02-23 18:37:14 +0800865
xiang.wu114497ab2024-02-21 14:57:05 +0800866 printf("SCDC: %x\n", prxcap->scdc_present);
867
868 printf("RR_Cap: %x\n",
869 prxcap->scdc_rr_capable);
870 printf("LTE_340M_Scramble: %x\n",
871 prxcap->lte_340mcsc_scramble);
872 /* dsc capability */
873 printf("dsc_10bpc: %d\n",
874 prxcap->dsc_10bpc);
875 printf("dsc_12bpc: %d\n",
876 prxcap->dsc_12bpc);
877 printf("dsc_16bpc: %d\n",
878 prxcap->dsc_16bpc);
879 printf("dsc_all_bpp: %d\n",
880 prxcap->dsc_all_bpp);
881 printf("dsc_native_420: %d\n",
882 prxcap->dsc_native_420);
883 printf("dsc_1p2: %d\n",
884 prxcap->dsc_1p2);
885 printf("dsc_max_slices: 0x%x(%d slices)\n",
886 prxcap->dsc_max_slices, dsc_max_slices_num[prxcap->dsc_max_slices]);
887 printf("dsc_max_frl_rate: 0x%x\n",
888 prxcap->dsc_max_frl_rate);
889 printf("dsc_total_chunk_bytes: 0x%x\n",
890 prxcap->dsc_total_chunk_bytes);
891 if (prxcap->dv_info.ieeeoui == DOVI_IEEEOUI)
Wenjie Qiao8a73a562023-02-23 18:37:14 +0800892 printf(" DolbyVision%d", prxcap->dv_info.ver);
xiang.wu114497ab2024-02-21 14:57:05 +0800893
894 if (prxcap->hdr_info2.hdr_support)
895 printf(" HDR/%d",
896 prxcap->hdr_info2.hdr_support);
897 if (prxcap->hdr_info.sbtm_info.sbtm_support)
898 printf(" SBTM");
Wenjie Qiao8a73a562023-02-23 18:37:14 +0800899 if (prxcap->dc_y444 || prxcap->dc_30bit || prxcap->dc_30bit_420)
900 printf(" DeepColor");
901 printf("\n");
xiang.wu114497ab2024-02-21 14:57:05 +0800902 printf("additional_vsif_num: %d\n", prxcap->additional_vsif_num);
903 printf("ifdb_present: %d\n", prxcap->ifdb_present);
904 /* for checkvalue which maybe used by application to adjust
905 * whether edid is changed
906 */
907 printf("checkvalue: %s\n", prxcap->hdmichecksum);
908
Wenjie Qiao8a73a562023-02-23 18:37:14 +0800909}
910
911static int do_info(cmd_tbl_t *cmdtp, int flag, int argc, char *const argv[])
912{
913 struct hdmitx_dev *hdev = get_hdmitx21_device();
914 struct hdmi_format_para *para;
915
916 if (!hdev) {
917 pr_info("null hdmitx dev\n");
918 return CMD_RET_FAILURE;
919 }
920 if (!hdev->para) {
921 printf("null hdmitx para\n");
922 return CMD_RET_FAILURE;
923 }
924
925 para = hdev->para;
926 printf("current mode %s vic %d\n", para->timing.name, hdev->vic);
927 printf("cd%d cs%d cr%d\n", para->cd, para->cs, para->cr);
928 printf("enc_idx %d\n", hdev->enc_idx);
929 printf("frac_rate: %d\n", hdev->frac_rate_policy);
930 printf("Rx EDID info\n");
931 dump_full_edid(hdev->rawedid);
932 disp_cap_show(hdev);
933 vesa_cap_show(hdev);
934 aud_cap_show(hdev);
935 hdr_cap_show(hdev);
936 dv_cap_show(hdev);
937 dc_cap_show(hdev);
938 edid_cap_show(hdev);
Wenjie Qiao4bdbbee2024-02-01 10:16:44 +0800939 printf("dsc policy: %d, enable: %d\n", hdev->dsc_policy, hdev->dsc_en);
940 printf("frl_rate: %d\n", hdev->frl_rate);
Wenjie Qiao8a73a562023-02-23 18:37:14 +0800941 return 1;
942}
943
944static int xtochar(int num, char *checksum)
945{
946 struct hdmitx_dev *hdev = get_hdmitx21_device();
947
948 if (((hdev->rawedid[num] >> 4) & 0xf) <= 9)
949 checksum[0] = ((hdev->rawedid[num] >> 4) & 0xf) + '0';
950 else
951 checksum[0] = ((hdev->rawedid[num] >> 4) & 0xf) - 10 + 'a';
952
953 if ((hdev->rawedid[num] & 0xf) <= 9)
954 checksum[1] = (hdev->rawedid[num] & 0xf) + '0';
955 else
956 checksum[1] = (hdev->rawedid[num] & 0xf) - 10 + 'a';
957
958 return 0;
959}
960
Wenjie Qiao4bdbbee2024-02-01 10:16:44 +0800961/* hdr_priority definition:
962 * strategy1: bit[3:0]
963 * 0: original cap
964 * 1: disable dolby vision cap
965 * 2: disable dolby vision and hdr/hlg cap
966 * strategy2:
967 * bit4: 1: disable dv 0:enable dv
968 * bit5: 1: disable hdr10/hdr10+ 0: enable hdr10/hdr10+
969 * bit6: 1: disable hlg 0: enable hlg
970 * bit28-bit31 choose strategy: bit[31:28]
971 * 0: strategy1
972 * 1: strategy2
973 */
974
975/* for uboot, there is no need to dynamically change the hdr_priority as
976 * kernel. So below functions only implement the disable_xxx_info() function,
977 * and leave the enable_xxx_info as blank
978 */
979
980/* dv_info */
981static void enable_dv_info(struct dv_info *des, const struct dv_info *src)
982{
983 if (!des || !src)
984 return;
985}
986
987static void disable_dv_info(struct dv_info *des)
988{
989 if (!des)
990 return;
991
992 memset(des, 0, sizeof(*des));
993}
994
995/* hdr10 */
996static void enable_hdr10_info(struct hdr_info *des, const struct hdr_info *src)
997{
998 if (!des || !src)
999 return;
1000}
1001
1002static void disable_hdr10_info(struct hdr_info *des)
1003{
1004 if (!des)
1005 return;
1006
xiang.wu114497ab2024-02-21 14:57:05 +08001007 des->hdr_support = des->hdr_support & 0xB;
1008 des->static_metadata_type1 = 0;
1009 des->lumi_max = 0;
1010 des->lumi_avg = 0;
1011 des->lumi_min = 0;
Wenjie Qiao4bdbbee2024-02-01 10:16:44 +08001012}
1013
1014/* hdr10plus */
1015static void enable_hdr10p_info(struct hdr10_plus_info *des, const struct hdr10_plus_info *src)
1016{
1017 if (!des || !src)
1018 return;
1019}
1020
1021static void disable_hdr10p_info(struct hdr10_plus_info *des)
1022{
1023 if (!des)
1024 return;
1025
1026 memset(des, 0, sizeof(*des));
1027}
1028
1029/* hlg */
1030static void enable_hlg_info(struct hdr_info *des, const struct hdr_info *src)
1031{
1032 if (!des || !src)
1033 return;
1034}
1035
1036static void disable_hlg_info(struct hdr_info *des)
1037{
1038 if (!des)
1039 return;
1040
xiang.wu114497ab2024-02-21 14:57:05 +08001041 des->hdr_support = des->hdr_support & 0x7;
Wenjie Qiao4bdbbee2024-02-01 10:16:44 +08001042}
1043
1044static void enable_all_hdr_info(struct rx_cap *prxcap)
1045{
1046 if (!prxcap)
1047 return;
1048}
1049
1050static void update_hdr_strategy1(struct rx_cap *prxcap, u32 strategy)
1051{
1052 if (!prxcap)
1053 return;
1054
1055 switch (strategy) {
1056 case 0:
1057 enable_all_hdr_info(prxcap);
1058 break;
1059 case 1:
1060 disable_dv_info(&prxcap->dv_info);
1061 break;
1062 case 2:
1063 disable_dv_info(&prxcap->dv_info);
1064 disable_hdr10_info(&prxcap->hdr_info);
xiang.wu114497ab2024-02-21 14:57:05 +08001065 disable_hdr10p_info(&prxcap->hdr_info.hdr10plus_info);
Wenjie Qiao4bdbbee2024-02-01 10:16:44 +08001066 disable_hlg_info(&prxcap->hdr_info);
1067 break;
1068 default:
1069 break;
1070 }
1071}
1072
1073static void update_hdr_strategy2(struct rx_cap *prxcap, u32 strategy)
1074{
1075 if (!prxcap)
1076 return;
1077
1078 /* bit4: 1 disable dv 0 enable dv */
1079 if (strategy & BIT(4))
1080 disable_dv_info(&prxcap->dv_info);
1081 else
1082 enable_dv_info(&prxcap->dv_info, NULL);
1083 /* bit5: 1 disable hdr10/hdr10+ 0 enable hdr10/hdr10+ */
1084 if (strategy & BIT(5)) {
1085 disable_hdr10_info(&prxcap->hdr_info);
xiang.wu114497ab2024-02-21 14:57:05 +08001086 disable_hdr10p_info(&prxcap->hdr_info.hdr10plus_info);
Wenjie Qiao4bdbbee2024-02-01 10:16:44 +08001087 } else {
1088 enable_hdr10_info(&prxcap->hdr_info, NULL);
xiang.wu114497ab2024-02-21 14:57:05 +08001089 enable_hdr10p_info(&prxcap->hdr_info.hdr10plus_info, NULL);
Wenjie Qiao4bdbbee2024-02-01 10:16:44 +08001090 }
1091 /* bit6: 1 disable hlg 0 enable hlg */
1092 if (strategy & BIT(6))
1093 disable_hlg_info(&prxcap->hdr_info);
1094 else
1095 enable_hlg_info(&prxcap->hdr_info, NULL);
1096}
1097
1098static int hdmitx_set_hdr_priority(struct rx_cap *prxcap, u32 hdr_priority)
1099{
1100 u32 choose = 0;
1101 u32 strategy = 0;
1102
1103 if (!prxcap)
1104 return -1;
1105
1106 printf("%s, set hdr_prio: %u\n", __func__, hdr_priority);
1107 /* choose strategy: bit[31:28] */
1108 choose = (hdr_priority >> 28) & 0xf;
1109 switch (choose) {
1110 case 0:
1111 strategy = hdr_priority & 0xf;
1112 update_hdr_strategy1(prxcap, strategy);
1113 break;
1114 case 1:
1115 strategy = hdr_priority & 0xf0;
1116 update_hdr_strategy2(prxcap, strategy);
1117 break;
1118 default:
1119 break;
1120 }
1121 return 0;
1122}
1123
Wenjie Qiao8a73a562023-02-23 18:37:14 +08001124static void get_parse_edid_data(struct hdmitx_dev *hdev)
1125{
Wenjie Qiao4bdbbee2024-02-01 10:16:44 +08001126 int hdr_priority = get_hdr_strategy_priority();
Wenjie Qiao8a73a562023-02-23 18:37:14 +08001127
1128 hdev->hwop.read_edid(hdev->rawedid);
1129
ruofei.zhao4a2ec0c2023-10-31 19:24:41 +08001130 /* dump edid raw data */
1131 dump_full_edid(hdev->rawedid);
Wenjie Qiao8a73a562023-02-23 18:37:14 +08001132
1133 /* parse edid data */
xiang.wu114497ab2024-02-21 14:57:05 +08001134 hdmitx_edid_parse(&hdev->RXCap, hdev->rawedid);
Wenjie Qiao8a73a562023-02-23 18:37:14 +08001135
Wenjie Qiao4bdbbee2024-02-01 10:16:44 +08001136 if (hdr_priority == -1)
Wenjie Qiao8a73a562023-02-23 18:37:14 +08001137 return;
Wenjie Qiao4bdbbee2024-02-01 10:16:44 +08001138 hdmitx_set_hdr_priority(&hdev->RXCap, hdr_priority);
Wenjie Qiao8a73a562023-02-23 18:37:14 +08001139}
1140
1141/* policy process: to find the output mode/attr/dv_type */
1142void scene_process(struct hdmitx_dev *hdev,
1143 struct scene_output_info *scene_output_info)
1144{
1145 struct input_hdmi_data hdmidata;
1146
1147 if (!hdev || !scene_output_info)
1148 return;
1149 /* 1.read dolby vision mode from prop(maybe need to env) */
1150 memset(&hdmidata, 0, sizeof(struct input_hdmi_data));
1151 get_hdmi_data(hdev, &hdmidata);
1152
1153 /* 2. dolby vision scene process */
1154 /* only for tv support dv and box enable dv */
Wenjie Qiao389d3ea2023-05-25 16:07:03 +08001155 if (is_dv_preference(hdev)) {
Wenjie Qiao8a73a562023-02-23 18:37:14 +08001156 dolbyvision_scene_process(&hdmidata, scene_output_info);
1157 } else if (is_dolby_enabled()) {
1158 /* for enable dolby vision core when
1159 * first boot connecting non dv tv
1160 * NOTE: let systemcontrol to enable DV core
1161 */
1162 /* scene_output_info->final_dv_type = DOLBY_VISION_ENABLE; */
1163 } else {
1164 /* for UI disable dolby vision core and boot keep the status
1165 * NOTE: TBD if need to disable DV here
1166 */
1167 /* scene_output_info->final_dv_type = DOLBY_VISION_DISABLE; */
1168 }
1169 /* 3.sdr scene process */
1170 /* decide final display mode and deepcolor */
Wenjie Qiao389d3ea2023-05-25 16:07:03 +08001171 if (is_dv_preference(hdev)) {
1172 /* do nothing
1173 * already done above, just sync with sysctrl
1174 */
1175 } else if (is_hdr_preference(hdev)) {
1176 hdr_scene_process(&hdmidata, scene_output_info);
1177 } else {
Wenjie Qiao8a73a562023-02-23 18:37:14 +08001178 sdr_scene_process(&hdmidata, scene_output_info);
Wenjie Qiao389d3ea2023-05-25 16:07:03 +08001179 }
1180 /* not find outputmode and use default mode */
1181 if (strlen(scene_output_info->final_displaymode) == 0)
1182 strcpy(scene_output_info->final_displaymode, DEFAULT_HDMI_MODE);
1183 /* not find color space and use default mode */
1184 if (!strstr(scene_output_info->final_deepcolor, "bit"))
1185 strcpy(scene_output_info->final_deepcolor, DEFAULT_COLOR_FORMAT);
Wenjie Qiao8a73a562023-02-23 18:37:14 +08001186}
1187
1188static int do_get_parse_edid(cmd_tbl_t *cmdtp, int flag, int argc, char *const argv[])
1189{
1190 struct hdmitx_dev *hdev = get_hdmitx21_device();
1191 unsigned char *edid = hdev->rawedid;
1192 unsigned char *store_checkvalue;
1193
xiang.wu114497ab2024-02-21 14:57:05 +08001194 memset(edid, 0, EDID_BLK_SIZE * EDID_MAX_BLOCK);
Wenjie Qiao8a73a562023-02-23 18:37:14 +08001195 unsigned int i;
1196 unsigned int checkvalue[4];
1197 unsigned int checkvalue1;
1198 unsigned int checkvalue2;
1199 char checksum[11];
1200 unsigned char def_cksum[] = {'0', 'x', '0', '0', '0', '0', '0', '0', '0', '0', '\0'};
1201 char *hdmimode;
1202 char *colorattribute;
xiang.wu1a6d6f1d2023-08-04 14:13:00 +08001203 int user_dv_mode;
1204 char *last_output_mode;
1205 char *last_colorattribute;
1206 int last_dv_status;
1207 bool over_write = false;
Wenjie Qiao8a73a562023-02-23 18:37:14 +08001208 char dv_type[2] = {0};
1209 struct scene_output_info scene_output_info;
Wenjie Qiao389d3ea2023-05-25 16:07:03 +08001210 struct hdmi_format_para *para = NULL;
1211 bool mode_support = false;
1212 /* hdmi_mode / colorattribute may be null or "none".
1213 * if either is null or "none", it means user not
1214 * selected manually, and need to select the best
1215 * mode or colorattribute by policy
1216 */
1217 bool no_manual_output = false;
Wenjie Qiao8a73a562023-02-23 18:37:14 +08001218
Wenjie Qiao4bdbbee2024-02-01 10:16:44 +08001219 if (!hdev->hpd_state) {
Wenjie Qiao8a73a562023-02-23 18:37:14 +08001220 printf("HDMI HPD low, no need parse EDID\n");
1221 return 1;
1222 }
1223 memset(&scene_output_info, 0, sizeof(struct scene_output_info));
1224
1225 get_parse_edid_data(hdev);
1226
1227 /* check if the tv has changed or anything wrong */
1228 store_checkvalue = (unsigned char *)env_get("hdmichecksum");
Wenjie Qiao389d3ea2023-05-25 16:07:03 +08001229 /* get user selected output mode/color */
1230 colorattribute = env_get("user_colorattribute");
Wenjie Qiao8a73a562023-02-23 18:37:14 +08001231 hdmimode = env_get("hdmimode");
xiang.wu1a6d6f1d2023-08-04 14:13:00 +08001232 user_dv_mode = get_ubootenv_dv_type();
1233
1234 last_output_mode = env_get("outputmode");
1235 last_colorattribute = env_get("colorattribute");
1236 last_dv_status = get_ubootenv_dv_status();
Wenjie Qiao8a73a562023-02-23 18:37:14 +08001237 if (!store_checkvalue)
1238 store_checkvalue = def_cksum;
1239
xiang.wu1a6d6f1d2023-08-04 14:13:00 +08001240 printf("read hdmichecksum: %s, user hdmimode: %s, colorattribute: %s, dv_type: %d\n",
Wenjie Qiao389d3ea2023-05-25 16:07:03 +08001241 store_checkvalue, hdmimode ? hdmimode : "null",
xiang.wu1a6d6f1d2023-08-04 14:13:00 +08001242 colorattribute ? colorattribute : "null", user_dv_mode);
Wenjie Qiao8a73a562023-02-23 18:37:14 +08001243
1244 for (i = 0; i < 4; i++) {
1245 if (('0' <= store_checkvalue[i * 2 + 2]) && (store_checkvalue[i * 2 + 2] <= '9'))
1246 checkvalue1 = store_checkvalue[i * 2 + 2] - '0';
1247 else
1248 checkvalue1 = store_checkvalue[i * 2 + 2] - 'W';
1249 if (('0' <= store_checkvalue[i * 2 + 3]) && (store_checkvalue[i * 2 + 3] <= '9'))
1250 checkvalue2 = store_checkvalue[i * 2 + 3] - '0';
1251 else
1252 checkvalue2 = store_checkvalue[i * 2 + 3] - 'W';
1253 checkvalue[i] = checkvalue1 * 16 + checkvalue2;
1254 }
1255
1256 if (checkvalue[0] != hdev->rawedid[0x7f] ||
1257 checkvalue[1] != hdev->rawedid[0xff] ||
1258 checkvalue[2] != hdev->rawedid[0x17f] ||
1259 checkvalue[3] != hdev->rawedid[0x1ff]) {
1260 hdev->RXCap.edid_changed = 1;
1261
1262 checksum[0] = '0';
1263 checksum[1] = 'x';
1264 for (i = 0; i < 4; i++)
1265 xtochar(0x80 * i + 0x7f, &checksum[2 * i + 2]);
1266 checksum[10] = '\0';
xiang.wu114497ab2024-02-21 14:57:05 +08001267 memcpy(hdev->RXCap.hdmichecksum, checksum, 10);
Wenjie Qiao389d3ea2023-05-25 16:07:03 +08001268 printf("TV has changed, now crc: %s\n", checksum);
Wenjie Qiao8a73a562023-02-23 18:37:14 +08001269 } else {
xiang.wu114497ab2024-02-21 14:57:05 +08001270 memcpy(hdev->RXCap.hdmichecksum, store_checkvalue, 10);
1271 printf("TV is same, checksum: %s\n", hdev->RXCap.hdmichecksum);
Wenjie Qiao8a73a562023-02-23 18:37:14 +08001272 }
1273
Wenjie Qiao389d3ea2023-05-25 16:07:03 +08001274 /* check user have selected both mode/color or not */
1275 if (!hdmimode || !strcmp(hdmimode, "none") ||
1276 !colorattribute || !strcmp(colorattribute, "none"))
1277 no_manual_output = true;
1278 else
1279 no_manual_output = false;
1280
1281 if (!no_manual_output) {
1282 /* check current user selected mode + color support or not */
1283 para = hdmitx21_get_fmtpara(hdmimode, colorattribute);
xiang.wu1a6d6f1d2023-08-04 14:13:00 +08001284 if (hdmitx_edid_check_valid_mode(hdev, para)) {
Wenjie Qiao389d3ea2023-05-25 16:07:03 +08001285 mode_support = true;
xiang.wu1a6d6f1d2023-08-04 14:13:00 +08001286 } else {
1287 printf("saved output mode not supported!\n");
Wenjie Qiao389d3ea2023-05-25 16:07:03 +08001288 mode_support = false;
xiang.wu1a6d6f1d2023-08-04 14:13:00 +08001289 }
1290
1291 /* if user selected mode/color/dv type which saved in ubootenv of
1292 * hdmimode/user_colorattribute/user_prefer_dv_type are different
1293 * with last actual output mode/color/dv type which saved in
1294 * ubootenv of outputmode/colorattribute/dolby_status, then it means
1295 * that the user selected format is over-writen by policy(for example:
1296 * firstly user has selected HDR priority to HDR, and select color
1297 * to rgb,12bit(now the "user_colorattribute" env will be "rgb,12bit"),
1298 * but then it selected HDR priority to DV, the actual output color
1299 * will be "444,8bit" or "422,12bit" according to dv type, and
1300 * the ubootenv "colorattribute" will be "444,8bit" or "422,12bit"),
1301 * then uboot should use the policy to select the output format,
1302 * otherwise, uboot use hdmimode/user_colorattribute/user_prefer_dv_type
1303 * env, while system use outputmode/colorattribute/dolby_status env,
1304 * there will be always a mode change during bootup
1305 */
1306 if (mode_support) {
1307 /* note that for T7 multi-display, it may store panel in
1308 * "outputmode" env, and will always run uboot policy
1309 */
1310 if (!last_output_mode || strcmp(hdmimode, last_output_mode))
1311 over_write = true;
1312 else if (!last_colorattribute ||
1313 strcmp(colorattribute, last_colorattribute))
1314 over_write = true;
1315 else if (user_dv_mode != last_dv_status)
1316 over_write = true;
1317 else
1318 over_write = false;
1319
1320 if (over_write)
1321 printf("last output_mode:%s, colorattribute:%s, dolby_status:%d\n",
1322 last_output_mode ? last_output_mode : "null",
1323 last_colorattribute ? last_colorattribute : "null",
1324 last_dv_status);
1325 }
Wenjie Qiao389d3ea2023-05-25 16:07:03 +08001326 }
Wenjie Qiao4bdbbee2024-02-01 10:16:44 +08001327 /* 4 cases need to decide output by uboot mode select policy:
Wenjie Qiao389d3ea2023-05-25 16:07:03 +08001328 * 1.TV changed
1329 * 2.either hdmimode or colorattribute is NULL or "none",
1330 * which means that user have not selected mode or colorattribute,
1331 * and need to select the auto best mode or best colorattribute.
1332 * 3.user selected mode not supportted by uboot (probably
1333 * means mode select policy or edid parse between sysctrl and
1334 * uboot have some gap), then need to find proper output mode
1335 * with uboot policy.
Wenjie Qiao4bdbbee2024-02-01 10:16:44 +08001336 * 4.user selected mode is over writen by system policy
Wenjie Qiao389d3ea2023-05-25 16:07:03 +08001337 */
xiang.wu1a6d6f1d2023-08-04 14:13:00 +08001338 if (hdev->RXCap.edid_changed || no_manual_output || !mode_support || over_write) {
Wenjie Qiao8a73a562023-02-23 18:37:14 +08001339 /* find proper mode if EDID changed */
1340 scene_process(hdev, &scene_output_info);
xiang.wu114497ab2024-02-21 14:57:05 +08001341 env_set("hdmichecksum", hdev->RXCap.hdmichecksum);
1342 if (hdmitx_edid_check_data_valid(0, hdev->rawedid)) {
Wenjie Qiao8a73a562023-02-23 18:37:14 +08001343 /* SWPL-34712: if EDID parsing error case, not save env,
1344 * only output default mode(480p,RGB,8bit). after
1345 * EDID read OK, systemcontrol will recover the hdmi
1346 * mode from env, to avoid keep the default hdmi output
1347 */
Wenjie Qiao389d3ea2023-05-25 16:07:03 +08001348 memcpy(sel_hdmimode, scene_output_info.final_displaymode,
1349 sizeof(scene_output_info.final_displaymode));
Wenjie Qiao8a73a562023-02-23 18:37:14 +08001350 if (is_hdmi_mode(env_get("outputmode"))) {
1351 env_set("outputmode",
1352 scene_output_info.final_displaymode);
1353 } else if (is_hdmi_mode(env_get("outputmode2"))) {
1354 env_set("outputmode2",
1355 scene_output_info.final_displaymode);
1356 } else if (is_hdmi_mode(env_get("outputmode3"))) {
1357 env_set("outputmode3",
1358 scene_output_info.final_displaymode);
1359 }
1360 env_set("colorattribute",
1361 scene_output_info.final_deepcolor);
1362 /* if change from DV TV to HDR/SDR TV, don't change
1363 * DV status to disabled, as DV core need to be enabled.
xiang.wu1a6d6f1d2023-08-04 14:13:00 +08001364 * that's to say connect DV TV & output DV-> power down box ->
1365 * connect HDR/SDR TV -> power on box, the dolby_status
1366 * will keep the same as that when connect DV TV under follow sink.
Wenjie Qiao8a73a562023-02-23 18:37:14 +08001367 */
xiang.wu1a6d6f1d2023-08-04 14:13:00 +08001368 if (scene_output_info.final_dv_type != get_ubootenv_dv_status() &&
Wenjie Qiao8a73a562023-02-23 18:37:14 +08001369 scene_output_info.final_dv_type != DOLBY_VISION_DISABLE) {
1370 sprintf(dv_type, "%d", scene_output_info.final_dv_type);
1371 env_set("dolby_status", dv_type);
1372 /* according to the policy of systemcontrol,
1373 * if current DV mode is not supported by TV
1374 * EDID, DV type maybe changed to one witch
1375 * TV support, and need VPP/DV module to
1376 * update new DV output mode.
1377 */
xiang.wu1a6d6f1d2023-08-04 14:13:00 +08001378 printf("update dolby_status: %d\n",
Wenjie Qiao8a73a562023-02-23 18:37:14 +08001379 scene_output_info.final_dv_type);
1380 }
Wenjie Qiao389d3ea2023-05-25 16:07:03 +08001381 } else {
1382 save_default_720p();
Wenjie Qiao8a73a562023-02-23 18:37:14 +08001383 }
Wenjie Qiao389d3ea2023-05-25 16:07:03 +08001384 printf("update outputmode: %s\n", sel_hdmimode);
Wenjie Qiao8a73a562023-02-23 18:37:14 +08001385 printf("update colorattribute: %s\n", env_get("colorattribute"));
1386 printf("update hdmichecksum: %s\n", env_get("hdmichecksum"));
Wenjie Qiao389d3ea2023-05-25 16:07:03 +08001387 } else {
1388 memset(sel_hdmimode, 0, sizeof(sel_hdmimode));
1389 memcpy(sel_hdmimode, hdmimode, strlen(hdmimode));
1390 if (is_hdmi_mode(env_get("outputmode")))
1391 env_set("outputmode", hdmimode);
1392 else if (is_hdmi_mode(env_get("outputmode2")))
1393 env_set("outputmode2", hdmimode);
1394 else if (is_hdmi_mode(env_get("outputmode3")))
1395 env_set("outputmode3", hdmimode);
1396 env_set("colorattribute", colorattribute);
Wenjie Qiao8a73a562023-02-23 18:37:14 +08001397 }
xiang.wu1a6d6f1d2023-08-04 14:13:00 +08001398 env_set("save_outputmode", sel_hdmimode);
1399 /* ubootenv dolby_status is used for is_dv_preference() decision,
1400 * system_control save current dv output status in it.
1401 * it will be used by dv module later to decide DV output later.
1402 * if currently adaptive hdr, then we should set dolby_status to
1403 * 0, so that DV module won't enable DV.
1404 */
1405 if (get_hdr_policy() == 1)
1406 env_set("dolby_status", 0);
Wenjie Qiao389d3ea2023-05-25 16:07:03 +08001407 hdev->para = hdmitx21_get_fmtpara(sel_hdmimode, env_get("colorattribute"));
Wenjie Qiao8a73a562023-02-23 18:37:14 +08001408 hdev->vic = hdev->para->timing.vic;
1409 hdmitx_mask_rx_info(hdev);
Wenjie Qiao4bdbbee2024-02-01 10:16:44 +08001410 hdmitx21_select_frl(hdev);
1411 return 0;
1412}
1413
1414static int do_dsc_policy(cmd_tbl_t *cmdtp, int flag, int argc, char *const argv[])
1415{
1416 struct hdmitx_dev *hdev = get_hdmitx21_device();
1417
1418 if (argc < 1)
1419 return cmd_usage(cmdtp);
1420
1421 if (strcmp(argv[1], "0") == 0)
1422 hdev->dsc_policy = 0;
1423 else if (strcmp(argv[1], "1") == 0)
1424 hdev->dsc_policy = 1;
1425 else if (strcmp(argv[1], "2") == 0)
1426 hdev->dsc_policy = 2;
1427 else if (strcmp(argv[1], "3") == 0)
1428 hdev->dsc_policy = 3;
1429 else if (strcmp(argv[1], "4") == 0)
1430 hdev->dsc_policy = 4;
1431 else
1432 printf("note: please set dsc policy as 0~4\n");
1433 if (hdev->dsc_policy <= 4)
1434 printf("use dsc policy: %d\n", hdev->dsc_policy);
1435
1436 return CMD_RET_SUCCESS;
1437}
1438
1439static int do_manual_frl_rate(cmd_tbl_t *cmdtp, int flag, int argc, char *const argv[])
1440{
1441 struct hdmitx_dev *hdev = get_hdmitx21_device();
1442 unsigned int temp = 0;
1443 char *ptr;
1444
1445 /* if rx don't support FRL, return */
1446 if (!hdev->RXCap.max_frl_rate) {
1447 printf("rx not support FRL\n");
1448 return 0;
1449 }
1450
1451 temp = strtoul(argv[1], &ptr, 16);
1452 /* forced FRL rate setting */
1453 if (temp <= 6) {
1454 hdev->manual_frl_rate = temp;
1455 pr_info("force set frl_rate as %d\n", hdev->manual_frl_rate);
1456 } else {
1457 pr_info("error: should set frl_rate in 0 ~ 6\n");
1458 }
1459 if (hdev->manual_frl_rate > hdev->RXCap.max_frl_rate)
1460 pr_info("warning: larger than rx max_frl_rate %d\n", hdev->RXCap.max_frl_rate);
1461 return 0;
1462}
1463
1464static int do_manual_dfm_type(cmd_tbl_t *cmdtp, int flag, int argc, char *const argv[])
1465{
1466 struct hdmitx_dev *hdev = get_hdmitx21_device();
1467 unsigned int temp = 0;
1468 char *ptr;
1469
1470 temp = strtoul(argv[1], &ptr, 10);
1471 /* forced dfm_type setting */
1472 if (temp <= 2) {
1473 hdev->dfm_type = temp;
1474 pr_info("force set dfm_type as %d\n", hdev->dfm_type);
1475 } else {
1476 pr_info("error: should set frl_rate in 0 ~ 2\n");
1477 }
Wenjie Qiao8a73a562023-02-23 18:37:14 +08001478 return 0;
1479}
1480
Wenjie Qiao77833902023-12-18 19:01:59 +08001481#ifdef CONFIG_EFUSE_OBJ_API
1482static int do_efuse_show(cmd_tbl_t *cmdtp, int flag, int argc, char *const argv[])
1483{
1484 struct hdmitx_dev *hdev = get_hdmitx21_device();
1485
1486 get_hdmi_efuse(hdev);
1487 pr_info("FEAT_DISABLE_HDMI_60HZ = %d\n", hdev->efuse_dis_hdmi_4k60);
1488 pr_info("FEAT_DISABLE_OUTPUT_4K = %d\n", hdev->efuse_dis_output_4k);
1489 pr_info("FEAT_DISABLE_HDCP_TX_22 = %d\n", hdev->efuse_dis_hdcp_tx22);
1490 pr_info("FEAT_DISABLE_HDMI_TX_3D = %d\n", hdev->efuse_dis_hdmi_tx3d);
1491 pr_info("FEAT_DISABLE_HDMI = %d\n", hdev->efuse_dis_hdcp_tx14);
1492
1493 return 0;
1494}
1495#endif
1496
Wenjie Qiao8a73a562023-02-23 18:37:14 +08001497static cmd_tbl_t cmd_hdmi_sub[] = {
1498 U_BOOT_CMD_MKENT(hpd, 1, 1, do_hpd_detect, "", ""),
1499 U_BOOT_CMD_MKENT(edid, 3, 1, do_edid, "", ""),
1500 U_BOOT_CMD_MKENT(rx_det, 1, 1, do_rx_det, "", ""),
1501 U_BOOT_CMD_MKENT(output, 3, 1, do_output, "", ""),
1502 U_BOOT_CMD_MKENT(clkmsr, 3, 1, do_clkmsr, "", ""),
1503 U_BOOT_CMD_MKENT(blank, 3, 1, do_blank, "", ""),
1504 U_BOOT_CMD_MKENT(off, 1, 1, do_off, "", ""),
1505 U_BOOT_CMD_MKENT(dump, 1, 1, do_dump, "", ""),
1506 U_BOOT_CMD_MKENT(info, 1, 1, do_info, "", ""),
Wenjie Qiao8a73a562023-02-23 18:37:14 +08001507 U_BOOT_CMD_MKENT(reg, 3, 1, do_reg, "", ""),
1508 U_BOOT_CMD_MKENT(get_parse_edid, 1, 1, do_get_parse_edid, "", ""),
Wenjie Qiao4bdbbee2024-02-01 10:16:44 +08001509 U_BOOT_CMD_MKENT(dsc_policy, 1, 1, do_dsc_policy, "", ""),
1510 U_BOOT_CMD_MKENT(frl_rate, 1, 1, do_manual_frl_rate, "", ""),
1511 U_BOOT_CMD_MKENT(dfm_type, 1, 1, do_manual_dfm_type, "", ""),
Wenjie Qiao77833902023-12-18 19:01:59 +08001512#ifdef CONFIG_EFUSE_OBJ_API
1513 U_BOOT_CMD_MKENT(efuse, 1, 1, do_efuse_show, "", ""),
1514#endif
xiang.wu1a6d6f1d2023-08-04 14:13:00 +08001515 U_BOOT_CMD_MKENT(pbist, 3, 1, do_pbist, "", ""),
1516 U_BOOT_CMD_MKENT(debug, 3, 1, do_debug, "", ""),
xiang.wu1492f3642024-01-08 14:06:40 +08001517 U_BOOT_CMD_MKENT(s7_clk_config, 3, 1, do_s7_clk_config, "", ""),
xiang.wu114497ab2024-02-21 14:57:05 +08001518 U_BOOT_CMD_MKENT(get_rterm, 3, 1, get_rterm, "", ""),
Wenjie Qiao8a73a562023-02-23 18:37:14 +08001519};
1520
1521static int do_hdmitx(cmd_tbl_t *cmdtp, int flag, int argc, char *const argv[])
1522{
1523 cmd_tbl_t *c;
1524
1525 if (argc < 2)
1526 return cmd_usage(cmdtp);
1527
1528 argc--;
1529 argv++;
1530
1531 c = find_cmd_tbl(argv[0], &cmd_hdmi_sub[0], ARRAY_SIZE(cmd_hdmi_sub));
1532
1533 if (c)
1534 return c->cmd(cmdtp, flag, argc, argv);
1535 else
1536 return cmd_usage(cmdtp);
1537}
1538
1539U_BOOT_CMD(hdmitx, CONFIG_SYS_MAXARGS, 0, do_hdmitx,
1540 "HDMITX sub-system",
1541 "hdmitx version:20200618\n"
1542 "hdmitx hpd\n"
1543 " Detect hdmi rx plug-in\n"
Wenjie Qiao8a73a562023-02-23 18:37:14 +08001544 "hdmitx output [list | FORMAT | bist PATTERN]\n"
1545 " list: list support formats\n"
1546 " FORMAT can be 720p60/50hz, 1080i60/50hz, 1080p60hz, etc\n"
1547 " extend with 8bits/10bits, y444/y422/y420/rgb\n"
1548 " such as 2160p60hz,10bits,y420\n"
1549 " PATTERN: can be as: line, dot, off, or 1920(width)\n"
1550 "hdmitx blank [0|1]\n"
1551 " 1: output blank 0: output normal\n"
1552 "hdmitx clkmsr\n"
1553 " show hdmitx clocks\n"
1554 "hdmitx off\n"
1555 " Turn off hdmitx output\n"
1556 "hdmitx info\n"
1557 " current mode info\n"
1558 "hdmitx rx_det\n"
1559 " Auto detect if RX is FBC and set outputmode\n"
1560);
1561
1562struct hdr_info *hdmitx_get_rx_hdr_info(void)
1563{
1564 struct hdmitx_dev *hdev = get_hdmitx21_device();
1565
1566 return &hdev->RXCap.hdr_info;
1567}
Wenjie Qiao4bdbbee2024-02-01 10:16:44 +08001568
1569static int do_list_dsc_mode(cmd_tbl_t *cmdtp, int flag, int argc, char *const argv[])
1570{
1571#ifdef CONFIG_AML_DSC_ENC
1572 dsc_enc_cap_show();
1573#endif
1574 return 0;
1575}
1576
1577static int do_dsc_debug(cmd_tbl_t *cmdtp, int flag, int argc, char *const argv[])
1578{
1579#ifdef CONFIG_AML_DSC_ENC
1580 dsc_debug(argc - 1, argv + 1);
1581#endif
1582 return 0;
1583}
1584
1585static cmd_tbl_t cmd_dsc_sub[] = {
1586 U_BOOT_CMD_MKENT(list_mode, 1, 1, do_list_dsc_mode, "", ""),
1587 U_BOOT_CMD_MKENT(dbg, 20, 1, do_dsc_debug, "", ""),
1588};
1589
1590static int do_dsc_enc(cmd_tbl_t *cmdtp, int flag, int argc, char *const argv[])
1591{
1592 cmd_tbl_t *c;
1593
1594 if (argc < 2)
1595 return cmd_usage(cmdtp);
1596
1597 argc--;
1598 argv++;
1599
1600 c = find_cmd_tbl(argv[0], &cmd_dsc_sub[0], ARRAY_SIZE(cmd_dsc_sub));
1601
1602 if (c)
1603 return c->cmd(cmdtp, flag, argc, argv);
1604 else
1605 return cmd_usage(cmdtp);
1606}
1607
1608U_BOOT_CMD(dsc, CONFIG_SYS_MAXARGS, 0, do_dsc_enc,
1609 "dsc cmd",
1610 "dsc help function\n"
1611 "dsc dbg state\n"
1612 " dump dsc status\n"
1613 "dsc dbg dump_reg\n"
1614 " dump dsc registers and venc registers\n"
1615 "dsc dbg read addr\n"
1616 " read dsc asic register\n"
1617 "dsc dbg write addr value\n"
1618 " write dsc asic register\n"
1619 "dsc dbg rst_dsc\n"
1620 " reset dsc enc\n"
1621 "dsc list_mode\n"
1622 " show supported dsc encode mode list\n"
1623);
1624