blob: 2d084e3ac33e47a0685fc3f1e4dde6ca149b796e [file] [log] [blame]
Bo Lv72d0e902023-01-02 14:27:34 +00001/* SPDX-License-Identifier: (GPL-2.0+ OR MIT) */
2/*
3 * Copyright (c) 2023 Amlogic, Inc. All rights reserved.
4 */
5
6#define MESON_CPU_MAJOR_ID_M6 0x16
7#define MESON_CPU_MAJOR_ID_M6TV 0x17
8#define MESON_CPU_MAJOR_ID_M6TVL 0x18
9#define MESON_CPU_MAJOR_ID_M8 0x19
10#define MESON_CPU_MAJOR_ID_MTVD 0x1A
11#define MESON_CPU_MAJOR_ID_M8B 0x1B
12#define MESON_CPU_MAJOR_ID_MG9TV 0x1C
13#define MESON_CPU_MAJOR_ID_M8M2 0x1D
14#define MESON_CPU_MAJOR_ID_GXBB 0x1F
15#define MESON_CPU_MAJOR_ID_GXTVBB 0x20
16#define MESON_CPU_MAJOR_ID_GXL 0x21
17#define MESON_CPU_MAJOR_ID_GXM 0x22
18#define MESON_CPU_MAJOR_ID_TXL 0x23
19#define MESON_CPU_MAJOR_ID_TXLX 0x24
20#define MESON_CPU_MAJOR_ID_AXG 0x25
21#define MESON_CPU_MAJOR_ID_GXLX 0x26
22#define MESON_CPU_MAJOR_ID_TXHD 0x27
23#define MESON_CPU_MAJOR_ID_G12A 0x28
24#define MESON_CPU_MAJOR_ID_G12B 0x29
25#define MESON_CPU_MAJOR_ID_SM1 0x2B
26#define MESON_CPU_MAJOR_ID_A1 0x2C
27#define MESON_CPU_MAJOR_ID_TL1 0x2E
28#define MESON_CPU_MAJOR_ID_TM2 0x2F
29#define MESON_CPU_MAJOR_ID_C1 0x30
30#define MESON_CPU_MAJOR_ID_SC2 0x32
31#define MESON_CPU_MAJOR_ID_C2 0x33
32#define MESON_CPU_MAJOR_ID_T5 0x34
33#define MESON_CPU_MAJOR_ID_T5D 0x35
34#define MESON_CPU_MAJOR_ID_T7 0x36
35#define MESON_CPU_MAJOR_ID_S4 0x37
36#define MESON_CPU_MAJOR_ID_T3 0x38
Bo Lv6101ca72023-04-11 20:32:09 +080037#define MESON_CPU_MAJOR_ID_P1 0x39
Bo Lv72d0e902023-01-02 14:27:34 +000038#define MESON_CPU_MAJOR_ID_S4D 0x3A
39#define MESON_CPU_MAJOR_ID_T5W 0x3B
40#define MESON_CPU_MAJOR_ID_C3 0x3D
41#define MESON_CPU_MAJOR_ID_S5 0x3E
hai.cao3351d4f2023-06-19 13:33:54 +080042#define MESON_CPU_MAJOR_ID_A4 0x40
Bo Lv72d0e902023-01-02 14:27:34 +000043#define MESON_CPU_MAJOR_ID_T5M 0x41
Huijuan Xiaobc39cb62024-03-21 06:58:33 +000044#define MESON_CPU_MAJOR_ID_T3X 0x42
45#define MESON_CPU_MAJOR_ID_TXHD2 0x44
Bo Lv6101ca72023-04-11 20:32:09 +080046#define MESON_CPU_MAJOR_ID_S1A 0x45
yuhua.lind32946a2023-08-03 11:11:15 +080047#define MESON_CPU_MAJOR_ID_S7 0x46
hai.caod7bc49b2023-11-28 14:40:29 +080048#define MESON_CPU_MAJOR_ID_S7D 0x47
Bo Lv72d0e902023-01-02 14:27:34 +000049
50#define MESON_CPU_PACKAGE_ID_905D 0X00
51#define MESON_CPU_PACKAGE_ID_905M 0x20
52#define MESON_CPU_PACKAGE_ID_905X 0X80
53#define MESON_CPU_PACKAGE_ID_905L 0XC0
54#define MESON_CPU_PACKAGE_ID_905M2 0XE0
55
56#define MESON_CPU_PACKAGE_ID_T962X 0x10
57#define MESON_CPU_PACKAGE_ID_T962E 0x20
58
59#define MESON_CPU_PACKAGE_ID_A113X 0x37
60#define MESON_CPU_PACKAGE_ID_A113D 0xD0
61
62#define MESON_CPU_CHIP_REVISION_A 0xA
63#define MESON_CPU_CHIP_REVISION_B 0xB
64#define MESON_CPU_CHIP_REVISION_C 0xC
65#define MESON_CPU_CHIP_REVISION_D 0xD
66
67typedef struct cpu_id {
68 unsigned int family_id:8;
69 unsigned int package_id:8;
70 unsigned int chip_rev:8; //RevA/RevB etc.
71 unsigned int reserve:4;
72 unsigned int layout_ver:4;
73} cpu_id_t;
74
75typedef struct chip_id {
76 unsigned int version;
77 unsigned char chipid[16];
78} chip_id_t;
79
80cpu_id_t get_cpu_id(void);
81
82extern chip_id_t aml_chip_id;
83int get_chip_id(unsigned char *buff, unsigned int size);
84
85/**
86 * TODO: Remove this API after move static system information to RO
87 * register or SRAM
88 *
89 * Should *NOT* call this API directly, always use get_chip_id()
90 */
91int __get_chip_id(unsigned char *buff, unsigned int size);