Wenjie Qiao | 8a73a56 | 2023-02-23 18:37:14 +0800 | [diff] [blame] | 1 | // SPDX-License-Identifier: (GPL-2.0+ OR MIT) |
| 2 | /* |
| 3 | * Copyright (c) 2019 Amlogic, Inc. All rights reserved. |
| 4 | */ |
| 5 | |
| 6 | #include <common.h> |
| 7 | #include <command.h> |
| 8 | #include <env.h> |
| 9 | #include <malloc.h> |
| 10 | #include <asm/byteorder.h> |
| 11 | #include <amlogic/clk_measure.h> |
| 12 | #include <amlogic/media/vout/hdmitx21/hdmitx.h> |
Wenjie Qiao | 389d3ea | 2023-05-25 16:07:03 +0800 | [diff] [blame] | 13 | #include <linux/delay.h> |
Wenjie Qiao | 4bdbbee | 2024-02-01 10:16:44 +0800 | [diff] [blame] | 14 | #include <image.h> |
Wenjie Qiao | 8a73a56 | 2023-02-23 18:37:14 +0800 | [diff] [blame] | 15 | #include <amlogic/media/dv/dolby_vision.h> |
| 16 | #include <linux/libfdt_env.h> |
Wenjie Qiao | 4bdbbee | 2024-02-01 10:16:44 +0800 | [diff] [blame] | 17 | #include <amlogic/media/vout/dsc.h> |
xiang.wu1 | 14497ab | 2024-02-21 14:57:05 +0800 | [diff] [blame] | 18 | #include <amlogic/media/vout/aml_vinfo.h> |
| 19 | #include <linux/arm-smccc.h> |
Wenjie Qiao | af3ac88 | 2024-05-29 10:12:12 +0800 | [diff] [blame] | 20 | #include <linux/compat.h> |
xiang.wu1 | dc0df26 | 2024-07-22 19:34:22 +0800 | [diff] [blame] | 21 | #include "../../drivers/amlogic/media/vout/hdmitx/hdmitx_common/hdmitx_check_valid.h" |
xiang.wu1 | 8cf0cd1 | 2024-06-13 15:27:52 +0800 | [diff] [blame] | 22 | #include "../../drivers/amlogic/media/vout/hdmitx/hdmitx_common/hdmitx_policy_setting.h" |
xiang.wu1 | 5613f46 | 2024-09-04 17:42:04 +0800 | [diff] [blame] | 23 | #include "../../drivers/amlogic/media/vout/hdmitx/hdmitx_common/hdmitx_compliance.h" |
Wenjie Qiao | 8a73a56 | 2023-02-23 18:37:14 +0800 | [diff] [blame] | 24 | |
| 25 | static unsigned char edid_raw_buf[512] = {0}; |
lizhi.hu | 506ddfa | 2024-07-10 21:35:41 +0800 | [diff] [blame] | 26 | |
| 27 | /* |
| 28 | * there may be outputmode/2/3 when in multi-display case, |
Wenjie Qiao | 389d3ea | 2023-05-25 16:07:03 +0800 | [diff] [blame] | 29 | * sel_hdmimode is used to save the selected hdmi mode |
| 30 | */ |
xiang.wu1 | 8cf0cd1 | 2024-06-13 15:27:52 +0800 | [diff] [blame] | 31 | static char sel_hdmimode[MESON_MODE_LEN] = {0}; |
Wenjie Qiao | 8a73a56 | 2023-02-23 18:37:14 +0800 | [diff] [blame] | 32 | |
| 33 | static void dump_full_edid(const unsigned char *buf) |
| 34 | { |
| 35 | int i; |
| 36 | int blk_no; |
| 37 | |
| 38 | if (!buf) |
| 39 | return; |
| 40 | blk_no = buf[126] + 1; |
| 41 | if (blk_no > 4) |
| 42 | blk_no = 4; |
Wenjie Qiao | 389d3ea | 2023-05-25 16:07:03 +0800 | [diff] [blame] | 43 | |
| 44 | if (blk_no == 2) |
| 45 | if (buf[128 + 4] == 0xe2 && buf[128 + 5] == 0x78) |
| 46 | blk_no = buf[128 + 6] + 1; |
xiang.wu1 | 14497ab | 2024-02-21 14:57:05 +0800 | [diff] [blame] | 47 | if (blk_no > EDID_MAX_BLOCK) |
| 48 | blk_no = EDID_MAX_BLOCK; |
Wenjie Qiao | 389d3ea | 2023-05-25 16:07:03 +0800 | [diff] [blame] | 49 | |
Wenjie Qiao | 8a73a56 | 2023-02-23 18:37:14 +0800 | [diff] [blame] | 50 | printf("dump EDID rawdata\n"); |
| 51 | printf(" "); |
| 52 | for (i = 0; i < blk_no * EDID_BLK_SIZE; i++) |
| 53 | printf("%02x", buf[i]); |
| 54 | printf("\n"); |
| 55 | } |
| 56 | |
Wenjie Qiao | 8a73a56 | 2023-02-23 18:37:14 +0800 | [diff] [blame] | 57 | static int do_rx_det(cmd_tbl_t *cmdtp, int flag, int argc, char *const argv[]) |
| 58 | { |
| 59 | unsigned char st = 0; |
| 60 | struct hdmitx_dev *hdev = get_hdmitx21_device(); |
| 61 | |
| 62 | memset(edid_raw_buf, 0, ARRAY_SIZE(edid_raw_buf)); |
| 63 | |
lizhi.hu | 506ddfa | 2024-07-10 21:35:41 +0800 | [diff] [blame] | 64 | /* |
| 65 | * read edid raw data |
| 66 | * current only support read 1 byte edid data |
| 67 | */ |
Wenjie Qiao | 8a73a56 | 2023-02-23 18:37:14 +0800 | [diff] [blame] | 68 | st = hdev->hwop.read_edid(edid_raw_buf); |
| 69 | |
| 70 | if (st) { |
| 71 | if (edid_raw_buf[250] == 0xfb && edid_raw_buf[251] == 0x0c) { |
| 72 | printf("RX is FBC\n"); |
| 73 | |
lizhi.hu | 506ddfa | 2024-07-10 21:35:41 +0800 | [diff] [blame] | 74 | /* set outputmode ENV */ |
Wenjie Qiao | 8a73a56 | 2023-02-23 18:37:14 +0800 | [diff] [blame] | 75 | switch (edid_raw_buf[252] & 0x0f) { |
| 76 | case 0x0: |
| 77 | run_command("setenv outputmode 1080p50hz", 0); |
| 78 | break; |
| 79 | case 0x1: |
| 80 | run_command("setenv outputmode 2160p50hz420", 0); |
| 81 | break; |
| 82 | case 0x2: |
| 83 | run_command("setenv outputmode 1080p50hz44410bit", 0); |
| 84 | break; |
| 85 | case 0x3: |
| 86 | run_command("setenv outputmode 2160p50hz42010bit", 0); |
| 87 | break; |
| 88 | case 0x4: |
| 89 | run_command("setenv outputmode 2160p50hz42210bit", 0); |
| 90 | break; |
| 91 | case 0x5: |
| 92 | run_command("setenv outputmode 2160p50hz", 0); |
| 93 | break; |
| 94 | default: |
| 95 | run_command("setenv outputmode 1080p50hz", 0); |
| 96 | break; |
| 97 | } |
| 98 | |
lizhi.hu | 506ddfa | 2024-07-10 21:35:41 +0800 | [diff] [blame] | 99 | /* et RX 3D Info */ |
Wenjie Qiao | 8a73a56 | 2023-02-23 18:37:14 +0800 | [diff] [blame] | 100 | switch ((edid_raw_buf[252] >> 4) & 0x0f) { |
| 101 | case 0x00: |
| 102 | run_command("setenv rx_3d_info 0", 0); |
| 103 | break; |
| 104 | case 0x01: |
| 105 | run_command("setenv rx_3d_info 1", 0); |
| 106 | break; |
| 107 | case 0x02: |
| 108 | run_command("setenv rx_3d_info 2", 0); |
| 109 | break; |
| 110 | case 0x03: |
| 111 | run_command("setenv rx_3d_info 3", 0); |
| 112 | break; |
| 113 | case 0x04: |
| 114 | run_command("setenv rx_3d_info 4", 0); |
| 115 | break; |
| 116 | default: |
| 117 | break; |
| 118 | } |
| 119 | |
| 120 | switch (edid_raw_buf[253]) { |
| 121 | case 0x1: |
| 122 | /*TODO*/ |
| 123 | break; |
| 124 | case 0x2: |
| 125 | /*TODO*/ |
| 126 | break; |
| 127 | default: |
| 128 | break; |
| 129 | } |
| 130 | } |
| 131 | } else { |
| 132 | printf("edid read failed\n"); |
| 133 | } |
| 134 | |
| 135 | return st; |
| 136 | } |
| 137 | |
lizhi.hu | 506ddfa | 2024-07-10 21:35:41 +0800 | [diff] [blame] | 138 | int is_valid_hdmi(const char *input) |
| 139 | { |
| 140 | static const char * const valid_hdmi_modes[] = { |
| 141 | "HDMI-A-A", /* venc0 */ |
| 142 | "HDMI-A-B", /* venc1 */ |
| 143 | "HDMI-A-C" /* venc2 */ |
| 144 | }; |
| 145 | |
| 146 | int num_modes = ARRAY_SIZE(valid_hdmi_modes); |
| 147 | int i; |
| 148 | |
| 149 | for (i = 0; i < num_modes; i++) { |
| 150 | if (strcmp(input, valid_hdmi_modes[i]) == 0) |
| 151 | return 1; |
| 152 | } |
| 153 | return 0; |
| 154 | } |
| 155 | |
Wenjie Qiao | 389d3ea | 2023-05-25 16:07:03 +0800 | [diff] [blame] | 156 | static void save_default_720p(void) |
| 157 | { |
| 158 | memcpy(sel_hdmimode, DEFAULT_HDMI_MODE, sizeof(DEFAULT_HDMI_MODE)); |
lizhi.hu | 506ddfa | 2024-07-10 21:35:41 +0800 | [diff] [blame] | 159 | if (is_valid_hdmi(env_get("connector0_type"))) { |
| 160 | env_set("outputmode", DEFAULT_HDMI_MODE); |
| 161 | } else if (is_valid_hdmi(env_get("connector1_type"))) { |
Wenjie Qiao | 389d3ea | 2023-05-25 16:07:03 +0800 | [diff] [blame] | 162 | env_set("outputmode2", DEFAULT_HDMI_MODE); |
lizhi.hu | 506ddfa | 2024-07-10 21:35:41 +0800 | [diff] [blame] | 163 | } else if (is_valid_hdmi(env_get("connector2_type"))) { |
| 164 | env_set("outputmode3", DEFAULT_HDMI_MODE); |
| 165 | } else { |
| 166 | pr_info("no config connectorX_type, save default 720p outputmode\n"); |
| 167 | env_set("outputmode", DEFAULT_HDMI_MODE); |
| 168 | } |
Wenjie Qiao | 389d3ea | 2023-05-25 16:07:03 +0800 | [diff] [blame] | 169 | env_set("colorattribute", DEFAULT_COLOR_FORMAT); |
| 170 | } |
| 171 | |
Wenjie Qiao | 8a73a56 | 2023-02-23 18:37:14 +0800 | [diff] [blame] | 172 | static void hdmitx_mask_rx_info(struct hdmitx_dev *hdev) |
| 173 | { |
Wenjie Qiao | 8a73a56 | 2023-02-23 18:37:14 +0800 | [diff] [blame] | 174 | if (!hdev || !hdev->para) |
| 175 | return; |
| 176 | |
Wenjie Qiao | 389d3ea | 2023-05-25 16:07:03 +0800 | [diff] [blame] | 177 | if (env_get("colorattribute")) |
| 178 | hdmitx21_get_fmtpara(sel_hdmimode, env_get("colorattribute")); |
| 179 | |
lizhi.hu | 506ddfa | 2024-07-10 21:35:41 +0800 | [diff] [blame] | 180 | /* |
| 181 | * when current output color depth is 8bit, mask hdr capability |
| 182 | * refer to SWPL-44445 for more detail |
| 183 | */ |
Wenjie Qiao | 8a73a56 | 2023-02-23 18:37:14 +0800 | [diff] [blame] | 184 | if (hdev->para->cd == COLORDEPTH_24B) |
| 185 | memset(&hdev->RXCap.hdr_info, 0, sizeof(struct hdr_info)); |
| 186 | } |
| 187 | |
lizhi.hu | 506ddfa | 2024-07-10 21:35:41 +0800 | [diff] [blame] | 188 | /* |
zongdong.jiao | b6fa996 | 2024-08-25 19:51:48 +0800 | [diff] [blame] | 189 | * env_get() may return null, so use below to check |
| 190 | * if env0 and env1 are same, return 1; else return 0 |
| 191 | */ |
| 192 | static bool hdmi_cmp_env(const char *env0, const char *env1) |
| 193 | { |
| 194 | if (!env0 && !env1) |
| 195 | return 1; |
| 196 | if (!env0) |
| 197 | return 0; |
| 198 | if (!env1) |
| 199 | return 0; |
| 200 | if (strcmp(env0, env1)) |
| 201 | return 0; |
| 202 | return 1; |
| 203 | } |
| 204 | |
| 205 | #define HDMI_ENV_PARAM_MAX_LEN 32 |
| 206 | static void check_hdmi_env_params(void) |
| 207 | { |
| 208 | static char env_hdmimode[HDMI_ENV_PARAM_MAX_LEN]; |
| 209 | static char env_outputmode[HDMI_ENV_PARAM_MAX_LEN]; |
| 210 | static char env_colorattr[HDMI_ENV_PARAM_MAX_LEN]; |
| 211 | static char env_usercolorattr[HDMI_ENV_PARAM_MAX_LEN]; |
| 212 | char *tmpstr = NULL; |
| 213 | |
| 214 | /* if 4 hdmi environments are not changing, return */ |
| 215 | if ((hdmi_cmp_env(env_hdmimode, env_get("hdmimode"))) && |
| 216 | (hdmi_cmp_env(env_outputmode, env_get("outputmode"))) && |
| 217 | (hdmi_cmp_env(env_colorattr, env_get("colorattribute"))) && |
| 218 | (hdmi_cmp_env(env_usercolorattr, env_get("user_colorattribute")))) |
| 219 | return; |
| 220 | |
| 221 | /* if changes, print and save those values */ |
| 222 | tmpstr = env_get("hdmimode"); |
| 223 | pr_info("hdmimode: %s\n", tmpstr ? tmpstr : ""); |
| 224 | memset(env_hdmimode, 0, HDMI_ENV_PARAM_MAX_LEN); |
| 225 | if (tmpstr) |
| 226 | strncpy(env_hdmimode, tmpstr, HDMI_ENV_PARAM_MAX_LEN - 1); |
| 227 | |
| 228 | tmpstr = env_get("outputmode"); |
| 229 | pr_info("outputmode: %s\n", tmpstr ? tmpstr : ""); |
| 230 | memset(env_outputmode, 0, HDMI_ENV_PARAM_MAX_LEN); |
| 231 | if (tmpstr) |
| 232 | strncpy(env_outputmode, tmpstr, HDMI_ENV_PARAM_MAX_LEN - 1); |
| 233 | |
| 234 | tmpstr = env_get("colorattribute"); |
| 235 | pr_info("colorattribute: %s\n", tmpstr ? tmpstr : ""); |
| 236 | memset(env_colorattr, 0, HDMI_ENV_PARAM_MAX_LEN); |
| 237 | if (tmpstr) |
| 238 | strncpy(env_colorattr, tmpstr, HDMI_ENV_PARAM_MAX_LEN - 1); |
| 239 | |
| 240 | tmpstr = env_get("user_colorattribute"); |
| 241 | pr_info("user_colorattribute: %s\n", tmpstr ? tmpstr : ""); |
| 242 | memset(env_usercolorattr, 0, HDMI_ENV_PARAM_MAX_LEN); |
| 243 | if (tmpstr) |
| 244 | strncpy(env_usercolorattr, tmpstr, HDMI_ENV_PARAM_MAX_LEN - 1); |
| 245 | } |
| 246 | |
| 247 | static void save_hdmi_tfr_mode(void) |
| 248 | { |
| 249 | const char *tfr_mode = NULL; |
| 250 | const char *mode = NULL; |
| 251 | const struct hdmi_timing *tfr_timing = NULL; |
| 252 | const struct hdmi_timing *mode_timing = NULL; |
| 253 | |
| 254 | /* |
| 255 | * case1: hdmimode not none |
| 256 | * if TV changed, hdmimode != outputmode |
| 257 | */ |
| 258 | tfr_mode = env_get("hdmimode"); |
| 259 | if (tfr_mode) { |
| 260 | tfr_timing = hdmitx21_gettiming_from_name(tfr_mode); |
| 261 | if (tfr_timing) { |
| 262 | mode = env_get("outputmode"); |
| 263 | mode_timing= hdmitx21_gettiming_from_name(mode); |
| 264 | if ((mode_timing->h_active < tfr_timing->h_active) && |
| 265 | (mode_timing->v_freq < tfr_timing->v_freq)) |
| 266 | env_set("tfr_mode", env_get("outputmode")); |
| 267 | else |
| 268 | env_set("tfr_mode", env_get("hdmimode")); |
| 269 | pr_info("hdmitx: qms: save tfr mode %s from hdmimode\n", tfr_mode); |
| 270 | return; |
| 271 | } |
| 272 | } |
| 273 | |
| 274 | /* |
| 275 | * case2: hdmimode as none, or NULL |
| 276 | */ |
| 277 | tfr_mode = env_get("outputmode"); |
| 278 | if (tfr_mode) { |
| 279 | tfr_timing = hdmitx21_gettiming_from_name(tfr_mode); |
| 280 | if (tfr_timing) { |
| 281 | env_set("tfr_mode", tfr_mode); |
| 282 | pr_info("hdmitx: qms: save tfr mode %s from outputmoe\n", tfr_mode); |
| 283 | return; |
| 284 | } |
| 285 | } |
| 286 | pr_info("hdmitx: qms: failed to save tfr mode\n"); |
| 287 | } |
| 288 | |
| 289 | /* |
lizhi.hu | 506ddfa | 2024-07-10 21:35:41 +0800 | [diff] [blame] | 290 | * If environment qms_en is true, and RX supports QMS, and the |
Wenjie Qiao | 4bdbbee | 2024-02-01 10:16:44 +0800 | [diff] [blame] | 291 | * output mode is BRR then enable TX QMS |
| 292 | */ |
| 293 | static void qms_scene_pre_process(struct hdmitx_dev *hdev) |
| 294 | { |
| 295 | bool env_qms_en = 0; |
| 296 | bool rx_qms_cap = 0; |
| 297 | enum hdmi_vic qms_brr_vic = HDMI_UNKNOWN; |
zongdong.jiao | b6fa996 | 2024-08-25 19:51:48 +0800 | [diff] [blame] | 298 | const struct hdmi_timing *tfr_timing = NULL; |
| 299 | const struct hdmi_timing *brr_timing = NULL; |
Wenjie Qiao | 4bdbbee | 2024-02-01 10:16:44 +0800 | [diff] [blame] | 300 | char *color = NULL; |
zongdong.jiao | 1ac547f | 2024-03-06 13:43:31 +0800 | [diff] [blame] | 301 | const char *i_modes[3] = { |
| 302 | "480i", "576i", "1080i", |
| 303 | }; |
| 304 | char *mode; |
| 305 | int i; |
| 306 | |
lizhi.hu | 506ddfa | 2024-07-10 21:35:41 +0800 | [diff] [blame] | 307 | /* default as 0 */ |
| 308 | hdev->qms_en = 0; |
zongdong.jiao | b6fa996 | 2024-08-25 19:51:48 +0800 | [diff] [blame] | 309 | |
| 310 | if (hdev->vic == HDMI_UNKNOWN) |
| 311 | return; |
| 312 | |
| 313 | rx_qms_cap = hdev->RXCap.qms; |
| 314 | |
| 315 | /* save current hdmimode/outputmode is QMS/TFR mode */ |
| 316 | if (!rx_qms_cap) |
| 317 | return; |
| 318 | |
| 319 | /* check uboot environment */ |
| 320 | if (env_get("qms_en") && (env_get_ulong("qms_en", 10, 0) == 1)) |
| 321 | env_qms_en = 1; |
| 322 | else |
| 323 | return; |
| 324 | |
zongdong.jiao | 1ac547f | 2024-03-06 13:43:31 +0800 | [diff] [blame] | 325 | /* if current mode is interlaced mode, then skip QMS */ |
zongdong.jiao | b6fa996 | 2024-08-25 19:51:48 +0800 | [diff] [blame] | 326 | mode = env_get("outputmode"); |
zongdong.jiao | 1ac547f | 2024-03-06 13:43:31 +0800 | [diff] [blame] | 327 | if (!mode) |
| 328 | return; |
| 329 | for (i = 0; i < 3; i++) { |
| 330 | if (strstr(mode, i_modes[i])) |
| 331 | return; |
| 332 | } |
Wenjie Qiao | 4bdbbee | 2024-02-01 10:16:44 +0800 | [diff] [blame] | 333 | |
zongdong.jiao | b6fa996 | 2024-08-25 19:51:48 +0800 | [diff] [blame] | 334 | check_hdmi_env_params(); |
Wenjie Qiao | 4bdbbee | 2024-02-01 10:16:44 +0800 | [diff] [blame] | 335 | |
zongdong.jiao | b6fa996 | 2024-08-25 19:51:48 +0800 | [diff] [blame] | 336 | save_hdmi_tfr_mode(); |
Wenjie Qiao | 4bdbbee | 2024-02-01 10:16:44 +0800 | [diff] [blame] | 337 | |
zongdong.jiao | b6fa996 | 2024-08-25 19:51:48 +0800 | [diff] [blame] | 338 | mode = env_get("tfr_mode"); |
| 339 | if (!mode) |
| 340 | return; |
| 341 | tfr_timing = hdmitx21_gettiming_from_name(mode); |
| 342 | qms_brr_vic = hdmitx_find_brr_vic(tfr_timing->vic); |
Wenjie Qiao | 4bdbbee | 2024-02-01 10:16:44 +0800 | [diff] [blame] | 343 | |
| 344 | if (env_qms_en && rx_qms_cap && qms_brr_vic != HDMI_UNKNOWN) |
| 345 | hdev->qms_en = 1; |
zongdong.jiao | b6fa996 | 2024-08-25 19:51:48 +0800 | [diff] [blame] | 346 | else |
Wenjie Qiao | 4bdbbee | 2024-02-01 10:16:44 +0800 | [diff] [blame] | 347 | return; |
zongdong.jiao | b6fa996 | 2024-08-25 19:51:48 +0800 | [diff] [blame] | 348 | /* check tfr is less than brr */ |
| 349 | mode = env_get("outputmode"); |
| 350 | brr_timing = hdmitx21_gettiming_from_vic(qms_brr_vic); |
| 351 | if (brr_timing->v_freq < tfr_timing->v_freq) { |
| 352 | hdev->qms_en = 0; |
| 353 | color = env_get("colorattribute"); |
| 354 | hdev->vic = tfr_timing->vic; |
| 355 | mode = tfr_timing->sname ? tfr_timing->sname : tfr_timing->name; |
| 356 | hdev->para = hdmitx21_get_fmtpara(mode, color); |
| 357 | pr_info("hdmitx: qms: tfr %s larger than brr %s\n", env_get("tfr_mode"), mode); |
Wenjie Qiao | 4bdbbee | 2024-02-01 10:16:44 +0800 | [diff] [blame] | 358 | return; |
| 359 | } |
zongdong.jiao | b6fa996 | 2024-08-25 19:51:48 +0800 | [diff] [blame] | 360 | |
| 361 | pr_info("hdmitx: qms: env %d rx %d vic %d brr_vic %d\n", |
| 362 | env_qms_en, rx_qms_cap, hdev->vic, qms_brr_vic); |
| 363 | |
| 364 | hdev->brr_vic = qms_brr_vic; |
| 365 | /* reconfig the hdmi para */ |
| 366 | brr_timing = hdmitx21_gettiming_from_vic(hdev->brr_vic); |
xiang.wu1 | 68a8fa3 | 2024-05-27 17:20:43 +0800 | [diff] [blame] | 367 | color = env_get("colorattribute"); |
zongdong.jiao | 15a19b2 | 2024-05-21 15:33:05 +0800 | [diff] [blame] | 368 | /* save brr_vic to vic without the environment */ |
| 369 | hdev->vic = hdev->brr_vic; |
zongdong.jiao | b6fa996 | 2024-08-25 19:51:48 +0800 | [diff] [blame] | 370 | mode = brr_timing->sname ? brr_timing->sname : brr_timing->name; |
| 371 | hdev->para = hdmitx21_get_fmtpara(mode, color); |
| 372 | check_hdmi_env_params(); |
Wenjie Qiao | 4bdbbee | 2024-02-01 10:16:44 +0800 | [diff] [blame] | 373 | } |
| 374 | |
| 375 | static void qms_scene_post_process(struct hdmitx_dev *hdev) |
| 376 | { |
zongdong.jiao | b6fa996 | 2024-08-25 19:51:48 +0800 | [diff] [blame] | 377 | if (!hdev->qms_en) |
| 378 | return; |
zongdong.jiao | 15a19b2 | 2024-05-21 15:33:05 +0800 | [diff] [blame] | 379 | |
lizhi.hu | 506ddfa | 2024-07-10 21:35:41 +0800 | [diff] [blame] | 380 | /* Init QMS parameter */ |
Wenjie Qiao | 4bdbbee | 2024-02-01 10:16:44 +0800 | [diff] [blame] | 381 | vrr_init_qms_para(hdev); |
zongdong.jiao | b6fa996 | 2024-08-25 19:51:48 +0800 | [diff] [blame] | 382 | env_set("tfr_mode", NULL); |
Wenjie Qiao | 4bdbbee | 2024-02-01 10:16:44 +0800 | [diff] [blame] | 383 | } |
| 384 | |
Wenjie Qiao | 8a73a56 | 2023-02-23 18:37:14 +0800 | [diff] [blame] | 385 | static int do_output(cmd_tbl_t *cmdtp, int flag, int argc, char *const argv[]) |
| 386 | { |
| 387 | const struct hdmi_timing *timing = NULL; |
| 388 | struct hdmitx_dev *hdev = get_hdmitx21_device(); |
| 389 | |
xiang.wu1 | a6d6f1d | 2023-08-04 14:13:00 +0800 | [diff] [blame] | 390 | #ifdef CONFIG_PXP_EMULATOR |
| 391 | hdmitx21_pxp_init(1); |
| 392 | #endif |
Wenjie Qiao | 8a73a56 | 2023-02-23 18:37:14 +0800 | [diff] [blame] | 393 | if (argc < 1) |
| 394 | return cmd_usage(cmdtp); |
| 395 | |
| 396 | if (strcmp(argv[1], "list") == 0) { |
| 397 | hdev->hwop.list_support_modes(); |
| 398 | } else if (strcmp(argv[1], "bist") == 0) { |
| 399 | unsigned int mode = 0; |
| 400 | |
| 401 | if (strcmp(argv[2], "off") == 0) |
| 402 | mode = 0; |
| 403 | else if (strcmp(argv[2], "line") == 0) |
| 404 | mode = 2; |
| 405 | else if (strcmp(argv[2], "dot") == 0) |
| 406 | mode = 3; |
| 407 | else if (strcmp(argv[2], "x") == 0) |
| 408 | mode = 'x'; |
| 409 | else if (strcmp(argv[2], "X") == 0) |
| 410 | mode = 'X'; |
| 411 | else |
| 412 | mode = simple_strtoul(argv[2], NULL, 10); |
| 413 | hdev->hwop.test_bist(mode); |
| 414 | } else if (strcmp(argv[1], "prbs") == 0) { |
| 415 | hdev->para->cs = HDMI_COLORSPACE_RGB; |
| 416 | hdev->para->cd = COLORDEPTH_24B; |
| 417 | hdev->vic = HDMI_16_1920x1080p60_16x9; |
| 418 | hdmitx21_set(hdev); |
| 419 | hdev->hwop.test_prbs(); |
| 420 | } else if (strncmp(argv[1], "div40", 5) == 0) { |
| 421 | bool div40 = 0; |
| 422 | |
| 423 | if (argv[1][5] == '1') |
| 424 | div40 = 1; |
| 425 | hdev->hwop.set_div40(div40); |
| 426 | } else { /* "output" */ |
Wenjie Qiao | 389d3ea | 2023-05-25 16:07:03 +0800 | [diff] [blame] | 427 | if (!hdev->pxp_mode) { |
xiang.wu1 | 14497ab | 2024-02-21 14:57:05 +0800 | [diff] [blame] | 428 | if (!hdmitx_edid_check_data_valid(0, hdev->rawedid)) { |
lizhi.hu | 506ddfa | 2024-07-10 21:35:41 +0800 | [diff] [blame] | 429 | /* |
| 430 | * in SWPL-34712: if EDID parsing error in kernel, |
Wenjie Qiao | 389d3ea | 2023-05-25 16:07:03 +0800 | [diff] [blame] | 431 | * only forcely output default mode(480p,RGB,8bit) |
| 432 | * in sysctl, not save the default mode to env. |
| 433 | * if uboot follow this rule, will cause issue OTT-19333: |
| 434 | * uboot read edid error and then output default mode, |
| 435 | * without save it mode env. if then kernel edid normal, |
| 436 | * sysctrl/kernel get mode from env, the actual output |
| 437 | * mode differs with outputmode env,it will |
| 438 | * cause display abnormal(such as stretch). so don't |
| 439 | * follow this rule in uboot, that's to say the actual |
| 440 | * output mode needs to stays with the outputmode env. |
| 441 | */ |
| 442 | printf("edid parsing ng, forcely output 720p, rgb,8bit\n"); |
| 443 | save_default_720p(); |
| 444 | hdev->vic = HDMI_4_1280x720p60_16x9; |
| 445 | hdev->para = |
| 446 | hdmitx21_get_fmtpara("720p60hz", "rgb,8bit"); |
| 447 | hdev->para->cs = HDMI_COLORSPACE_RGB; |
| 448 | hdev->para->cd = COLORDEPTH_24B; |
| 449 | hdmitx21_set(hdev); |
| 450 | return CMD_RET_SUCCESS; |
| 451 | } |
Wenjie Qiao | 8a73a56 | 2023-02-23 18:37:14 +0800 | [diff] [blame] | 452 | } |
| 453 | if (!env_get("colorattribute")) |
| 454 | env_set("colorattribute", "444,8bit"); |
zongdong.jiao | b6fa996 | 2024-08-25 19:51:48 +0800 | [diff] [blame] | 455 | /* if QMS is enabled, no need to use argv[1] */ |
| 456 | if (!hdev->qms_en) { |
| 457 | hdev->para = hdmitx21_get_fmtpara(argv[1], env_get("colorattribute")); |
| 458 | hdev->vic = hdev->para->timing.vic; |
| 459 | } |
xiang.wu1 | 14497ab | 2024-02-21 14:57:05 +0800 | [diff] [blame] | 460 | if (hdev->vic == HDMI_0_UNKNOWN) { |
Wenjie Qiao | 8a73a56 | 2023-02-23 18:37:14 +0800 | [diff] [blame] | 461 | /* Not find VIC */ |
| 462 | printf("Not find '%s' mapped VIC\n", argv[1]); |
| 463 | return CMD_RET_FAILURE; |
| 464 | } |
| 465 | if (strstr(argv[1], "hz420")) |
| 466 | hdev->para->cs = HDMI_COLORSPACE_YUV420; |
| 467 | /* S5 support over 6G, T7 not support */ |
| 468 | switch (hdev->vic) { |
| 469 | case HDMI_96_3840x2160p50_16x9: |
| 470 | case HDMI_97_3840x2160p60_16x9: |
| 471 | case HDMI_101_4096x2160p50_256x135: |
| 472 | case HDMI_102_4096x2160p60_256x135: |
| 473 | case HDMI_106_3840x2160p50_64x27: |
| 474 | case HDMI_107_3840x2160p60_64x27: |
Wenjie Qiao | 4bdbbee | 2024-02-01 10:16:44 +0800 | [diff] [blame] | 475 | if (hdev->chip_type != MESON_CPU_ID_S5) { |
Wenjie Qiao | 8a73a56 | 2023-02-23 18:37:14 +0800 | [diff] [blame] | 476 | if (hdev->para->cs == HDMI_COLORSPACE_RGB || |
| 477 | hdev->para->cs == HDMI_COLORSPACE_YUV444) { |
| 478 | if (hdev->para->cd != COLORDEPTH_24B) { |
| 479 | printf("vic %d cs %d has no cd %d\n", |
| 480 | hdev->vic, |
| 481 | hdev->para->cs, |
| 482 | hdev->para->cd); |
| 483 | hdev->para->cd = COLORDEPTH_24B; |
| 484 | printf("set cd as %d\n", COLORDEPTH_24B); |
| 485 | } |
| 486 | } |
| 487 | } |
| 488 | break; |
| 489 | default: |
lizhi.hu | 506ddfa | 2024-07-10 21:35:41 +0800 | [diff] [blame] | 490 | /* |
| 491 | * In Spec2.1 Table 7-34, v_active greater than or equal to 2160 and refresh |
zhou.han | accf2ad | 2024-06-29 11:36:03 +0800 | [diff] [blame] | 492 | * rate greater than 30 will support y420 |
| 493 | * Only the S5 will run this case, because 4k 50/60hz has already been |
| 494 | * filtered and only S5 support over 6G (4k 100/120hz) |
| 495 | */ |
Wenjie Qiao | 8a73a56 | 2023-02-23 18:37:14 +0800 | [diff] [blame] | 496 | timing = hdmitx21_gettiming_from_vic(hdev->vic); |
| 497 | if (!timing) |
| 498 | break; |
zhou.han | accf2ad | 2024-06-29 11:36:03 +0800 | [diff] [blame] | 499 | if (timing->v_active >= 2160 && timing->v_freq > 30000) |
Wenjie Qiao | 8a73a56 | 2023-02-23 18:37:14 +0800 | [diff] [blame] | 500 | break; |
| 501 | if (timing->v_active >= 4320) |
| 502 | break; |
| 503 | if (hdev->para->cs == HDMI_COLORSPACE_YUV420) { |
| 504 | printf("vic %d has no cs %d\n", hdev->vic, |
| 505 | hdev->para->cs); |
| 506 | hdev->para->cs = HDMI_COLORSPACE_YUV444; |
| 507 | printf("set cs as %d\n", HDMI_COLORSPACE_YUV444); |
| 508 | } |
| 509 | break; |
| 510 | } |
| 511 | printf("set hdmitx VIC = %d CS = %d CD = %d\n", |
| 512 | hdev->vic, hdev->para->cs, hdev->para->cd); |
lizhi.hu | 506ddfa | 2024-07-10 21:35:41 +0800 | [diff] [blame] | 513 | /* |
| 514 | * currently, hdmi mode is always set, if |
Wenjie Qiao | 8a73a56 | 2023-02-23 18:37:14 +0800 | [diff] [blame] | 515 | * mode set abort/exit, need to add return |
| 516 | * result of mode setting, so that vout |
| 517 | * driver will pass it to kernel, and do |
| 518 | * mode setting again when vout init in kernel |
| 519 | */ |
zongdong.jiao | b6fa996 | 2024-08-25 19:51:48 +0800 | [diff] [blame] | 520 | qms_scene_pre_process(hdev); |
Wenjie Qiao | 8a73a56 | 2023-02-23 18:37:14 +0800 | [diff] [blame] | 521 | hdmitx21_set(hdev); |
xiang.wu1 | 5613f46 | 2024-09-04 17:42:04 +0800 | [diff] [blame] | 522 | /* for special LG TV, need send ake_init first */ |
| 523 | if (hdmitx_find_send_ake_init(hdev->rawedid)) |
| 524 | hdmitx21_send_ake_init(); |
Wenjie Qiao | 4bdbbee | 2024-02-01 10:16:44 +0800 | [diff] [blame] | 525 | qms_scene_post_process(hdev); |
Wenjie Qiao | af3ac88 | 2024-05-29 10:12:12 +0800 | [diff] [blame] | 526 | if (hdev->para->frl_rate && !hdev->flt_train_st) { |
Wenjie Qiao | 389d3ea | 2023-05-25 16:07:03 +0800 | [diff] [blame] | 527 | /* FLT training failed, need go to tmds mode */ |
| 528 | printf("hdmitx frl training failed, set tmds mode\n"); |
xiang.wu1 | dba66a0 | 2024-05-28 19:53:01 +0800 | [diff] [blame] | 529 | hdmitx_module_disable(); |
| 530 | hdev->frl_train_fail_flag = true; |
| 531 | run_command("run init_display", 0); |
Wenjie Qiao | 389d3ea | 2023-05-25 16:07:03 +0800 | [diff] [blame] | 532 | } |
Wenjie Qiao | 8a73a56 | 2023-02-23 18:37:14 +0800 | [diff] [blame] | 533 | } |
| 534 | return CMD_RET_SUCCESS; |
| 535 | } |
| 536 | |
| 537 | static int do_clkmsr(cmd_tbl_t *cmdtp, int flag, int argc, char *const argv[]) |
| 538 | { |
Wenjie Qiao | 4bdbbee | 2024-02-01 10:16:44 +0800 | [diff] [blame] | 539 | struct hdmitx_dev *hdev = get_hdmitx21_device(); |
| 540 | |
| 541 | if (hdev->chip_type == MESON_CPU_ID_S5) { |
| 542 | clk_msr(4); |
| 543 | clk_msr(8); |
| 544 | clk_msr(16); |
| 545 | clk_msr(27); |
| 546 | clk_msr(63); |
| 547 | clk_msr(64); |
| 548 | clk_msr(66); |
| 549 | clk_msr(68); |
| 550 | clk_msr(69); |
| 551 | clk_msr(70); |
| 552 | clk_msr(71); |
| 553 | clk_msr(72); |
| 554 | clk_msr(73); |
| 555 | clk_msr(74); |
| 556 | clk_msr(75); |
| 557 | clk_msr(76); |
| 558 | clk_msr(79); |
| 559 | clk_msr(82); |
| 560 | clk_msr(89); |
| 561 | clk_msr(90); |
| 562 | clk_msr(91); |
| 563 | clk_msr(92); |
| 564 | clk_msr(93); |
| 565 | clk_msr(94); |
| 566 | clk_msr(95); |
| 567 | return CMD_RET_SUCCESS; |
| 568 | } |
Wenjie Qiao | 8a73a56 | 2023-02-23 18:37:14 +0800 | [diff] [blame] | 569 | clk_msr(51); |
| 570 | clk_msr(59); |
| 571 | clk_msr(61); |
| 572 | clk_msr(76); |
| 573 | clk_msr(77); |
| 574 | clk_msr(78); |
| 575 | clk_msr(80); |
| 576 | clk_msr(81); |
| 577 | clk_msr(82); |
| 578 | clk_msr(83); |
| 579 | clk_msr(219); |
| 580 | clk_msr(220); |
| 581 | clk_msr(221); |
| 582 | clk_msr(222); |
| 583 | return CMD_RET_SUCCESS; |
| 584 | } |
| 585 | |
| 586 | static int do_blank(cmd_tbl_t *cmdtp, int flag, int argc, char *const argv[]) |
| 587 | { |
| 588 | struct hdmitx_dev *hdev = get_hdmitx21_device(); |
| 589 | |
| 590 | if (argc < 1) |
| 591 | return cmd_usage(cmdtp); |
| 592 | |
| 593 | if (strcmp(argv[1], "1") == 0) |
| 594 | hdev->hwop.output_blank(1); |
| 595 | if (strcmp(argv[1], "0") == 0) |
| 596 | hdev->hwop.output_blank(0); |
| 597 | |
| 598 | return CMD_RET_SUCCESS; |
| 599 | } |
| 600 | |
| 601 | static int do_off(cmd_tbl_t *cmdtp, int flag, int argc, char *const argv[]) |
| 602 | { |
| 603 | struct hdmitx_dev *hdev = get_hdmitx21_device(); |
| 604 | |
xiang.wu1 | 14497ab | 2024-02-21 14:57:05 +0800 | [diff] [blame] | 605 | hdev->vic = HDMI_0_UNKNOWN; |
Wenjie Qiao | 4bdbbee | 2024-02-01 10:16:44 +0800 | [diff] [blame] | 606 | if (hdev->chip_type == MESON_CPU_ID_S5) |
| 607 | hdmitx_module_disable(); |
Wenjie Qiao | 8a73a56 | 2023-02-23 18:37:14 +0800 | [diff] [blame] | 608 | hdev->hwop.turn_off(); |
| 609 | printf("turn off hdmitx\n"); |
| 610 | return 1; |
| 611 | } |
| 612 | |
| 613 | static int do_dump(cmd_tbl_t *cmdtp, int flag, int argc, char *const argv[]) |
| 614 | { |
| 615 | struct hdmitx_dev *hdev = get_hdmitx21_device(); |
| 616 | |
| 617 | hdev->hwop.dump_regs(); |
| 618 | return 1; |
| 619 | } |
| 620 | |
| 621 | static int do_reg(cmd_tbl_t *cmdtp, int flag, int argc, char *const argv[]) |
| 622 | { |
| 623 | unsigned long addr = 0; |
| 624 | unsigned int data = 0; |
| 625 | |
| 626 | if (argc < 1) |
| 627 | return cmd_usage(cmdtp); |
| 628 | |
| 629 | if (strncmp(argv[1], "rh", 2) == 0) { |
| 630 | addr = strtoul(argv[1] + 2, NULL, 16); |
| 631 | data = hdmitx21_rd_reg((unsigned int)addr); |
| 632 | printf("rd[0x%lx] 0x%x\n", addr, data); |
| 633 | } |
| 634 | |
| 635 | if (strncmp(argv[1], "wh", 2) == 0) { |
| 636 | addr = strtoul(argv[1] + 2, NULL, 16); |
| 637 | data = strtoul(argv[2], NULL, 16); |
| 638 | hdmitx21_wr_reg(addr, data); |
| 639 | printf("wr[0x%lx] 0x%x\n", addr, data); |
| 640 | } |
| 641 | |
| 642 | return 1; |
| 643 | } |
| 644 | |
xiang.wu1 | a6d6f1d | 2023-08-04 14:13:00 +0800 | [diff] [blame] | 645 | static int do_pbist(cmd_tbl_t *cmdtp, int flag, int argc, char *const argv[]) |
| 646 | { |
| 647 | struct hdmitx_dev *hdev = get_hdmitx21_device(); |
| 648 | |
| 649 | if (strcmp(argv[1], "1") == 0) |
| 650 | hdmitx21_pbist_config(hdev, hdev->vic, 1); |
| 651 | if (strcmp(argv[1], "0") == 0) |
| 652 | hdmitx21_pbist_config(hdev, hdev->vic, 0); |
| 653 | return 1; |
| 654 | } |
| 655 | |
xiang.wu1 | 492f364 | 2024-01-08 14:06:40 +0800 | [diff] [blame] | 656 | static int do_s7_clk_config(cmd_tbl_t *cmdtp, int flag, int argc, char *const argv[]) |
| 657 | { |
| 658 | struct hdmitx_dev *hdev = get_hdmitx21_device(); |
| 659 | |
| 660 | if (strcmp(argv[1], "1") == 0) { |
| 661 | hdev->s7_clk_config = 1; |
| 662 | pr_info("s7_clk_config = %d\n", hdev->s7_clk_config); |
| 663 | } if (strcmp(argv[1], "0") == 0) { |
| 664 | hdev->s7_clk_config = 0; |
| 665 | pr_info("s7_clk_config = %d\n", hdev->s7_clk_config); |
| 666 | } |
| 667 | return 1; |
| 668 | } |
| 669 | |
xiang.wu1 | 14497ab | 2024-02-21 14:57:05 +0800 | [diff] [blame] | 670 | static int get_rterm(cmd_tbl_t *cmdtp, int flag, int argc, char *const argv[]) |
| 671 | { |
| 672 | struct arm_smccc_res res; |
| 673 | u8 rterm_efuse; |
| 674 | |
| 675 | arm_smccc_smc(HDCPTX_IOOPR, HDMITX_GET_RTERM, 0, 0, 0, 0, 0, 0, &res); |
| 676 | rterm_efuse = (unsigned int)((res.a0) & 0xffffffff); |
| 677 | pr_info("rterm_efuse = %d\n", rterm_efuse); |
| 678 | return 1; |
| 679 | } |
| 680 | |
xiang.wu1 | a6d6f1d | 2023-08-04 14:13:00 +0800 | [diff] [blame] | 681 | static int do_debug(cmd_tbl_t *cmdtp, int flag, int argc, char *const argv[]) |
| 682 | { |
| 683 | unsigned int enable_all = 0; |
| 684 | int pkt_op = 0; |
| 685 | unsigned int mov_val = 0; |
| 686 | unsigned char pb[28] = {0x46, 0xD0, 0x00, 0x00, 0x00, 0x00, 0x46, 0xD0, |
| 687 | 0x00, 0x10, 0x21, 0xaa, 0x9b, 0x96, 0x19, 0xfc, 0x19, 0x75, 0xd5, 0x78, |
| 688 | 0x10, 0x21, 0xaa, 0x9b, 0x96, 0x19, 0xfc, 0x19}; |
| 689 | unsigned char hb[3] = {0x01, 0x02, 0x03}; |
| 690 | |
| 691 | if (argc < 1) |
| 692 | return cmd_usage(cmdtp); |
| 693 | |
| 694 | if (strncmp(argv[1], "pkt", 3) == 0) { |
| 695 | enable_all = strtoul(argv[1] + 3, NULL, 16); |
| 696 | pkt_op = strtoul(argv[2], NULL, 16); |
| 697 | mov_val = strtoul(argv[3], NULL, 10); |
| 698 | pkt_send_position_change(enable_all, pkt_op, mov_val); |
| 699 | } else if (strncmp(argv[1], "w_dhdr", 6) == 0 ) { |
| 700 | hdmitx21_write_dhdr_sram(); |
| 701 | } else if (strncmp(argv[1], "r_dhdr", 6) == 0 ) { |
| 702 | hdmitx21_read_dhdr_sram(); |
| 703 | } else if (strncmp(argv[1], "t_avi", 4) == 0 ) { |
| 704 | printf("test send avi pkt\n"); |
| 705 | hdmi_avi_infoframe_rawset(hb, pb); |
| 706 | } else if (strncmp(argv[1], "t_audio", 7) == 0 ) { |
| 707 | printf("test send audio pkt\n"); |
| 708 | hdmi_audio_infoframe_rawset(hb, pb); |
| 709 | } else if (strncmp(argv[1], "t_sbtm", 6) == 0 ) { |
| 710 | printf("test send SBTM pkt\n"); |
| 711 | hdmitx21_send_sbtm_pkt(); |
| 712 | } |
| 713 | |
| 714 | return 1; |
| 715 | } |
| 716 | |
lizhi.hu | 506ddfa | 2024-07-10 21:35:41 +0800 | [diff] [blame] | 717 | /* |
| 718 | * step1, only select VIC which is supported in EDID |
Wenjie Qiao | af3ac88 | 2024-05-29 10:12:12 +0800 | [diff] [blame] | 719 | * step2, check if VIC is supported by SOC hdmitx |
| 720 | * step3, build format with basic mode/attr and check |
| 721 | * if it's supported by EDID/hdmitx_cap |
| 722 | */ |
Wenjie Qiao | 8a73a56 | 2023-02-23 18:37:14 +0800 | [diff] [blame] | 723 | static void disp_cap_show(struct hdmitx_dev *hdev) |
| 724 | { |
Wenjie Qiao | 8a73a56 | 2023-02-23 18:37:14 +0800 | [diff] [blame] | 725 | if (!hdev) |
| 726 | return; |
| 727 | |
Wenjie Qiao | af3ac88 | 2024-05-29 10:12:12 +0800 | [diff] [blame] | 728 | struct rx_cap *prxcap = &hdev->RXCap; |
| 729 | const struct hdmi_timing *timing = NULL; |
| 730 | enum hdmi_vic vic; |
| 731 | int i = 0; |
| 732 | int vic_len = prxcap->VIC_count + VESA_MAX_TIMING; |
| 733 | int *edid_vics = vmalloc(vic_len * sizeof(int)); |
| 734 | enum hdmi_vic prefer_vic = HDMI_0_UNKNOWN; |
| 735 | |
| 736 | memset(edid_vics, 0, vic_len * sizeof(int)); |
| 737 | |
lizhi.hu | 506ddfa | 2024-07-10 21:35:41 +0800 | [diff] [blame] | 738 | /* |
| 739 | * step1: only select VIC which is supported in EDID |
| 740 | * copy edid vic list |
| 741 | */ |
Wenjie Qiao | af3ac88 | 2024-05-29 10:12:12 +0800 | [diff] [blame] | 742 | if (prxcap->VIC_count > 0) |
| 743 | memcpy(edid_vics, prxcap->VIC, sizeof(int) * prxcap->VIC_count); |
| 744 | for (i = 0; i < VESA_MAX_TIMING && prxcap->vesa_timing[i]; i++) |
| 745 | edid_vics[prxcap->VIC_count + i] = prxcap->vesa_timing[i]; |
| 746 | |
| 747 | for (i = 0; i < vic_len; i++) { |
| 748 | vic = edid_vics[i]; |
| 749 | if (vic == HDMI_0_UNKNOWN) |
Wenjie Qiao | 8a73a56 | 2023-02-23 18:37:14 +0800 | [diff] [blame] | 750 | continue; |
Wenjie Qiao | af3ac88 | 2024-05-29 10:12:12 +0800 | [diff] [blame] | 751 | |
| 752 | prefer_vic = hdmitx_get_prefer_vic(hdev, vic); |
| 753 | /* if mode_best_vic is support by RX, try 16x9 first */ |
zhou.han | a8e9161 | 2024-04-28 14:56:45 +0000 | [diff] [blame] | 754 | if (prefer_vic != vic) { |
Wenjie Qiao | af3ac88 | 2024-05-29 10:12:12 +0800 | [diff] [blame] | 755 | pr_info("%s: check prefer vic:%d exist, ignore [%d].\n", |
| 756 | __func__, prefer_vic, vic); |
zhou.han | a8e9161 | 2024-04-28 14:56:45 +0000 | [diff] [blame] | 757 | continue; |
| 758 | } |
Wenjie Qiao | af3ac88 | 2024-05-29 10:12:12 +0800 | [diff] [blame] | 759 | |
| 760 | timing = hdmitx_mode_vic_to_hdmi_timing(vic); |
| 761 | if (!timing) { |
lizhi.hu | 506ddfa | 2024-07-10 21:35:41 +0800 | [diff] [blame] | 762 | /* HDMITX_ERROR("%s: unsupport vic [%d]\n", __func__, vic); */ |
Wenjie Qiao | af3ac88 | 2024-05-29 10:12:12 +0800 | [diff] [blame] | 763 | continue; |
| 764 | } |
| 765 | |
| 766 | /* step2, check if VIC is supported by SOC hdmitx */ |
| 767 | if (hdmitx_common_validate_vic(&hdev->tx_common, vic) != 0) { |
lizhi.hu | 506ddfa | 2024-07-10 21:35:41 +0800 | [diff] [blame] | 768 | /* HDMITX_ERROR("%s: vic[%d] over range.\n", __func__, vic); */ |
Wenjie Qiao | af3ac88 | 2024-05-29 10:12:12 +0800 | [diff] [blame] | 769 | continue; |
| 770 | } |
| 771 | |
lizhi.hu | 506ddfa | 2024-07-10 21:35:41 +0800 | [diff] [blame] | 772 | /* |
| 773 | * step3, build format with basic mode/attr and check |
Wenjie Qiao | af3ac88 | 2024-05-29 10:12:12 +0800 | [diff] [blame] | 774 | * if it's supported by EDID/hdmitx_cap |
| 775 | */ |
| 776 | if (hdmitx_common_check_valid_para_of_vic(&hdev->tx_common, vic) != 0) { |
lizhi.hu | 506ddfa | 2024-07-10 21:35:41 +0800 | [diff] [blame] | 777 | /* HDMITX_ERROR("%s: vic[%d] check fmt attr failed.\n", __func__, vic); */ |
Wenjie Qiao | af3ac88 | 2024-05-29 10:12:12 +0800 | [diff] [blame] | 778 | continue; |
| 779 | } |
| 780 | |
| 781 | printf(" %s\n", timing->sname ? timing->sname : timing->name); |
| 782 | |
| 783 | if (vic == prxcap->native_vic) |
| 784 | printf("*\n"); |
| 785 | else |
| 786 | printf("\n"); |
Wenjie Qiao | 8a73a56 | 2023-02-23 18:37:14 +0800 | [diff] [blame] | 787 | } |
Wenjie Qiao | af3ac88 | 2024-05-29 10:12:12 +0800 | [diff] [blame] | 788 | |
xiang.wu1 | 14497ab | 2024-02-21 14:57:05 +0800 | [diff] [blame] | 789 | printf("420_cap\n"); |
| 790 | for (i = 0; i < Y420_VIC_MAX_NUM; i++) { |
Wenjie Qiao | af3ac88 | 2024-05-29 10:12:12 +0800 | [diff] [blame] | 791 | vic = prxcap->y420_vic[i]; |
xiang.wu1 | 14497ab | 2024-02-21 14:57:05 +0800 | [diff] [blame] | 792 | printf("420vic:%d\n", vic); |
| 793 | } |
Wenjie Qiao | af3ac88 | 2024-05-29 10:12:12 +0800 | [diff] [blame] | 794 | vfree(edid_vics); |
Wenjie Qiao | 8a73a56 | 2023-02-23 18:37:14 +0800 | [diff] [blame] | 795 | } |
| 796 | |
| 797 | static void vesa_cap_show(struct hdmitx_dev *hdev) |
| 798 | { |
| 799 | } |
| 800 | |
| 801 | static void dc_cap_show(struct hdmitx_dev *hdev) |
| 802 | { |
Wenjie Qiao | 8a73a56 | 2023-02-23 18:37:14 +0800 | [diff] [blame] | 803 | struct rx_cap *prxcap = &hdev->RXCap; |
Wenjie Qiao | af3ac88 | 2024-05-29 10:12:12 +0800 | [diff] [blame] | 804 | const struct dv_info *dv = &prxcap->dv_info; |
| 805 | const struct dv_info *dv2 = &prxcap->dv_info2; |
| 806 | int i; |
Wenjie Qiao | 8a73a56 | 2023-02-23 18:37:14 +0800 | [diff] [blame] | 807 | |
Wenjie Qiao | af3ac88 | 2024-05-29 10:12:12 +0800 | [diff] [blame] | 808 | /* DVI case, only rgb,8bit */ |
| 809 | if (prxcap->ieeeoui != HDMI_IEEE_OUI) { |
| 810 | printf("rgb,8bit\n"); |
| 811 | return; |
| 812 | } |
| 813 | |
Wenjie Qiao | 8a73a56 | 2023-02-23 18:37:14 +0800 | [diff] [blame] | 814 | if (prxcap->dc_36bit_420) |
| 815 | printf("420,12bit\n"); |
Wenjie Qiao | af3ac88 | 2024-05-29 10:12:12 +0800 | [diff] [blame] | 816 | if (prxcap->dc_30bit_420) |
Wenjie Qiao | 8a73a56 | 2023-02-23 18:37:14 +0800 | [diff] [blame] | 817 | printf("420,10bit\n"); |
Wenjie Qiao | af3ac88 | 2024-05-29 10:12:12 +0800 | [diff] [blame] | 818 | |
| 819 | for (i = 0; i < Y420_VIC_MAX_NUM; i++) { |
| 820 | if (prxcap->y420_vic[i]) { |
Wenjie Qiao | 8a73a56 | 2023-02-23 18:37:14 +0800 | [diff] [blame] | 821 | printf("420,8bit\n"); |
Wenjie Qiao | af3ac88 | 2024-05-29 10:12:12 +0800 | [diff] [blame] | 822 | break; |
Wenjie Qiao | 8a73a56 | 2023-02-23 18:37:14 +0800 | [diff] [blame] | 823 | } |
| 824 | } |
Wenjie Qiao | af3ac88 | 2024-05-29 10:12:12 +0800 | [diff] [blame] | 825 | |
Wenjie Qiao | 8a73a56 | 2023-02-23 18:37:14 +0800 | [diff] [blame] | 826 | if (prxcap->native_Mode & (1 << 5)) { |
| 827 | if (prxcap->dc_y444) { |
Wenjie Qiao | af3ac88 | 2024-05-29 10:12:12 +0800 | [diff] [blame] | 828 | if (prxcap->dc_36bit || dv->sup_10b_12b_444 == 0x2 || |
| 829 | dv2->sup_10b_12b_444 == 0x2) |
Wenjie Qiao | 8a73a56 | 2023-02-23 18:37:14 +0800 | [diff] [blame] | 830 | printf("444,12bit\n"); |
Wenjie Qiao | af3ac88 | 2024-05-29 10:12:12 +0800 | [diff] [blame] | 831 | if (prxcap->dc_30bit || dv->sup_10b_12b_444 == 0x1 || |
| 832 | dv2->sup_10b_12b_444 == 0x1) { |
Wenjie Qiao | 8a73a56 | 2023-02-23 18:37:14 +0800 | [diff] [blame] | 833 | printf("444,10bit\n"); |
Wenjie Qiao | af3ac88 | 2024-05-29 10:12:12 +0800 | [diff] [blame] | 834 | } |
Wenjie Qiao | 8a73a56 | 2023-02-23 18:37:14 +0800 | [diff] [blame] | 835 | } |
| 836 | printf("444,8bit\n"); |
| 837 | } |
| 838 | /* y422, not check dc */ |
Wenjie Qiao | af3ac88 | 2024-05-29 10:12:12 +0800 | [diff] [blame] | 839 | if (prxcap->native_Mode & (1 << 4)) |
Wenjie Qiao | 8a73a56 | 2023-02-23 18:37:14 +0800 | [diff] [blame] | 840 | printf("422,12bit\n"); |
Wenjie Qiao | 8a73a56 | 2023-02-23 18:37:14 +0800 | [diff] [blame] | 841 | |
Wenjie Qiao | af3ac88 | 2024-05-29 10:12:12 +0800 | [diff] [blame] | 842 | if (prxcap->dc_36bit || dv->sup_10b_12b_444 == 0x2 || |
| 843 | dv2->sup_10b_12b_444 == 0x2) |
Wenjie Qiao | 8a73a56 | 2023-02-23 18:37:14 +0800 | [diff] [blame] | 844 | printf("rgb,12bit\n"); |
Wenjie Qiao | af3ac88 | 2024-05-29 10:12:12 +0800 | [diff] [blame] | 845 | if (prxcap->dc_30bit || dv->sup_10b_12b_444 == 0x1 || |
| 846 | dv2->sup_10b_12b_444 == 0x1) |
Wenjie Qiao | 8a73a56 | 2023-02-23 18:37:14 +0800 | [diff] [blame] | 847 | printf("rgb,10bit\n"); |
| 848 | printf("rgb,8bit\n"); |
| 849 | } |
| 850 | |
| 851 | static void aud_cap_show(struct hdmitx_dev *hdev) |
| 852 | { |
| 853 | } |
| 854 | |
| 855 | static void hdr_cap_show(struct hdmitx_dev *hdev) |
| 856 | { |
| 857 | int hdr10plugsupported = 0; |
| 858 | struct hdr_info *hdr = &hdev->RXCap.hdr_info; |
xiang.wu1 | 14497ab | 2024-02-21 14:57:05 +0800 | [diff] [blame] | 859 | const struct hdr10_plus_info *hdr10p = &hdev->RXCap.hdr_info.hdr10plus_info; |
Wenjie Qiao | 8a73a56 | 2023-02-23 18:37:14 +0800 | [diff] [blame] | 860 | |
| 861 | printf("\nhdr_cap\n"); |
| 862 | if (hdr10p->ieeeoui == HDR10_PLUS_IEEE_OUI && |
| 863 | hdr10p->application_version != 0xFF) |
| 864 | hdr10plugsupported = 1; |
| 865 | printf("HDR10Plus Supported: %d\n", hdr10plugsupported); |
| 866 | printf("HDR Static Metadata:\n"); |
| 867 | printf(" Supported EOTF:\n"); |
xiang.wu1 | 14497ab | 2024-02-21 14:57:05 +0800 | [diff] [blame] | 868 | printf(" Traditional SDR: %d\n", !!(hdr->hdr_support & HDR_SUP_EOTF_SDR)); |
| 869 | printf(" Traditional HDR: %d\n", !!(hdr->hdr_support & HDR_SUP_EOTF_HDR)); |
| 870 | printf(" SMPTE ST 2084: %d\n", !!(hdr->hdr_support & HDR_SUP_EOTF_SMPTE_ST_2084)); |
| 871 | printf(" Hybrid Log-Gamma: %d\n", !!(hdr->hdr_support & HDR_SUP_EOTF_HLG)); |
| 872 | printf(" Supported SMD type1: %d\n", hdr->static_metadata_type1); |
Wenjie Qiao | 8a73a56 | 2023-02-23 18:37:14 +0800 | [diff] [blame] | 873 | printf(" Luminance Data\n"); |
xiang.wu1 | 14497ab | 2024-02-21 14:57:05 +0800 | [diff] [blame] | 874 | printf(" Max: %d\n", hdr->lumi_max); |
| 875 | printf(" Avg: %d\n", hdr->lumi_avg); |
| 876 | printf(" Min: %d\n\n", hdr->lumi_min); |
Wenjie Qiao | 8a73a56 | 2023-02-23 18:37:14 +0800 | [diff] [blame] | 877 | printf("HDR Dynamic Metadata:"); |
| 878 | } |
| 879 | |
| 880 | static void _dv_cap_show(const struct dv_info *dv) |
| 881 | { |
| 882 | int i; |
| 883 | |
| 884 | if (dv->ieeeoui != DV_IEEE_OUI || dv->block_flag != CORRECT) { |
| 885 | printf("The Rx don't support DolbyVision\n"); |
| 886 | return; |
| 887 | } |
| 888 | printf("DolbyVision RX support list:\n"); |
| 889 | |
| 890 | if (dv->ver == 0) { |
| 891 | printf("VSVDB Version: V%d\n", dv->ver); |
| 892 | printf("2160p%shz: 1\n", dv->sup_2160p60hz ? "60" : "30"); |
| 893 | printf("Support mode:\n"); |
| 894 | printf(" DV_RGB_444_8BIT\n"); |
| 895 | if (dv->sup_yuv422_12bit) |
| 896 | printf(" DV_YCbCr_422_12BIT\n"); |
| 897 | } |
| 898 | if (dv->ver == 1) { |
| 899 | printf("VSVDB Version: V%d(%d-byte)\n", dv->ver, dv->length + 1); |
| 900 | if (dv->length == 0xB) { |
| 901 | printf("2160p%shz: 1\n", dv->sup_2160p60hz ? "60" : "30"); |
| 902 | printf("Support mode:\n"); |
| 903 | printf(" DV_RGB_444_8BIT\n"); |
| 904 | if (dv->sup_yuv422_12bit) |
| 905 | printf(" DV_YCbCr_422_12BIT\n"); |
| 906 | if (dv->low_latency == 0x01) |
| 907 | printf(" LL_YCbCr_422_12BIT\n"); |
| 908 | } |
| 909 | |
| 910 | if (dv->length == 0xE) { |
| 911 | printf("2160p%shz: 1\n", dv->sup_2160p60hz ? "60" : "30"); |
| 912 | printf("Support mode:\n"); |
| 913 | printf(" DV_RGB_444_8BIT\n"); |
| 914 | if (dv->sup_yuv422_12bit) |
| 915 | printf(" DV_YCbCr_422_12BIT\n"); |
| 916 | } |
| 917 | } |
| 918 | if (dv->ver == 2) { |
| 919 | printf("VSVDB Version: V%d\n", dv->ver); |
| 920 | printf("2160p%shz: 1\n", dv->sup_2160p60hz ? "60" : "30"); |
| 921 | printf("Support mode:\n"); |
| 922 | if (dv->Interface != 0x00 && dv->Interface != 0x01) { |
| 923 | printf(" DV_RGB_444_8BIT\n"); |
| 924 | if (dv->sup_yuv422_12bit) |
| 925 | printf(" DV_YCbCr_422_12BIT\n"); |
| 926 | } |
| 927 | printf(" LL_YCbCr_422_12BIT\n"); |
| 928 | if (dv->Interface == 0x01 || dv->Interface == 0x03) { |
| 929 | if (dv->sup_10b_12b_444 == 0x1) |
| 930 | printf(" LL_RGB_444_10BIT\n"); |
| 931 | if (dv->sup_10b_12b_444 == 0x2) |
| 932 | printf(" LL_RGB_444_12BIT\n"); |
| 933 | } |
| 934 | } |
| 935 | printf("IEEEOUI: 0x%06x\n", dv->ieeeoui); |
| 936 | printf("VSVDB: "); |
| 937 | for (i = 0; i < (dv->length + 1); i++) |
| 938 | printf("%02x", dv->rawdata[i]); |
| 939 | printf("\n"); |
| 940 | } |
| 941 | |
| 942 | static void dv_cap_show(struct hdmitx_dev *hdev) |
| 943 | { |
| 944 | const struct dv_info *dv = &hdev->RXCap.dv_info; |
| 945 | |
| 946 | printf("dv_cap\n"); |
| 947 | if (dv->ieeeoui != DV_IEEE_OUI) { |
| 948 | printf("The Rx don't support DolbyVision\n"); |
| 949 | return; |
| 950 | } |
| 951 | _dv_cap_show(dv); |
| 952 | } |
| 953 | |
| 954 | static void edid_cap_show(struct hdmitx_dev *hdev) |
| 955 | { |
| 956 | int i; |
| 957 | struct rx_cap *prxcap = &hdev->RXCap; |
| 958 | |
xiang.wu1 | 14497ab | 2024-02-21 14:57:05 +0800 | [diff] [blame] | 959 | printf("Rx EDID Parse:\n"); |
| 960 | printf("Rx Manufacturer Name: %s\n", prxcap->IDManufacturerName); |
| 961 | printf("Rx Product Code: %02x%02x\n", |
| 962 | prxcap->IDProductCode[0], prxcap->IDProductCode[1]); |
| 963 | printf("Rx Serial Number: %02x%02x%02x%02x\n", |
| 964 | prxcap->IDSerialNumber[0], |
| 965 | prxcap->IDSerialNumber[1], |
| 966 | prxcap->IDSerialNumber[2], |
| 967 | prxcap->IDSerialNumber[3]); |
| 968 | printf("Rx Product Name: %s\n", prxcap->ReceiverProductName); |
Wenjie Qiao | 8a73a56 | 2023-02-23 18:37:14 +0800 | [diff] [blame] | 969 | |
xiang.wu1 | 14497ab | 2024-02-21 14:57:05 +0800 | [diff] [blame] | 970 | printf("Manufacture Week: %d\n", prxcap->manufacture_week); |
| 971 | printf("Manufacture Year: %d\n", prxcap->manufacture_year + 1990); |
Wenjie Qiao | 8a73a56 | 2023-02-23 18:37:14 +0800 | [diff] [blame] | 972 | |
xiang.wu1 | 14497ab | 2024-02-21 14:57:05 +0800 | [diff] [blame] | 973 | printf("Physical size(mm): %d x %d\n", |
| 974 | prxcap->physical_width, prxcap->physical_height); |
| 975 | |
| 976 | printf("EDID Version: %d.%d\n", |
| 977 | prxcap->edid_version, prxcap->edid_revision); |
| 978 | |
lizhi.hu | 506ddfa | 2024-07-10 21:35:41 +0800 | [diff] [blame] | 979 | /* |
| 980 | * printf( |
xiang.wu1 | 14497ab | 2024-02-21 14:57:05 +0800 | [diff] [blame] | 981 | * "EDID block number: 0x%x\n", tx_comm->EDID_buf[0x7e]); |
| 982 | * |
| 983 | * |
| 984 | * printf( |
| 985 | * "Source Physical Address[a.b.c.d]: %x.%x.%x.%x\n", |
| 986 | * hdmitx_device->hdmi_info.vsdb_phy_addr.a, |
| 987 | * hdmitx_device->hdmi_info.vsdb_phy_addr.b, |
| 988 | * hdmitx_device->hdmi_info.vsdb_phy_addr.c, |
| 989 | * hdmitx_device->hdmi_info.vsdb_phy_addr.d); |
| 990 | */ |
| 991 | |
lizhi.hu | 506ddfa | 2024-07-10 21:35:41 +0800 | [diff] [blame] | 992 | /* TODO native_vic2 */ |
Wenjie Qiao | 8a73a56 | 2023-02-23 18:37:14 +0800 | [diff] [blame] | 993 | printf("native Mode %x, VIC (native %d):\n", |
xiang.wu1 | 14497ab | 2024-02-21 14:57:05 +0800 | [diff] [blame] | 994 | prxcap->native_Mode, prxcap->native_vic); |
Wenjie Qiao | 8a73a56 | 2023-02-23 18:37:14 +0800 | [diff] [blame] | 995 | |
| 996 | printf("ColorDeepSupport %x\n", prxcap->ColorDeepSupport); |
| 997 | |
xiang.wu1 | 14497ab | 2024-02-21 14:57:05 +0800 | [diff] [blame] | 998 | for (i = 0; i < prxcap->VIC_count ; i++) { |
Wenjie Qiao | 8a73a56 | 2023-02-23 18:37:14 +0800 | [diff] [blame] | 999 | printf("%d ", prxcap->VIC[i]); |
xiang.wu1 | 14497ab | 2024-02-21 14:57:05 +0800 | [diff] [blame] | 1000 | } |
Wenjie Qiao | 8a73a56 | 2023-02-23 18:37:14 +0800 | [diff] [blame] | 1001 | printf("\n"); |
xiang.wu1 | 14497ab | 2024-02-21 14:57:05 +0800 | [diff] [blame] | 1002 | printf("Audio {format, channel, freq, cce}\n"); |
| 1003 | for (i = 0; i < prxcap->AUD_count; i++) { |
| 1004 | printf("{%d, %d, %x, %x}\n", |
| 1005 | prxcap->RxAudioCap[i].audio_format_code, |
| 1006 | prxcap->RxAudioCap[i].channel_num_max, |
| 1007 | prxcap->RxAudioCap[i].freq_cc, |
| 1008 | prxcap->RxAudioCap[i].cc3); |
| 1009 | } |
| 1010 | printf("Speaker Allocation: %x\n", prxcap->RxSpeakerAllocation); |
| 1011 | printf("Vendor: 0x%x ( %s device)\n", prxcap->ieeeoui, (prxcap->ieeeoui) ? "HDMI" : "DVI"); |
Wenjie Qiao | 8a73a56 | 2023-02-23 18:37:14 +0800 | [diff] [blame] | 1012 | |
| 1013 | printf("MaxTMDSClock1 %d MHz\n", prxcap->Max_TMDS_Clock1 * 5); |
| 1014 | |
xiang.wu1 | 14497ab | 2024-02-21 14:57:05 +0800 | [diff] [blame] | 1015 | if (prxcap->hf_ieeeoui) { |
| 1016 | printf("Vendor2: 0x%x\n", |
| 1017 | prxcap->hf_ieeeoui); |
| 1018 | printf("MaxTMDSClock2 %d MHz\n", |
| 1019 | prxcap->Max_TMDS_Clock2 * 5); |
Wenjie Qiao | 8a73a56 | 2023-02-23 18:37:14 +0800 | [diff] [blame] | 1020 | } |
| 1021 | |
xiang.wu1 | 14497ab | 2024-02-21 14:57:05 +0800 | [diff] [blame] | 1022 | printf("MaxFRLRate: %d\n", prxcap->max_frl_rate); |
Wenjie Qiao | 8a73a56 | 2023-02-23 18:37:14 +0800 | [diff] [blame] | 1023 | |
xiang.wu1 | 14497ab | 2024-02-21 14:57:05 +0800 | [diff] [blame] | 1024 | if (prxcap->allm) |
| 1025 | printf("ALLM: %x\n", prxcap->allm); |
Wenjie Qiao | 8a73a56 | 2023-02-23 18:37:14 +0800 | [diff] [blame] | 1026 | |
xiang.wu1 | 14497ab | 2024-02-21 14:57:05 +0800 | [diff] [blame] | 1027 | if (prxcap->cnc3) |
| 1028 | printf("Game/CNC3: %x\n", prxcap->cnc3); |
Wenjie Qiao | 8a73a56 | 2023-02-23 18:37:14 +0800 | [diff] [blame] | 1029 | |
xiang.wu1 | 14497ab | 2024-02-21 14:57:05 +0800 | [diff] [blame] | 1030 | printf("vLatency: "); |
| 1031 | if (prxcap->vLatency == LATENCY_INVALID_UNKNOWN) |
Wenjie Qiao | 8a73a56 | 2023-02-23 18:37:14 +0800 | [diff] [blame] | 1032 | printf(" Invalid/Unknown\n"); |
xiang.wu1 | 14497ab | 2024-02-21 14:57:05 +0800 | [diff] [blame] | 1033 | else if (prxcap->vLatency == LATENCY_NOT_SUPPORT) |
Wenjie Qiao | 8a73a56 | 2023-02-23 18:37:14 +0800 | [diff] [blame] | 1034 | printf(" UnSupported\n"); |
| 1035 | else |
xiang.wu1 | 14497ab | 2024-02-21 14:57:05 +0800 | [diff] [blame] | 1036 | printf(" %d\n", prxcap->vLatency); |
| 1037 | |
| 1038 | printf("aLatency: "); |
| 1039 | if (prxcap->aLatency == LATENCY_INVALID_UNKNOWN) |
| 1040 | printf(" Invalid/Unknown\n"); |
| 1041 | else if (prxcap->aLatency == LATENCY_NOT_SUPPORT) |
| 1042 | printf(" UnSupported\n"); |
| 1043 | else |
| 1044 | printf(" %d\n", prxcap->aLatency); |
| 1045 | |
| 1046 | printf("i_vLatency: "); |
| 1047 | if (prxcap->i_vLatency == LATENCY_INVALID_UNKNOWN) |
| 1048 | printf(" Invalid/Unknown\n"); |
| 1049 | else if (prxcap->i_vLatency == LATENCY_NOT_SUPPORT) |
| 1050 | printf(" UnSupported\n"); |
| 1051 | else |
| 1052 | printf(" %d\n", prxcap->i_vLatency); |
| 1053 | |
| 1054 | printf("i_aLatency: "); |
| 1055 | if (prxcap->i_aLatency == LATENCY_INVALID_UNKNOWN) |
| 1056 | printf(" Invalid/Unknown\n"); |
| 1057 | else if (prxcap->i_aLatency == LATENCY_NOT_SUPPORT) |
| 1058 | printf(" UnSupported\n"); |
| 1059 | else |
| 1060 | printf(" %d\n", prxcap->i_aLatency); |
Wenjie Qiao | 8a73a56 | 2023-02-23 18:37:14 +0800 | [diff] [blame] | 1061 | |
| 1062 | if (prxcap->colorimetry_data) |
| 1063 | printf("ColorMetry: 0x%x\n", prxcap->colorimetry_data); |
Wenjie Qiao | 8a73a56 | 2023-02-23 18:37:14 +0800 | [diff] [blame] | 1064 | |
xiang.wu1 | 14497ab | 2024-02-21 14:57:05 +0800 | [diff] [blame] | 1065 | printf("SCDC: %x\n", prxcap->scdc_present); |
| 1066 | |
| 1067 | printf("RR_Cap: %x\n", |
| 1068 | prxcap->scdc_rr_capable); |
| 1069 | printf("LTE_340M_Scramble: %x\n", |
| 1070 | prxcap->lte_340mcsc_scramble); |
| 1071 | /* dsc capability */ |
| 1072 | printf("dsc_10bpc: %d\n", |
| 1073 | prxcap->dsc_10bpc); |
| 1074 | printf("dsc_12bpc: %d\n", |
| 1075 | prxcap->dsc_12bpc); |
| 1076 | printf("dsc_16bpc: %d\n", |
| 1077 | prxcap->dsc_16bpc); |
| 1078 | printf("dsc_all_bpp: %d\n", |
| 1079 | prxcap->dsc_all_bpp); |
| 1080 | printf("dsc_native_420: %d\n", |
| 1081 | prxcap->dsc_native_420); |
| 1082 | printf("dsc_1p2: %d\n", |
| 1083 | prxcap->dsc_1p2); |
| 1084 | printf("dsc_max_slices: 0x%x(%d slices)\n", |
| 1085 | prxcap->dsc_max_slices, dsc_max_slices_num[prxcap->dsc_max_slices]); |
| 1086 | printf("dsc_max_frl_rate: 0x%x\n", |
| 1087 | prxcap->dsc_max_frl_rate); |
| 1088 | printf("dsc_total_chunk_bytes: 0x%x\n", |
| 1089 | prxcap->dsc_total_chunk_bytes); |
| 1090 | if (prxcap->dv_info.ieeeoui == DOVI_IEEEOUI) |
Wenjie Qiao | 8a73a56 | 2023-02-23 18:37:14 +0800 | [diff] [blame] | 1091 | printf(" DolbyVision%d", prxcap->dv_info.ver); |
xiang.wu1 | 14497ab | 2024-02-21 14:57:05 +0800 | [diff] [blame] | 1092 | |
| 1093 | if (prxcap->hdr_info2.hdr_support) |
| 1094 | printf(" HDR/%d", |
| 1095 | prxcap->hdr_info2.hdr_support); |
| 1096 | if (prxcap->hdr_info.sbtm_info.sbtm_support) |
| 1097 | printf(" SBTM"); |
Wenjie Qiao | 8a73a56 | 2023-02-23 18:37:14 +0800 | [diff] [blame] | 1098 | if (prxcap->dc_y444 || prxcap->dc_30bit || prxcap->dc_30bit_420) |
| 1099 | printf(" DeepColor"); |
| 1100 | printf("\n"); |
xiang.wu1 | 14497ab | 2024-02-21 14:57:05 +0800 | [diff] [blame] | 1101 | printf("additional_vsif_num: %d\n", prxcap->additional_vsif_num); |
| 1102 | printf("ifdb_present: %d\n", prxcap->ifdb_present); |
lizhi.hu | 506ddfa | 2024-07-10 21:35:41 +0800 | [diff] [blame] | 1103 | /* |
| 1104 | * for checkvalue which maybe used by application to adjust |
xiang.wu1 | 14497ab | 2024-02-21 14:57:05 +0800 | [diff] [blame] | 1105 | * whether edid is changed |
| 1106 | */ |
| 1107 | printf("checkvalue: %s\n", prxcap->hdmichecksum); |
| 1108 | |
Wenjie Qiao | 8a73a56 | 2023-02-23 18:37:14 +0800 | [diff] [blame] | 1109 | } |
| 1110 | |
| 1111 | static int do_info(cmd_tbl_t *cmdtp, int flag, int argc, char *const argv[]) |
| 1112 | { |
| 1113 | struct hdmitx_dev *hdev = get_hdmitx21_device(); |
| 1114 | struct hdmi_format_para *para; |
| 1115 | |
| 1116 | if (!hdev) { |
| 1117 | pr_info("null hdmitx dev\n"); |
| 1118 | return CMD_RET_FAILURE; |
| 1119 | } |
| 1120 | if (!hdev->para) { |
| 1121 | printf("null hdmitx para\n"); |
| 1122 | return CMD_RET_FAILURE; |
| 1123 | } |
| 1124 | |
| 1125 | para = hdev->para; |
| 1126 | printf("current mode %s vic %d\n", para->timing.name, hdev->vic); |
| 1127 | printf("cd%d cs%d cr%d\n", para->cd, para->cs, para->cr); |
| 1128 | printf("enc_idx %d\n", hdev->enc_idx); |
| 1129 | printf("frac_rate: %d\n", hdev->frac_rate_policy); |
| 1130 | printf("Rx EDID info\n"); |
| 1131 | dump_full_edid(hdev->rawedid); |
| 1132 | disp_cap_show(hdev); |
| 1133 | vesa_cap_show(hdev); |
| 1134 | aud_cap_show(hdev); |
| 1135 | hdr_cap_show(hdev); |
| 1136 | dv_cap_show(hdev); |
| 1137 | dc_cap_show(hdev); |
| 1138 | edid_cap_show(hdev); |
Wenjie Qiao | af3ac88 | 2024-05-29 10:12:12 +0800 | [diff] [blame] | 1139 | printf("dsc policy: %d, enable: %d\n", hdev->tx_common.tx_hw->hdmi_tx_cap.dsc_policy, |
| 1140 | para->dsc_en); |
| 1141 | printf("frl_rate: %d\n", hdev->para->frl_rate); |
Wenjie Qiao | 8a73a56 | 2023-02-23 18:37:14 +0800 | [diff] [blame] | 1142 | return 1; |
| 1143 | } |
| 1144 | |
| 1145 | static int xtochar(int num, char *checksum) |
| 1146 | { |
| 1147 | struct hdmitx_dev *hdev = get_hdmitx21_device(); |
| 1148 | |
| 1149 | if (((hdev->rawedid[num] >> 4) & 0xf) <= 9) |
| 1150 | checksum[0] = ((hdev->rawedid[num] >> 4) & 0xf) + '0'; |
| 1151 | else |
| 1152 | checksum[0] = ((hdev->rawedid[num] >> 4) & 0xf) - 10 + 'a'; |
| 1153 | |
| 1154 | if ((hdev->rawedid[num] & 0xf) <= 9) |
| 1155 | checksum[1] = (hdev->rawedid[num] & 0xf) + '0'; |
| 1156 | else |
| 1157 | checksum[1] = (hdev->rawedid[num] & 0xf) - 10 + 'a'; |
| 1158 | |
| 1159 | return 0; |
| 1160 | } |
| 1161 | |
lizhi.hu | 506ddfa | 2024-07-10 21:35:41 +0800 | [diff] [blame] | 1162 | /* |
| 1163 | * hdr_priority definition: |
Wenjie Qiao | 4bdbbee | 2024-02-01 10:16:44 +0800 | [diff] [blame] | 1164 | * strategy1: bit[3:0] |
| 1165 | * 0: original cap |
| 1166 | * 1: disable dolby vision cap |
| 1167 | * 2: disable dolby vision and hdr/hlg cap |
| 1168 | * strategy2: |
| 1169 | * bit4: 1: disable dv 0:enable dv |
| 1170 | * bit5: 1: disable hdr10/hdr10+ 0: enable hdr10/hdr10+ |
| 1171 | * bit6: 1: disable hlg 0: enable hlg |
| 1172 | * bit28-bit31 choose strategy: bit[31:28] |
| 1173 | * 0: strategy1 |
| 1174 | * 1: strategy2 |
| 1175 | */ |
| 1176 | |
lizhi.hu | 506ddfa | 2024-07-10 21:35:41 +0800 | [diff] [blame] | 1177 | /* |
| 1178 | * for uboot, there is no need to dynamically change the hdr_priority as |
Wenjie Qiao | 4bdbbee | 2024-02-01 10:16:44 +0800 | [diff] [blame] | 1179 | * kernel. So below functions only implement the disable_xxx_info() function, |
| 1180 | * and leave the enable_xxx_info as blank |
| 1181 | */ |
| 1182 | |
| 1183 | /* dv_info */ |
| 1184 | static void enable_dv_info(struct dv_info *des, const struct dv_info *src) |
| 1185 | { |
| 1186 | if (!des || !src) |
| 1187 | return; |
| 1188 | } |
| 1189 | |
| 1190 | static void disable_dv_info(struct dv_info *des) |
| 1191 | { |
| 1192 | if (!des) |
| 1193 | return; |
| 1194 | |
| 1195 | memset(des, 0, sizeof(*des)); |
| 1196 | } |
| 1197 | |
| 1198 | /* hdr10 */ |
| 1199 | static void enable_hdr10_info(struct hdr_info *des, const struct hdr_info *src) |
| 1200 | { |
| 1201 | if (!des || !src) |
| 1202 | return; |
| 1203 | } |
| 1204 | |
| 1205 | static void disable_hdr10_info(struct hdr_info *des) |
| 1206 | { |
| 1207 | if (!des) |
| 1208 | return; |
| 1209 | |
xiang.wu1 | 14497ab | 2024-02-21 14:57:05 +0800 | [diff] [blame] | 1210 | des->hdr_support = des->hdr_support & 0xB; |
| 1211 | des->static_metadata_type1 = 0; |
| 1212 | des->lumi_max = 0; |
| 1213 | des->lumi_avg = 0; |
| 1214 | des->lumi_min = 0; |
Wenjie Qiao | 4bdbbee | 2024-02-01 10:16:44 +0800 | [diff] [blame] | 1215 | } |
| 1216 | |
| 1217 | /* hdr10plus */ |
| 1218 | static void enable_hdr10p_info(struct hdr10_plus_info *des, const struct hdr10_plus_info *src) |
| 1219 | { |
| 1220 | if (!des || !src) |
| 1221 | return; |
| 1222 | } |
| 1223 | |
| 1224 | static void disable_hdr10p_info(struct hdr10_plus_info *des) |
| 1225 | { |
| 1226 | if (!des) |
| 1227 | return; |
| 1228 | |
| 1229 | memset(des, 0, sizeof(*des)); |
| 1230 | } |
| 1231 | |
| 1232 | /* hlg */ |
| 1233 | static void enable_hlg_info(struct hdr_info *des, const struct hdr_info *src) |
| 1234 | { |
| 1235 | if (!des || !src) |
| 1236 | return; |
| 1237 | } |
| 1238 | |
| 1239 | static void disable_hlg_info(struct hdr_info *des) |
| 1240 | { |
| 1241 | if (!des) |
| 1242 | return; |
| 1243 | |
xiang.wu1 | 14497ab | 2024-02-21 14:57:05 +0800 | [diff] [blame] | 1244 | des->hdr_support = des->hdr_support & 0x7; |
Wenjie Qiao | 4bdbbee | 2024-02-01 10:16:44 +0800 | [diff] [blame] | 1245 | } |
| 1246 | |
| 1247 | static void enable_all_hdr_info(struct rx_cap *prxcap) |
| 1248 | { |
| 1249 | if (!prxcap) |
| 1250 | return; |
| 1251 | } |
| 1252 | |
| 1253 | static void update_hdr_strategy1(struct rx_cap *prxcap, u32 strategy) |
| 1254 | { |
| 1255 | if (!prxcap) |
| 1256 | return; |
| 1257 | |
| 1258 | switch (strategy) { |
| 1259 | case 0: |
| 1260 | enable_all_hdr_info(prxcap); |
| 1261 | break; |
| 1262 | case 1: |
| 1263 | disable_dv_info(&prxcap->dv_info); |
| 1264 | break; |
| 1265 | case 2: |
| 1266 | disable_dv_info(&prxcap->dv_info); |
| 1267 | disable_hdr10_info(&prxcap->hdr_info); |
xiang.wu1 | 14497ab | 2024-02-21 14:57:05 +0800 | [diff] [blame] | 1268 | disable_hdr10p_info(&prxcap->hdr_info.hdr10plus_info); |
Wenjie Qiao | 4bdbbee | 2024-02-01 10:16:44 +0800 | [diff] [blame] | 1269 | disable_hlg_info(&prxcap->hdr_info); |
| 1270 | break; |
| 1271 | default: |
| 1272 | break; |
| 1273 | } |
| 1274 | } |
| 1275 | |
| 1276 | static void update_hdr_strategy2(struct rx_cap *prxcap, u32 strategy) |
| 1277 | { |
| 1278 | if (!prxcap) |
| 1279 | return; |
| 1280 | |
| 1281 | /* bit4: 1 disable dv 0 enable dv */ |
| 1282 | if (strategy & BIT(4)) |
| 1283 | disable_dv_info(&prxcap->dv_info); |
| 1284 | else |
| 1285 | enable_dv_info(&prxcap->dv_info, NULL); |
| 1286 | /* bit5: 1 disable hdr10/hdr10+ 0 enable hdr10/hdr10+ */ |
| 1287 | if (strategy & BIT(5)) { |
| 1288 | disable_hdr10_info(&prxcap->hdr_info); |
xiang.wu1 | 14497ab | 2024-02-21 14:57:05 +0800 | [diff] [blame] | 1289 | disable_hdr10p_info(&prxcap->hdr_info.hdr10plus_info); |
Wenjie Qiao | 4bdbbee | 2024-02-01 10:16:44 +0800 | [diff] [blame] | 1290 | } else { |
| 1291 | enable_hdr10_info(&prxcap->hdr_info, NULL); |
xiang.wu1 | 14497ab | 2024-02-21 14:57:05 +0800 | [diff] [blame] | 1292 | enable_hdr10p_info(&prxcap->hdr_info.hdr10plus_info, NULL); |
Wenjie Qiao | 4bdbbee | 2024-02-01 10:16:44 +0800 | [diff] [blame] | 1293 | } |
| 1294 | /* bit6: 1 disable hlg 0 enable hlg */ |
| 1295 | if (strategy & BIT(6)) |
| 1296 | disable_hlg_info(&prxcap->hdr_info); |
| 1297 | else |
| 1298 | enable_hlg_info(&prxcap->hdr_info, NULL); |
| 1299 | } |
| 1300 | |
| 1301 | static int hdmitx_set_hdr_priority(struct rx_cap *prxcap, u32 hdr_priority) |
| 1302 | { |
| 1303 | u32 choose = 0; |
| 1304 | u32 strategy = 0; |
| 1305 | |
| 1306 | if (!prxcap) |
| 1307 | return -1; |
| 1308 | |
| 1309 | printf("%s, set hdr_prio: %u\n", __func__, hdr_priority); |
| 1310 | /* choose strategy: bit[31:28] */ |
| 1311 | choose = (hdr_priority >> 28) & 0xf; |
| 1312 | switch (choose) { |
| 1313 | case 0: |
| 1314 | strategy = hdr_priority & 0xf; |
| 1315 | update_hdr_strategy1(prxcap, strategy); |
| 1316 | break; |
| 1317 | case 1: |
| 1318 | strategy = hdr_priority & 0xf0; |
| 1319 | update_hdr_strategy2(prxcap, strategy); |
| 1320 | break; |
| 1321 | default: |
| 1322 | break; |
| 1323 | } |
| 1324 | return 0; |
| 1325 | } |
| 1326 | |
xiang.wu1 | 00ee50f | 2024-05-21 19:39:45 +0800 | [diff] [blame] | 1327 | void hdmitx_update_dv_strategy_info(struct dv_info *dv) |
| 1328 | { |
| 1329 | if (dv->ver == 0) { |
| 1330 | if (dv->length == 0x19) |
| 1331 | dv->support_DV_RGB_444_8BIT = 1; |
| 1332 | } |
| 1333 | |
| 1334 | if (dv->ver == 1) { |
| 1335 | if (dv->length == 0x0B) { |
| 1336 | dv->support_DV_RGB_444_8BIT = 1; |
| 1337 | if (dv->low_latency == 0x01) |
| 1338 | dv->support_LL_YCbCr_422_12BIT = 1; |
| 1339 | } else if (dv->length == 0x0E) { |
| 1340 | dv->support_DV_RGB_444_8BIT = 1; |
| 1341 | } |
| 1342 | } |
| 1343 | |
| 1344 | if (dv->ver == 2) { |
| 1345 | if (dv->length >= 0x0B) { |
| 1346 | if (dv->Interface != 0x00 && dv->Interface != 0x01) |
| 1347 | dv->support_DV_RGB_444_8BIT = 1; |
| 1348 | dv->support_LL_YCbCr_422_12BIT = 1; |
| 1349 | if (dv->Interface == 0x01 || dv->Interface == 0x03) { |
| 1350 | if (dv->sup_10b_12b_444 == 0x1) |
| 1351 | dv->support_LL_RGB_444_10BIT = 1; |
| 1352 | if (dv->sup_10b_12b_444 == 0x2) |
| 1353 | dv->support_LL_RGB_444_12BIT = 1; |
| 1354 | } |
| 1355 | } |
| 1356 | } |
| 1357 | } |
| 1358 | |
Wenjie Qiao | 8a73a56 | 2023-02-23 18:37:14 +0800 | [diff] [blame] | 1359 | static void get_parse_edid_data(struct hdmitx_dev *hdev) |
| 1360 | { |
xiang.wu1 | 2a0497a | 2024-09-29 17:41:20 +0800 | [diff] [blame] | 1361 | int hdr_priority = get_hdr_strategy_priority(); |
| 1362 | |
Wenjie Qiao | 8a73a56 | 2023-02-23 18:37:14 +0800 | [diff] [blame] | 1363 | hdev->hwop.read_edid(hdev->rawedid); |
| 1364 | |
ruofei.zhao | 4a2ec0c | 2023-10-31 19:24:41 +0800 | [diff] [blame] | 1365 | /* dump edid raw data */ |
| 1366 | dump_full_edid(hdev->rawedid); |
Wenjie Qiao | 8a73a56 | 2023-02-23 18:37:14 +0800 | [diff] [blame] | 1367 | |
| 1368 | /* parse edid data */ |
xiang.wu1 | 14497ab | 2024-02-21 14:57:05 +0800 | [diff] [blame] | 1369 | hdmitx_edid_parse(&hdev->RXCap, hdev->rawedid); |
Wenjie Qiao | 8a73a56 | 2023-02-23 18:37:14 +0800 | [diff] [blame] | 1370 | |
xiang.wu1 | 00ee50f | 2024-05-21 19:39:45 +0800 | [diff] [blame] | 1371 | /* Update the member variables used by the dv running strategy */ |
| 1372 | hdmitx_update_dv_strategy_info(&hdev->RXCap.dv_info); |
| 1373 | hdmitx_update_dv_strategy_info(&hdev->RXCap.dv_info2); |
| 1374 | |
xiang.wu1 | 2a0497a | 2024-09-29 17:41:20 +0800 | [diff] [blame] | 1375 | /* |
| 1376 | * For the first boot after burning, if the hdr_priority environment |
| 1377 | * variable is not configured, need to set it manually to avoid |
| 1378 | * the inconsistency between the value of the hdr_priority environment |
| 1379 | * variable and the result of the Google hdr policy during the boot |
| 1380 | * process, causing the TV to flash black. |
xiang.wu1 | 702bdd1 | 2024-10-22 16:24:40 +0800 | [diff] [blame^] | 1381 | * Android use strategy2: |
xiang.wu1 | 2a0497a | 2024-09-29 17:41:20 +0800 | [diff] [blame] | 1382 | * 268435456 = 0x10000000, DV priority |
xiang.wu1 | 702bdd1 | 2024-10-22 16:24:40 +0800 | [diff] [blame^] | 1383 | * 268435472 = 0x10000010, HDR priority |
| 1384 | * Linux Yocto not set |
xiang.wu1 | 2a0497a | 2024-09-29 17:41:20 +0800 | [diff] [blame] | 1385 | */ |
| 1386 | if (hdr_priority == -1) { |
xiang.wu1 | 702bdd1 | 2024-10-22 16:24:40 +0800 | [diff] [blame^] | 1387 | #ifndef CONFIG_YOCTO |
xiang.wu1 | 2a0497a | 2024-09-29 17:41:20 +0800 | [diff] [blame] | 1388 | if (is_amdolby_enabled()) { |
| 1389 | hdr_priority = 268435456; |
| 1390 | env_set("hdr_priority", "268435456"); |
| 1391 | } else { |
| 1392 | hdr_priority = 268435472; |
| 1393 | env_set("hdr_priority", "268435472"); |
| 1394 | } |
xiang.wu1 | 702bdd1 | 2024-10-22 16:24:40 +0800 | [diff] [blame^] | 1395 | #endif |
xiang.wu1 | 2a0497a | 2024-09-29 17:41:20 +0800 | [diff] [blame] | 1396 | } |
| 1397 | |
Wenjie Qiao | af3ac88 | 2024-05-29 10:12:12 +0800 | [diff] [blame] | 1398 | memcpy(&hdev->tx_common.rxcap, &hdev->RXCap, sizeof(hdev->tx_common.rxcap)); |
Wenjie Qiao | 8a73a56 | 2023-02-23 18:37:14 +0800 | [diff] [blame] | 1399 | } |
| 1400 | |
| 1401 | /* policy process: to find the output mode/attr/dv_type */ |
| 1402 | void scene_process(struct hdmitx_dev *hdev, |
xiang.wu1 | 8cf0cd1 | 2024-06-13 15:27:52 +0800 | [diff] [blame] | 1403 | struct meson_policy_out *output) |
Wenjie Qiao | 8a73a56 | 2023-02-23 18:37:14 +0800 | [diff] [blame] | 1404 | { |
xiang.wu1 | 8cf0cd1 | 2024-06-13 15:27:52 +0800 | [diff] [blame] | 1405 | struct meson_policy_in input; |
Wenjie Qiao | 8a73a56 | 2023-02-23 18:37:14 +0800 | [diff] [blame] | 1406 | |
xiang.wu1 | 8cf0cd1 | 2024-06-13 15:27:52 +0800 | [diff] [blame] | 1407 | hdmitx_set_mode_policy(); |
| 1408 | memset(&input, 0, sizeof(struct meson_policy_in)); |
| 1409 | get_hdmi_input(hdev, &input); |
| 1410 | hdmitx_get_policy_output(output); |
Wenjie Qiao | 8a73a56 | 2023-02-23 18:37:14 +0800 | [diff] [blame] | 1411 | } |
| 1412 | |
| 1413 | static int do_get_parse_edid(cmd_tbl_t *cmdtp, int flag, int argc, char *const argv[]) |
| 1414 | { |
| 1415 | struct hdmitx_dev *hdev = get_hdmitx21_device(); |
| 1416 | unsigned char *edid = hdev->rawedid; |
| 1417 | unsigned char *store_checkvalue; |
Wenjie Qiao | 8a73a56 | 2023-02-23 18:37:14 +0800 | [diff] [blame] | 1418 | unsigned int i; |
| 1419 | unsigned int checkvalue[4]; |
| 1420 | unsigned int checkvalue1; |
| 1421 | unsigned int checkvalue2; |
| 1422 | char checksum[11]; |
| 1423 | unsigned char def_cksum[] = {'0', 'x', '0', '0', '0', '0', '0', '0', '0', '0', '\0'}; |
| 1424 | char *hdmimode; |
| 1425 | char *colorattribute; |
xiang.wu1 | a6d6f1d | 2023-08-04 14:13:00 +0800 | [diff] [blame] | 1426 | int user_dv_mode; |
| 1427 | char *last_output_mode; |
| 1428 | char *last_colorattribute; |
| 1429 | int last_dv_status; |
| 1430 | bool over_write = false; |
Wenjie Qiao | 8a73a56 | 2023-02-23 18:37:14 +0800 | [diff] [blame] | 1431 | char dv_type[2] = {0}; |
xiang.wu1 | 8cf0cd1 | 2024-06-13 15:27:52 +0800 | [diff] [blame] | 1432 | struct meson_policy_out output; |
Wenjie Qiao | 389d3ea | 2023-05-25 16:07:03 +0800 | [diff] [blame] | 1433 | struct hdmi_format_para *para = NULL; |
| 1434 | bool mode_support = false; |
xiang.wu1 | 2a0497a | 2024-09-29 17:41:20 +0800 | [diff] [blame] | 1435 | int hdr_priority = get_hdr_strategy_priority(); |
lizhi.hu | 506ddfa | 2024-07-10 21:35:41 +0800 | [diff] [blame] | 1436 | /* |
| 1437 | * hdmi_mode / colorattribute may be null or "none". |
Wenjie Qiao | 389d3ea | 2023-05-25 16:07:03 +0800 | [diff] [blame] | 1438 | * if either is null or "none", it means user not |
| 1439 | * selected manually, and need to select the best |
| 1440 | * mode or colorattribute by policy |
| 1441 | */ |
| 1442 | bool no_manual_output = false; |
Wenjie Qiao | 8a73a56 | 2023-02-23 18:37:14 +0800 | [diff] [blame] | 1443 | |
zongdong.jiao | b6fa996 | 2024-08-25 19:51:48 +0800 | [diff] [blame] | 1444 | memset(edid, 0, EDID_BLK_SIZE * EDID_MAX_BLOCK); |
| 1445 | |
Wenjie Qiao | 4bdbbee | 2024-02-01 10:16:44 +0800 | [diff] [blame] | 1446 | if (!hdev->hpd_state) { |
Wenjie Qiao | 8a73a56 | 2023-02-23 18:37:14 +0800 | [diff] [blame] | 1447 | printf("HDMI HPD low, no need parse EDID\n"); |
| 1448 | return 1; |
| 1449 | } |
xiang.wu1 | 8cf0cd1 | 2024-06-13 15:27:52 +0800 | [diff] [blame] | 1450 | memset(&output, 0, sizeof(struct meson_policy_out)); |
Wenjie Qiao | 8a73a56 | 2023-02-23 18:37:14 +0800 | [diff] [blame] | 1451 | |
| 1452 | get_parse_edid_data(hdev); |
zongdong.jiao | b6fa996 | 2024-08-25 19:51:48 +0800 | [diff] [blame] | 1453 | /* |
| 1454 | * QMS BRR selection |
| 1455 | * 120 or 60 |
| 1456 | * TX cap & Rx Cap |
| 1457 | */ |
| 1458 | if (0) |
| 1459 | qms_scene_pre_process(hdev); |
Wenjie Qiao | 8a73a56 | 2023-02-23 18:37:14 +0800 | [diff] [blame] | 1460 | |
| 1461 | /* check if the tv has changed or anything wrong */ |
| 1462 | store_checkvalue = (unsigned char *)env_get("hdmichecksum"); |
Wenjie Qiao | 389d3ea | 2023-05-25 16:07:03 +0800 | [diff] [blame] | 1463 | /* get user selected output mode/color */ |
| 1464 | colorattribute = env_get("user_colorattribute"); |
Wenjie Qiao | 8a73a56 | 2023-02-23 18:37:14 +0800 | [diff] [blame] | 1465 | hdmimode = env_get("hdmimode"); |
xiang.wu1 | a6d6f1d | 2023-08-04 14:13:00 +0800 | [diff] [blame] | 1466 | user_dv_mode = get_ubootenv_dv_type(); |
| 1467 | |
| 1468 | last_output_mode = env_get("outputmode"); |
| 1469 | last_colorattribute = env_get("colorattribute"); |
| 1470 | last_dv_status = get_ubootenv_dv_status(); |
Wenjie Qiao | 8a73a56 | 2023-02-23 18:37:14 +0800 | [diff] [blame] | 1471 | if (!store_checkvalue) |
| 1472 | store_checkvalue = def_cksum; |
| 1473 | |
xiang.wu1 | a6d6f1d | 2023-08-04 14:13:00 +0800 | [diff] [blame] | 1474 | printf("read hdmichecksum: %s, user hdmimode: %s, colorattribute: %s, dv_type: %d\n", |
Wenjie Qiao | 389d3ea | 2023-05-25 16:07:03 +0800 | [diff] [blame] | 1475 | store_checkvalue, hdmimode ? hdmimode : "null", |
xiang.wu1 | a6d6f1d | 2023-08-04 14:13:00 +0800 | [diff] [blame] | 1476 | colorattribute ? colorattribute : "null", user_dv_mode); |
Wenjie Qiao | 8a73a56 | 2023-02-23 18:37:14 +0800 | [diff] [blame] | 1477 | |
| 1478 | for (i = 0; i < 4; i++) { |
| 1479 | if (('0' <= store_checkvalue[i * 2 + 2]) && (store_checkvalue[i * 2 + 2] <= '9')) |
| 1480 | checkvalue1 = store_checkvalue[i * 2 + 2] - '0'; |
| 1481 | else |
| 1482 | checkvalue1 = store_checkvalue[i * 2 + 2] - 'W'; |
| 1483 | if (('0' <= store_checkvalue[i * 2 + 3]) && (store_checkvalue[i * 2 + 3] <= '9')) |
| 1484 | checkvalue2 = store_checkvalue[i * 2 + 3] - '0'; |
| 1485 | else |
| 1486 | checkvalue2 = store_checkvalue[i * 2 + 3] - 'W'; |
| 1487 | checkvalue[i] = checkvalue1 * 16 + checkvalue2; |
| 1488 | } |
| 1489 | |
| 1490 | if (checkvalue[0] != hdev->rawedid[0x7f] || |
| 1491 | checkvalue[1] != hdev->rawedid[0xff] || |
| 1492 | checkvalue[2] != hdev->rawedid[0x17f] || |
| 1493 | checkvalue[3] != hdev->rawedid[0x1ff]) { |
| 1494 | hdev->RXCap.edid_changed = 1; |
| 1495 | |
| 1496 | checksum[0] = '0'; |
| 1497 | checksum[1] = 'x'; |
| 1498 | for (i = 0; i < 4; i++) |
| 1499 | xtochar(0x80 * i + 0x7f, &checksum[2 * i + 2]); |
| 1500 | checksum[10] = '\0'; |
xiang.wu1 | 14497ab | 2024-02-21 14:57:05 +0800 | [diff] [blame] | 1501 | memcpy(hdev->RXCap.hdmichecksum, checksum, 10); |
Wenjie Qiao | 389d3ea | 2023-05-25 16:07:03 +0800 | [diff] [blame] | 1502 | printf("TV has changed, now crc: %s\n", checksum); |
Wenjie Qiao | 8a73a56 | 2023-02-23 18:37:14 +0800 | [diff] [blame] | 1503 | } else { |
xiang.wu1 | 14497ab | 2024-02-21 14:57:05 +0800 | [diff] [blame] | 1504 | memcpy(hdev->RXCap.hdmichecksum, store_checkvalue, 10); |
| 1505 | printf("TV is same, checksum: %s\n", hdev->RXCap.hdmichecksum); |
Wenjie Qiao | 8a73a56 | 2023-02-23 18:37:14 +0800 | [diff] [blame] | 1506 | } |
| 1507 | |
Wenjie Qiao | 389d3ea | 2023-05-25 16:07:03 +0800 | [diff] [blame] | 1508 | /* check user have selected both mode/color or not */ |
| 1509 | if (!hdmimode || !strcmp(hdmimode, "none") || |
| 1510 | !colorattribute || !strcmp(colorattribute, "none")) |
| 1511 | no_manual_output = true; |
| 1512 | else |
| 1513 | no_manual_output = false; |
| 1514 | |
| 1515 | if (!no_manual_output) { |
| 1516 | /* check current user selected mode + color support or not */ |
| 1517 | para = hdmitx21_get_fmtpara(hdmimode, colorattribute); |
Wenjie Qiao | af3ac88 | 2024-05-29 10:12:12 +0800 | [diff] [blame] | 1518 | if (!hdmitx_common_validate_format_para(&hdev->tx_common, para)) { |
Wenjie Qiao | 389d3ea | 2023-05-25 16:07:03 +0800 | [diff] [blame] | 1519 | mode_support = true; |
xiang.wu1 | a6d6f1d | 2023-08-04 14:13:00 +0800 | [diff] [blame] | 1520 | } else { |
| 1521 | printf("saved output mode not supported!\n"); |
Wenjie Qiao | 389d3ea | 2023-05-25 16:07:03 +0800 | [diff] [blame] | 1522 | mode_support = false; |
xiang.wu1 | a6d6f1d | 2023-08-04 14:13:00 +0800 | [diff] [blame] | 1523 | } |
| 1524 | |
lizhi.hu | 506ddfa | 2024-07-10 21:35:41 +0800 | [diff] [blame] | 1525 | /* |
| 1526 | * if user selected mode/color/dv type which saved in ubootenv of |
xiang.wu1 | a6d6f1d | 2023-08-04 14:13:00 +0800 | [diff] [blame] | 1527 | * hdmimode/user_colorattribute/user_prefer_dv_type are different |
| 1528 | * with last actual output mode/color/dv type which saved in |
| 1529 | * ubootenv of outputmode/colorattribute/dolby_status, then it means |
| 1530 | * that the user selected format is over-writen by policy(for example: |
| 1531 | * firstly user has selected HDR priority to HDR, and select color |
| 1532 | * to rgb,12bit(now the "user_colorattribute" env will be "rgb,12bit"), |
| 1533 | * but then it selected HDR priority to DV, the actual output color |
| 1534 | * will be "444,8bit" or "422,12bit" according to dv type, and |
| 1535 | * the ubootenv "colorattribute" will be "444,8bit" or "422,12bit"), |
| 1536 | * then uboot should use the policy to select the output format, |
| 1537 | * otherwise, uboot use hdmimode/user_colorattribute/user_prefer_dv_type |
| 1538 | * env, while system use outputmode/colorattribute/dolby_status env, |
| 1539 | * there will be always a mode change during bootup |
| 1540 | */ |
| 1541 | if (mode_support) { |
lizhi.hu | 506ddfa | 2024-07-10 21:35:41 +0800 | [diff] [blame] | 1542 | /* |
| 1543 | * note that for T7 multi-display, it may store panel in |
xiang.wu1 | a6d6f1d | 2023-08-04 14:13:00 +0800 | [diff] [blame] | 1544 | * "outputmode" env, and will always run uboot policy |
| 1545 | */ |
| 1546 | if (!last_output_mode || strcmp(hdmimode, last_output_mode)) |
| 1547 | over_write = true; |
| 1548 | else if (!last_colorattribute || |
| 1549 | strcmp(colorattribute, last_colorattribute)) |
| 1550 | over_write = true; |
| 1551 | else if (user_dv_mode != last_dv_status) |
| 1552 | over_write = true; |
| 1553 | else |
| 1554 | over_write = false; |
| 1555 | |
| 1556 | if (over_write) |
| 1557 | printf("last output_mode:%s, colorattribute:%s, dolby_status:%d\n", |
| 1558 | last_output_mode ? last_output_mode : "null", |
| 1559 | last_colorattribute ? last_colorattribute : "null", |
| 1560 | last_dv_status); |
| 1561 | } |
Wenjie Qiao | 389d3ea | 2023-05-25 16:07:03 +0800 | [diff] [blame] | 1562 | } |
lizhi.hu | 506ddfa | 2024-07-10 21:35:41 +0800 | [diff] [blame] | 1563 | /* |
| 1564 | * When outputting frl mode, if frl training fails under uboot, |
xiang.wu1 | dba66a0 | 2024-05-28 19:53:01 +0800 | [diff] [blame] | 1565 | * in order to ensure that it is displayed under uboot, change |
| 1566 | * to the default TMDS mode for output display. systemctrl |
| 1567 | * maintains the original 8k policy. After the subsequent systermctrl |
| 1568 | * starts running, if it is checked that the current output is not the |
| 1569 | * original frl mode, it will switch to the original frl mode. |
| 1570 | */ |
| 1571 | if (hdev->frl_train_fail_flag) { |
| 1572 | save_default_720p(); |
| 1573 | } else if (hdev->RXCap.edid_changed || no_manual_output || !mode_support || over_write) { |
lizhi.hu | 506ddfa | 2024-07-10 21:35:41 +0800 | [diff] [blame] | 1574 | /* |
| 1575 | * 4 cases need to decide output by uboot mode select policy: |
Wenjie Qiao | 389d3ea | 2023-05-25 16:07:03 +0800 | [diff] [blame] | 1576 | * 1.TV changed |
| 1577 | * 2.either hdmimode or colorattribute is NULL or "none", |
| 1578 | * which means that user have not selected mode or colorattribute, |
| 1579 | * and need to select the auto best mode or best colorattribute. |
| 1580 | * 3.user selected mode not supportted by uboot (probably |
| 1581 | * means mode select policy or edid parse between sysctrl and |
| 1582 | * uboot have some gap), then need to find proper output mode |
| 1583 | * with uboot policy. |
Wenjie Qiao | 4bdbbee | 2024-02-01 10:16:44 +0800 | [diff] [blame] | 1584 | * 4.user selected mode is over writen by system policy |
Wenjie Qiao | 389d3ea | 2023-05-25 16:07:03 +0800 | [diff] [blame] | 1585 | */ |
Wenjie Qiao | 8a73a56 | 2023-02-23 18:37:14 +0800 | [diff] [blame] | 1586 | /* find proper mode if EDID changed */ |
xiang.wu1 | 8cf0cd1 | 2024-06-13 15:27:52 +0800 | [diff] [blame] | 1587 | scene_process(hdev, &output); |
xiang.wu1 | 14497ab | 2024-02-21 14:57:05 +0800 | [diff] [blame] | 1588 | env_set("hdmichecksum", hdev->RXCap.hdmichecksum); |
| 1589 | if (hdmitx_edid_check_data_valid(0, hdev->rawedid)) { |
lizhi.hu | 506ddfa | 2024-07-10 21:35:41 +0800 | [diff] [blame] | 1590 | /* |
| 1591 | * SWPL-34712: if EDID parsing error case, not save env, |
Wenjie Qiao | 8a73a56 | 2023-02-23 18:37:14 +0800 | [diff] [blame] | 1592 | * only output default mode(480p,RGB,8bit). after |
| 1593 | * EDID read OK, systemcontrol will recover the hdmi |
| 1594 | * mode from env, to avoid keep the default hdmi output |
| 1595 | */ |
xiang.wu1 | 8cf0cd1 | 2024-06-13 15:27:52 +0800 | [diff] [blame] | 1596 | memcpy(sel_hdmimode, output.displaymode, |
| 1597 | sizeof(output.displaymode)); |
lizhi.hu | 506ddfa | 2024-07-10 21:35:41 +0800 | [diff] [blame] | 1598 | /* The outputmode must be saved based on the value of connectorX_type. */ |
| 1599 | if (env_get("connector0_type") && |
| 1600 | is_valid_hdmi(env_get("connector0_type"))) { |
| 1601 | env_set("outputmode", output.displaymode); |
| 1602 | } else if (env_get("connector1_type") && |
| 1603 | is_valid_hdmi(env_get("connector1_type"))) { |
| 1604 | env_set("outputmode2", output.displaymode); |
| 1605 | } else if (env_get("connector2_type") && |
| 1606 | is_valid_hdmi(env_get("connector2_type"))) { |
| 1607 | env_set("outputmode3", output.displaymode); |
| 1608 | } else { |
| 1609 | pr_info("no config connectorX_type, save default %s outputmode\n", |
xiang.wu1 | 8cf0cd1 | 2024-06-13 15:27:52 +0800 | [diff] [blame] | 1610 | output.displaymode); |
lizhi.hu | 506ddfa | 2024-07-10 21:35:41 +0800 | [diff] [blame] | 1611 | env_set("outputmode", output.displaymode); |
Wenjie Qiao | 8a73a56 | 2023-02-23 18:37:14 +0800 | [diff] [blame] | 1612 | } |
| 1613 | env_set("colorattribute", |
xiang.wu1 | 8cf0cd1 | 2024-06-13 15:27:52 +0800 | [diff] [blame] | 1614 | output.deepcolor); |
lizhi.hu | 506ddfa | 2024-07-10 21:35:41 +0800 | [diff] [blame] | 1615 | /* |
| 1616 | * if change from DV TV to HDR/SDR TV, don't change |
Wenjie Qiao | 8a73a56 | 2023-02-23 18:37:14 +0800 | [diff] [blame] | 1617 | * DV status to disabled, as DV core need to be enabled. |
xiang.wu1 | a6d6f1d | 2023-08-04 14:13:00 +0800 | [diff] [blame] | 1618 | * that's to say connect DV TV & output DV-> power down box -> |
| 1619 | * connect HDR/SDR TV -> power on box, the dolby_status |
| 1620 | * will keep the same as that when connect DV TV under follow sink. |
Wenjie Qiao | 8a73a56 | 2023-02-23 18:37:14 +0800 | [diff] [blame] | 1621 | */ |
xiang.wu1 | 8cf0cd1 | 2024-06-13 15:27:52 +0800 | [diff] [blame] | 1622 | if (output.amdv_type != get_ubootenv_dv_status() && |
| 1623 | output.amdv_type != DOLBY_VISION_DISABLE) { |
| 1624 | sprintf(dv_type, "%d", output.amdv_type); |
Wenjie Qiao | 8a73a56 | 2023-02-23 18:37:14 +0800 | [diff] [blame] | 1625 | env_set("dolby_status", dv_type); |
lizhi.hu | 506ddfa | 2024-07-10 21:35:41 +0800 | [diff] [blame] | 1626 | /* |
| 1627 | * according to the policy of systemcontrol, |
Wenjie Qiao | 8a73a56 | 2023-02-23 18:37:14 +0800 | [diff] [blame] | 1628 | * if current DV mode is not supported by TV |
| 1629 | * EDID, DV type maybe changed to one witch |
| 1630 | * TV support, and need VPP/DV module to |
| 1631 | * update new DV output mode. |
| 1632 | */ |
xiang.wu1 | a6d6f1d | 2023-08-04 14:13:00 +0800 | [diff] [blame] | 1633 | printf("update dolby_status: %d\n", |
xiang.wu1 | 8cf0cd1 | 2024-06-13 15:27:52 +0800 | [diff] [blame] | 1634 | output.amdv_type); |
Wenjie Qiao | 8a73a56 | 2023-02-23 18:37:14 +0800 | [diff] [blame] | 1635 | } |
Wenjie Qiao | 389d3ea | 2023-05-25 16:07:03 +0800 | [diff] [blame] | 1636 | } else { |
| 1637 | save_default_720p(); |
Wenjie Qiao | 8a73a56 | 2023-02-23 18:37:14 +0800 | [diff] [blame] | 1638 | } |
Wenjie Qiao | 389d3ea | 2023-05-25 16:07:03 +0800 | [diff] [blame] | 1639 | printf("update outputmode: %s\n", sel_hdmimode); |
Wenjie Qiao | 8a73a56 | 2023-02-23 18:37:14 +0800 | [diff] [blame] | 1640 | printf("update colorattribute: %s\n", env_get("colorattribute")); |
| 1641 | printf("update hdmichecksum: %s\n", env_get("hdmichecksum")); |
Wenjie Qiao | 389d3ea | 2023-05-25 16:07:03 +0800 | [diff] [blame] | 1642 | } else { |
| 1643 | memset(sel_hdmimode, 0, sizeof(sel_hdmimode)); |
| 1644 | memcpy(sel_hdmimode, hdmimode, strlen(hdmimode)); |
| 1645 | if (is_hdmi_mode(env_get("outputmode"))) |
| 1646 | env_set("outputmode", hdmimode); |
| 1647 | else if (is_hdmi_mode(env_get("outputmode2"))) |
| 1648 | env_set("outputmode2", hdmimode); |
| 1649 | else if (is_hdmi_mode(env_get("outputmode3"))) |
| 1650 | env_set("outputmode3", hdmimode); |
| 1651 | env_set("colorattribute", colorattribute); |
Wenjie Qiao | 8a73a56 | 2023-02-23 18:37:14 +0800 | [diff] [blame] | 1652 | } |
xiang.wu1 | a6d6f1d | 2023-08-04 14:13:00 +0800 | [diff] [blame] | 1653 | env_set("save_outputmode", sel_hdmimode); |
zongdong.jiao | b6fa996 | 2024-08-25 19:51:48 +0800 | [diff] [blame] | 1654 | /* |
| 1655 | * ubootenv dolby_status is used for is_dv_preference() decision, |
xiang.wu1 | a6d6f1d | 2023-08-04 14:13:00 +0800 | [diff] [blame] | 1656 | * system_control save current dv output status in it. |
| 1657 | * it will be used by dv module later to decide DV output later. |
| 1658 | * if currently adaptive hdr, then we should set dolby_status to |
| 1659 | * 0, so that DV module won't enable DV. |
| 1660 | */ |
| 1661 | if (get_hdr_policy() == 1) |
| 1662 | env_set("dolby_status", 0); |
Wenjie Qiao | 389d3ea | 2023-05-25 16:07:03 +0800 | [diff] [blame] | 1663 | hdev->para = hdmitx21_get_fmtpara(sel_hdmimode, env_get("colorattribute")); |
Wenjie Qiao | 8a73a56 | 2023-02-23 18:37:14 +0800 | [diff] [blame] | 1664 | hdev->vic = hdev->para->timing.vic; |
xiang.wu1 | 8cf0cd1 | 2024-06-13 15:27:52 +0800 | [diff] [blame] | 1665 | |
xiang.wu1 | 2a0497a | 2024-09-29 17:41:20 +0800 | [diff] [blame] | 1666 | /* |
| 1667 | * update the hdr/hdr10+/dv capabilities in the end of scene_process. |
| 1668 | * In order to be consistent with the HWC mode output policy, the real |
| 1669 | * capabilities of the TV need to be used when executing the uboot mode |
| 1670 | * policy. Finally, the corresponding hdr_cap/dv_cap needs to be blocked |
| 1671 | * based on hdr_priority. |
| 1672 | * eg: TV and BOX all support 1080p60hz DV, not support 1080p120hz DV, support HDR10, SDR |
| 1673 | * scene: UI choose 1080p120hz, always DV, reboot. |
| 1674 | * if update the hdr/hdr10+/dv capabilities before scene_process, uboot |
| 1675 | * scene_process executes sdr policy, but hwc executes hdr policy, Inconsistent |
| 1676 | * output modes lead to black flash |
| 1677 | */ |
xiang.wu1 | 8cf0cd1 | 2024-06-13 15:27:52 +0800 | [diff] [blame] | 1678 | if (hdr_priority != -1) { |
| 1679 | hdmitx_set_hdr_priority(&hdev->RXCap, hdr_priority); |
| 1680 | memcpy(&hdev->tx_common.rxcap, &hdev->RXCap, sizeof(hdev->tx_common.rxcap)); |
| 1681 | } |
| 1682 | |
Wenjie Qiao | 8a73a56 | 2023-02-23 18:37:14 +0800 | [diff] [blame] | 1683 | hdmitx_mask_rx_info(hdev); |
Wenjie Qiao | af3ac88 | 2024-05-29 10:12:12 +0800 | [diff] [blame] | 1684 | hdev->para->frl_rate = hdmitx_select_frl_rate(&hdev->para->dsc_en, |
| 1685 | hdev->tx_common.tx_hw->hdmi_tx_cap.dsc_policy, |
| 1686 | hdev->para->vic, hdev->para->cs, |
| 1687 | hdev->para->cd); |
Wenjie Qiao | 4bdbbee | 2024-02-01 10:16:44 +0800 | [diff] [blame] | 1688 | return 0; |
| 1689 | } |
| 1690 | |
| 1691 | static int do_dsc_policy(cmd_tbl_t *cmdtp, int flag, int argc, char *const argv[]) |
| 1692 | { |
| 1693 | struct hdmitx_dev *hdev = get_hdmitx21_device(); |
Wenjie Qiao | af3ac88 | 2024-05-29 10:12:12 +0800 | [diff] [blame] | 1694 | struct tx_cap *txcap = &hdev->tx_common.tx_hw->hdmi_tx_cap; |
Wenjie Qiao | 4bdbbee | 2024-02-01 10:16:44 +0800 | [diff] [blame] | 1695 | |
| 1696 | if (argc < 1) |
| 1697 | return cmd_usage(cmdtp); |
| 1698 | |
| 1699 | if (strcmp(argv[1], "0") == 0) |
Wenjie Qiao | af3ac88 | 2024-05-29 10:12:12 +0800 | [diff] [blame] | 1700 | txcap->dsc_policy = 0; |
Wenjie Qiao | 4bdbbee | 2024-02-01 10:16:44 +0800 | [diff] [blame] | 1701 | else if (strcmp(argv[1], "1") == 0) |
Wenjie Qiao | af3ac88 | 2024-05-29 10:12:12 +0800 | [diff] [blame] | 1702 | txcap->dsc_policy = 1; |
Wenjie Qiao | 4bdbbee | 2024-02-01 10:16:44 +0800 | [diff] [blame] | 1703 | else if (strcmp(argv[1], "2") == 0) |
Wenjie Qiao | af3ac88 | 2024-05-29 10:12:12 +0800 | [diff] [blame] | 1704 | txcap->dsc_policy = 2; |
Wenjie Qiao | 4bdbbee | 2024-02-01 10:16:44 +0800 | [diff] [blame] | 1705 | else if (strcmp(argv[1], "3") == 0) |
Wenjie Qiao | af3ac88 | 2024-05-29 10:12:12 +0800 | [diff] [blame] | 1706 | txcap->dsc_policy = 3; |
Wenjie Qiao | 4bdbbee | 2024-02-01 10:16:44 +0800 | [diff] [blame] | 1707 | else if (strcmp(argv[1], "4") == 0) |
Wenjie Qiao | af3ac88 | 2024-05-29 10:12:12 +0800 | [diff] [blame] | 1708 | txcap->dsc_policy = 4; |
Wenjie Qiao | 4bdbbee | 2024-02-01 10:16:44 +0800 | [diff] [blame] | 1709 | else |
| 1710 | printf("note: please set dsc policy as 0~4\n"); |
Wenjie Qiao | af3ac88 | 2024-05-29 10:12:12 +0800 | [diff] [blame] | 1711 | if (txcap->dsc_policy <= 4) |
| 1712 | printf("use dsc policy: %d\n", txcap->dsc_policy); |
Wenjie Qiao | 4bdbbee | 2024-02-01 10:16:44 +0800 | [diff] [blame] | 1713 | |
| 1714 | return CMD_RET_SUCCESS; |
| 1715 | } |
| 1716 | |
| 1717 | static int do_manual_frl_rate(cmd_tbl_t *cmdtp, int flag, int argc, char *const argv[]) |
| 1718 | { |
| 1719 | struct hdmitx_dev *hdev = get_hdmitx21_device(); |
| 1720 | unsigned int temp = 0; |
| 1721 | char *ptr; |
| 1722 | |
| 1723 | /* if rx don't support FRL, return */ |
| 1724 | if (!hdev->RXCap.max_frl_rate) { |
| 1725 | printf("rx not support FRL\n"); |
| 1726 | return 0; |
| 1727 | } |
| 1728 | |
| 1729 | temp = strtoul(argv[1], &ptr, 16); |
| 1730 | /* forced FRL rate setting */ |
| 1731 | if (temp <= 6) { |
| 1732 | hdev->manual_frl_rate = temp; |
| 1733 | pr_info("force set frl_rate as %d\n", hdev->manual_frl_rate); |
| 1734 | } else { |
| 1735 | pr_info("error: should set frl_rate in 0 ~ 6\n"); |
| 1736 | } |
| 1737 | if (hdev->manual_frl_rate > hdev->RXCap.max_frl_rate) |
| 1738 | pr_info("warning: larger than rx max_frl_rate %d\n", hdev->RXCap.max_frl_rate); |
| 1739 | return 0; |
| 1740 | } |
| 1741 | |
| 1742 | static int do_manual_dfm_type(cmd_tbl_t *cmdtp, int flag, int argc, char *const argv[]) |
| 1743 | { |
| 1744 | struct hdmitx_dev *hdev = get_hdmitx21_device(); |
| 1745 | unsigned int temp = 0; |
| 1746 | char *ptr; |
| 1747 | |
| 1748 | temp = strtoul(argv[1], &ptr, 10); |
| 1749 | /* forced dfm_type setting */ |
| 1750 | if (temp <= 2) { |
| 1751 | hdev->dfm_type = temp; |
| 1752 | pr_info("force set dfm_type as %d\n", hdev->dfm_type); |
| 1753 | } else { |
| 1754 | pr_info("error: should set frl_rate in 0 ~ 2\n"); |
| 1755 | } |
Wenjie Qiao | 8a73a56 | 2023-02-23 18:37:14 +0800 | [diff] [blame] | 1756 | return 0; |
| 1757 | } |
| 1758 | |
Wenjie Qiao | 7783390 | 2023-12-18 19:01:59 +0800 | [diff] [blame] | 1759 | #ifdef CONFIG_EFUSE_OBJ_API |
| 1760 | static int do_efuse_show(cmd_tbl_t *cmdtp, int flag, int argc, char *const argv[]) |
| 1761 | { |
| 1762 | struct hdmitx_dev *hdev = get_hdmitx21_device(); |
| 1763 | |
| 1764 | get_hdmi_efuse(hdev); |
Wenjie Qiao | af3ac88 | 2024-05-29 10:12:12 +0800 | [diff] [blame] | 1765 | pr_info("FEAT_DISABLE_HDMI_60HZ = %d\n", hdev->tx_common.efuse_dis_hdmi_4k60); |
| 1766 | pr_info("FEAT_DISABLE_OUTPUT_4K = %d\n", hdev->tx_common.efuse_dis_output_4k); |
| 1767 | pr_info("FEAT_DISABLE_HDCP_TX_22 = %d\n", hdev->tx_common.efuse_dis_hdcp_tx22); |
| 1768 | pr_info("FEAT_DISABLE_HDMI_TX_3D = %d\n", hdev->tx_common.efuse_dis_hdmi_tx3d); |
| 1769 | pr_info("FEAT_DISABLE_HDMI = %d\n", hdev->tx_common.efuse_dis_hdcp_tx14); |
Wenjie Qiao | 7783390 | 2023-12-18 19:01:59 +0800 | [diff] [blame] | 1770 | |
| 1771 | return 0; |
| 1772 | } |
| 1773 | #endif |
| 1774 | |
Wenjie Qiao | 8a73a56 | 2023-02-23 18:37:14 +0800 | [diff] [blame] | 1775 | static cmd_tbl_t cmd_hdmi_sub[] = { |
| 1776 | U_BOOT_CMD_MKENT(hpd, 1, 1, do_hpd_detect, "", ""), |
Wenjie Qiao | 8a73a56 | 2023-02-23 18:37:14 +0800 | [diff] [blame] | 1777 | U_BOOT_CMD_MKENT(rx_det, 1, 1, do_rx_det, "", ""), |
| 1778 | U_BOOT_CMD_MKENT(output, 3, 1, do_output, "", ""), |
| 1779 | U_BOOT_CMD_MKENT(clkmsr, 3, 1, do_clkmsr, "", ""), |
| 1780 | U_BOOT_CMD_MKENT(blank, 3, 1, do_blank, "", ""), |
| 1781 | U_BOOT_CMD_MKENT(off, 1, 1, do_off, "", ""), |
| 1782 | U_BOOT_CMD_MKENT(dump, 1, 1, do_dump, "", ""), |
| 1783 | U_BOOT_CMD_MKENT(info, 1, 1, do_info, "", ""), |
Wenjie Qiao | 8a73a56 | 2023-02-23 18:37:14 +0800 | [diff] [blame] | 1784 | U_BOOT_CMD_MKENT(reg, 3, 1, do_reg, "", ""), |
| 1785 | U_BOOT_CMD_MKENT(get_parse_edid, 1, 1, do_get_parse_edid, "", ""), |
Wenjie Qiao | 4bdbbee | 2024-02-01 10:16:44 +0800 | [diff] [blame] | 1786 | U_BOOT_CMD_MKENT(dsc_policy, 1, 1, do_dsc_policy, "", ""), |
| 1787 | U_BOOT_CMD_MKENT(frl_rate, 1, 1, do_manual_frl_rate, "", ""), |
| 1788 | U_BOOT_CMD_MKENT(dfm_type, 1, 1, do_manual_dfm_type, "", ""), |
Wenjie Qiao | 7783390 | 2023-12-18 19:01:59 +0800 | [diff] [blame] | 1789 | #ifdef CONFIG_EFUSE_OBJ_API |
| 1790 | U_BOOT_CMD_MKENT(efuse, 1, 1, do_efuse_show, "", ""), |
| 1791 | #endif |
xiang.wu1 | a6d6f1d | 2023-08-04 14:13:00 +0800 | [diff] [blame] | 1792 | U_BOOT_CMD_MKENT(pbist, 3, 1, do_pbist, "", ""), |
| 1793 | U_BOOT_CMD_MKENT(debug, 3, 1, do_debug, "", ""), |
xiang.wu1 | 492f364 | 2024-01-08 14:06:40 +0800 | [diff] [blame] | 1794 | U_BOOT_CMD_MKENT(s7_clk_config, 3, 1, do_s7_clk_config, "", ""), |
xiang.wu1 | 14497ab | 2024-02-21 14:57:05 +0800 | [diff] [blame] | 1795 | U_BOOT_CMD_MKENT(get_rterm, 3, 1, get_rterm, "", ""), |
Wenjie Qiao | 8a73a56 | 2023-02-23 18:37:14 +0800 | [diff] [blame] | 1796 | }; |
| 1797 | |
| 1798 | static int do_hdmitx(cmd_tbl_t *cmdtp, int flag, int argc, char *const argv[]) |
| 1799 | { |
| 1800 | cmd_tbl_t *c; |
| 1801 | |
| 1802 | if (argc < 2) |
| 1803 | return cmd_usage(cmdtp); |
| 1804 | |
| 1805 | argc--; |
| 1806 | argv++; |
| 1807 | |
| 1808 | c = find_cmd_tbl(argv[0], &cmd_hdmi_sub[0], ARRAY_SIZE(cmd_hdmi_sub)); |
| 1809 | |
| 1810 | if (c) |
| 1811 | return c->cmd(cmdtp, flag, argc, argv); |
| 1812 | else |
| 1813 | return cmd_usage(cmdtp); |
| 1814 | } |
| 1815 | |
| 1816 | U_BOOT_CMD(hdmitx, CONFIG_SYS_MAXARGS, 0, do_hdmitx, |
| 1817 | "HDMITX sub-system", |
| 1818 | "hdmitx version:20200618\n" |
| 1819 | "hdmitx hpd\n" |
| 1820 | " Detect hdmi rx plug-in\n" |
Wenjie Qiao | 8a73a56 | 2023-02-23 18:37:14 +0800 | [diff] [blame] | 1821 | "hdmitx output [list | FORMAT | bist PATTERN]\n" |
| 1822 | " list: list support formats\n" |
| 1823 | " FORMAT can be 720p60/50hz, 1080i60/50hz, 1080p60hz, etc\n" |
| 1824 | " extend with 8bits/10bits, y444/y422/y420/rgb\n" |
| 1825 | " such as 2160p60hz,10bits,y420\n" |
| 1826 | " PATTERN: can be as: line, dot, off, or 1920(width)\n" |
| 1827 | "hdmitx blank [0|1]\n" |
| 1828 | " 1: output blank 0: output normal\n" |
| 1829 | "hdmitx clkmsr\n" |
| 1830 | " show hdmitx clocks\n" |
| 1831 | "hdmitx off\n" |
| 1832 | " Turn off hdmitx output\n" |
| 1833 | "hdmitx info\n" |
| 1834 | " current mode info\n" |
| 1835 | "hdmitx rx_det\n" |
| 1836 | " Auto detect if RX is FBC and set outputmode\n" |
| 1837 | ); |
| 1838 | |
| 1839 | struct hdr_info *hdmitx_get_rx_hdr_info(void) |
| 1840 | { |
| 1841 | struct hdmitx_dev *hdev = get_hdmitx21_device(); |
| 1842 | |
| 1843 | return &hdev->RXCap.hdr_info; |
| 1844 | } |
Wenjie Qiao | 4bdbbee | 2024-02-01 10:16:44 +0800 | [diff] [blame] | 1845 | |
| 1846 | static int do_list_dsc_mode(cmd_tbl_t *cmdtp, int flag, int argc, char *const argv[]) |
| 1847 | { |
| 1848 | #ifdef CONFIG_AML_DSC_ENC |
| 1849 | dsc_enc_cap_show(); |
| 1850 | #endif |
| 1851 | return 0; |
| 1852 | } |
| 1853 | |
| 1854 | static int do_dsc_debug(cmd_tbl_t *cmdtp, int flag, int argc, char *const argv[]) |
| 1855 | { |
| 1856 | #ifdef CONFIG_AML_DSC_ENC |
| 1857 | dsc_debug(argc - 1, argv + 1); |
| 1858 | #endif |
| 1859 | return 0; |
| 1860 | } |
| 1861 | |
| 1862 | static cmd_tbl_t cmd_dsc_sub[] = { |
| 1863 | U_BOOT_CMD_MKENT(list_mode, 1, 1, do_list_dsc_mode, "", ""), |
| 1864 | U_BOOT_CMD_MKENT(dbg, 20, 1, do_dsc_debug, "", ""), |
| 1865 | }; |
| 1866 | |
| 1867 | static int do_dsc_enc(cmd_tbl_t *cmdtp, int flag, int argc, char *const argv[]) |
| 1868 | { |
| 1869 | cmd_tbl_t *c; |
| 1870 | |
| 1871 | if (argc < 2) |
| 1872 | return cmd_usage(cmdtp); |
| 1873 | |
| 1874 | argc--; |
| 1875 | argv++; |
| 1876 | |
| 1877 | c = find_cmd_tbl(argv[0], &cmd_dsc_sub[0], ARRAY_SIZE(cmd_dsc_sub)); |
| 1878 | |
| 1879 | if (c) |
| 1880 | return c->cmd(cmdtp, flag, argc, argv); |
| 1881 | else |
| 1882 | return cmd_usage(cmdtp); |
| 1883 | } |
| 1884 | |
| 1885 | U_BOOT_CMD(dsc, CONFIG_SYS_MAXARGS, 0, do_dsc_enc, |
| 1886 | "dsc cmd", |
| 1887 | "dsc help function\n" |
| 1888 | "dsc dbg state\n" |
| 1889 | " dump dsc status\n" |
| 1890 | "dsc dbg dump_reg\n" |
| 1891 | " dump dsc registers and venc registers\n" |
| 1892 | "dsc dbg read addr\n" |
| 1893 | " read dsc asic register\n" |
| 1894 | "dsc dbg write addr value\n" |
| 1895 | " write dsc asic register\n" |
| 1896 | "dsc dbg rst_dsc\n" |
| 1897 | " reset dsc enc\n" |
| 1898 | "dsc list_mode\n" |
| 1899 | " show supported dsc encode mode list\n" |
| 1900 | ); |
| 1901 | |