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Wenjie Qiao8a73a562023-02-23 18:37:14 +08001// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
2/*
3 * Copyright (c) 2019 Amlogic, Inc. All rights reserved.
4 */
5
6#include <common.h>
7#include <command.h>
8#include <env.h>
9#include <malloc.h>
10#include <asm/byteorder.h>
11#include <amlogic/clk_measure.h>
12#include <amlogic/media/vout/hdmitx21/hdmitx.h>
Wenjie Qiao389d3ea2023-05-25 16:07:03 +080013#include <linux/delay.h>
Wenjie Qiao4bdbbee2024-02-01 10:16:44 +080014#include <image.h>
Wenjie Qiao8a73a562023-02-23 18:37:14 +080015#include <amlogic/media/dv/dolby_vision.h>
16#include <linux/libfdt_env.h>
Wenjie Qiao4bdbbee2024-02-01 10:16:44 +080017#include <amlogic/media/vout/dsc.h>
xiang.wu114497ab2024-02-21 14:57:05 +080018#include <amlogic/media/vout/aml_vinfo.h>
19#include <linux/arm-smccc.h>
Wenjie Qiaoaf3ac882024-05-29 10:12:12 +080020#include <linux/compat.h>
xiang.wu1dc0df262024-07-22 19:34:22 +080021#include "../../drivers/amlogic/media/vout/hdmitx/hdmitx_common/hdmitx_check_valid.h"
xiang.wu18cf0cd12024-06-13 15:27:52 +080022#include "../../drivers/amlogic/media/vout/hdmitx/hdmitx_common/hdmitx_policy_setting.h"
Wenjie Qiao8a73a562023-02-23 18:37:14 +080023
24static unsigned char edid_raw_buf[512] = {0};
lizhi.hu506ddfa2024-07-10 21:35:41 +080025
26/*
27 * there may be outputmode/2/3 when in multi-display case,
Wenjie Qiao389d3ea2023-05-25 16:07:03 +080028 * sel_hdmimode is used to save the selected hdmi mode
29 */
xiang.wu18cf0cd12024-06-13 15:27:52 +080030static char sel_hdmimode[MESON_MODE_LEN] = {0};
Wenjie Qiao8a73a562023-02-23 18:37:14 +080031
32static void dump_full_edid(const unsigned char *buf)
33{
34 int i;
35 int blk_no;
36
37 if (!buf)
38 return;
39 blk_no = buf[126] + 1;
40 if (blk_no > 4)
41 blk_no = 4;
Wenjie Qiao389d3ea2023-05-25 16:07:03 +080042
43 if (blk_no == 2)
44 if (buf[128 + 4] == 0xe2 && buf[128 + 5] == 0x78)
45 blk_no = buf[128 + 6] + 1;
xiang.wu114497ab2024-02-21 14:57:05 +080046 if (blk_no > EDID_MAX_BLOCK)
47 blk_no = EDID_MAX_BLOCK;
Wenjie Qiao389d3ea2023-05-25 16:07:03 +080048
Wenjie Qiao8a73a562023-02-23 18:37:14 +080049 printf("dump EDID rawdata\n");
50 printf(" ");
51 for (i = 0; i < blk_no * EDID_BLK_SIZE; i++)
52 printf("%02x", buf[i]);
53 printf("\n");
54}
55
Wenjie Qiao8a73a562023-02-23 18:37:14 +080056static int do_rx_det(cmd_tbl_t *cmdtp, int flag, int argc, char *const argv[])
57{
58 unsigned char st = 0;
59 struct hdmitx_dev *hdev = get_hdmitx21_device();
60
61 memset(edid_raw_buf, 0, ARRAY_SIZE(edid_raw_buf));
62
lizhi.hu506ddfa2024-07-10 21:35:41 +080063 /*
64 * read edid raw data
65 * current only support read 1 byte edid data
66 */
Wenjie Qiao8a73a562023-02-23 18:37:14 +080067 st = hdev->hwop.read_edid(edid_raw_buf);
68
69 if (st) {
70 if (edid_raw_buf[250] == 0xfb && edid_raw_buf[251] == 0x0c) {
71 printf("RX is FBC\n");
72
lizhi.hu506ddfa2024-07-10 21:35:41 +080073 /* set outputmode ENV */
Wenjie Qiao8a73a562023-02-23 18:37:14 +080074 switch (edid_raw_buf[252] & 0x0f) {
75 case 0x0:
76 run_command("setenv outputmode 1080p50hz", 0);
77 break;
78 case 0x1:
79 run_command("setenv outputmode 2160p50hz420", 0);
80 break;
81 case 0x2:
82 run_command("setenv outputmode 1080p50hz44410bit", 0);
83 break;
84 case 0x3:
85 run_command("setenv outputmode 2160p50hz42010bit", 0);
86 break;
87 case 0x4:
88 run_command("setenv outputmode 2160p50hz42210bit", 0);
89 break;
90 case 0x5:
91 run_command("setenv outputmode 2160p50hz", 0);
92 break;
93 default:
94 run_command("setenv outputmode 1080p50hz", 0);
95 break;
96 }
97
lizhi.hu506ddfa2024-07-10 21:35:41 +080098 /* et RX 3D Info */
Wenjie Qiao8a73a562023-02-23 18:37:14 +080099 switch ((edid_raw_buf[252] >> 4) & 0x0f) {
100 case 0x00:
101 run_command("setenv rx_3d_info 0", 0);
102 break;
103 case 0x01:
104 run_command("setenv rx_3d_info 1", 0);
105 break;
106 case 0x02:
107 run_command("setenv rx_3d_info 2", 0);
108 break;
109 case 0x03:
110 run_command("setenv rx_3d_info 3", 0);
111 break;
112 case 0x04:
113 run_command("setenv rx_3d_info 4", 0);
114 break;
115 default:
116 break;
117 }
118
119 switch (edid_raw_buf[253]) {
120 case 0x1:
121 /*TODO*/
122 break;
123 case 0x2:
124 /*TODO*/
125 break;
126 default:
127 break;
128 }
129 }
130 } else {
131 printf("edid read failed\n");
132 }
133
134 return st;
135}
136
lizhi.hu506ddfa2024-07-10 21:35:41 +0800137int is_valid_hdmi(const char *input)
138{
139 static const char * const valid_hdmi_modes[] = {
140 "HDMI-A-A", /* venc0 */
141 "HDMI-A-B", /* venc1 */
142 "HDMI-A-C" /* venc2 */
143 };
144
145 int num_modes = ARRAY_SIZE(valid_hdmi_modes);
146 int i;
147
148 for (i = 0; i < num_modes; i++) {
149 if (strcmp(input, valid_hdmi_modes[i]) == 0)
150 return 1;
151 }
152 return 0;
153}
154
Wenjie Qiao389d3ea2023-05-25 16:07:03 +0800155static void save_default_720p(void)
156{
157 memcpy(sel_hdmimode, DEFAULT_HDMI_MODE, sizeof(DEFAULT_HDMI_MODE));
lizhi.hu506ddfa2024-07-10 21:35:41 +0800158 if (is_valid_hdmi(env_get("connector0_type"))) {
159 env_set("outputmode", DEFAULT_HDMI_MODE);
160 } else if (is_valid_hdmi(env_get("connector1_type"))) {
Wenjie Qiao389d3ea2023-05-25 16:07:03 +0800161 env_set("outputmode2", DEFAULT_HDMI_MODE);
lizhi.hu506ddfa2024-07-10 21:35:41 +0800162 } else if (is_valid_hdmi(env_get("connector2_type"))) {
163 env_set("outputmode3", DEFAULT_HDMI_MODE);
164 } else {
165 pr_info("no config connectorX_type, save default 720p outputmode\n");
166 env_set("outputmode", DEFAULT_HDMI_MODE);
167 }
Wenjie Qiao389d3ea2023-05-25 16:07:03 +0800168 env_set("colorattribute", DEFAULT_COLOR_FORMAT);
169}
170
Wenjie Qiao8a73a562023-02-23 18:37:14 +0800171static void hdmitx_mask_rx_info(struct hdmitx_dev *hdev)
172{
Wenjie Qiao8a73a562023-02-23 18:37:14 +0800173 if (!hdev || !hdev->para)
174 return;
175
Wenjie Qiao389d3ea2023-05-25 16:07:03 +0800176 if (env_get("colorattribute"))
177 hdmitx21_get_fmtpara(sel_hdmimode, env_get("colorattribute"));
178
lizhi.hu506ddfa2024-07-10 21:35:41 +0800179 /*
180 * when current output color depth is 8bit, mask hdr capability
181 * refer to SWPL-44445 for more detail
182 */
Wenjie Qiao8a73a562023-02-23 18:37:14 +0800183 if (hdev->para->cd == COLORDEPTH_24B)
184 memset(&hdev->RXCap.hdr_info, 0, sizeof(struct hdr_info));
185}
186
lizhi.hu506ddfa2024-07-10 21:35:41 +0800187/*
zongdong.jiaob6fa9962024-08-25 19:51:48 +0800188 * env_get() may return null, so use below to check
189 * if env0 and env1 are same, return 1; else return 0
190 */
191static bool hdmi_cmp_env(const char *env0, const char *env1)
192{
193 if (!env0 && !env1)
194 return 1;
195 if (!env0)
196 return 0;
197 if (!env1)
198 return 0;
199 if (strcmp(env0, env1))
200 return 0;
201 return 1;
202}
203
204#define HDMI_ENV_PARAM_MAX_LEN 32
205static void check_hdmi_env_params(void)
206{
207 static char env_hdmimode[HDMI_ENV_PARAM_MAX_LEN];
208 static char env_outputmode[HDMI_ENV_PARAM_MAX_LEN];
209 static char env_colorattr[HDMI_ENV_PARAM_MAX_LEN];
210 static char env_usercolorattr[HDMI_ENV_PARAM_MAX_LEN];
211 char *tmpstr = NULL;
212
213 /* if 4 hdmi environments are not changing, return */
214 if ((hdmi_cmp_env(env_hdmimode, env_get("hdmimode"))) &&
215 (hdmi_cmp_env(env_outputmode, env_get("outputmode"))) &&
216 (hdmi_cmp_env(env_colorattr, env_get("colorattribute"))) &&
217 (hdmi_cmp_env(env_usercolorattr, env_get("user_colorattribute"))))
218 return;
219
220 /* if changes, print and save those values */
221 tmpstr = env_get("hdmimode");
222 pr_info("hdmimode: %s\n", tmpstr ? tmpstr : "");
223 memset(env_hdmimode, 0, HDMI_ENV_PARAM_MAX_LEN);
224 if (tmpstr)
225 strncpy(env_hdmimode, tmpstr, HDMI_ENV_PARAM_MAX_LEN - 1);
226
227 tmpstr = env_get("outputmode");
228 pr_info("outputmode: %s\n", tmpstr ? tmpstr : "");
229 memset(env_outputmode, 0, HDMI_ENV_PARAM_MAX_LEN);
230 if (tmpstr)
231 strncpy(env_outputmode, tmpstr, HDMI_ENV_PARAM_MAX_LEN - 1);
232
233 tmpstr = env_get("colorattribute");
234 pr_info("colorattribute: %s\n", tmpstr ? tmpstr : "");
235 memset(env_colorattr, 0, HDMI_ENV_PARAM_MAX_LEN);
236 if (tmpstr)
237 strncpy(env_colorattr, tmpstr, HDMI_ENV_PARAM_MAX_LEN - 1);
238
239 tmpstr = env_get("user_colorattribute");
240 pr_info("user_colorattribute: %s\n", tmpstr ? tmpstr : "");
241 memset(env_usercolorattr, 0, HDMI_ENV_PARAM_MAX_LEN);
242 if (tmpstr)
243 strncpy(env_usercolorattr, tmpstr, HDMI_ENV_PARAM_MAX_LEN - 1);
244}
245
246static void save_hdmi_tfr_mode(void)
247{
248 const char *tfr_mode = NULL;
249 const char *mode = NULL;
250 const struct hdmi_timing *tfr_timing = NULL;
251 const struct hdmi_timing *mode_timing = NULL;
252
253 /*
254 * case1: hdmimode not none
255 * if TV changed, hdmimode != outputmode
256 */
257 tfr_mode = env_get("hdmimode");
258 if (tfr_mode) {
259 tfr_timing = hdmitx21_gettiming_from_name(tfr_mode);
260 if (tfr_timing) {
261 mode = env_get("outputmode");
262 mode_timing= hdmitx21_gettiming_from_name(mode);
263 if ((mode_timing->h_active < tfr_timing->h_active) &&
264 (mode_timing->v_freq < tfr_timing->v_freq))
265 env_set("tfr_mode", env_get("outputmode"));
266 else
267 env_set("tfr_mode", env_get("hdmimode"));
268 pr_info("hdmitx: qms: save tfr mode %s from hdmimode\n", tfr_mode);
269 return;
270 }
271 }
272
273 /*
274 * case2: hdmimode as none, or NULL
275 */
276 tfr_mode = env_get("outputmode");
277 if (tfr_mode) {
278 tfr_timing = hdmitx21_gettiming_from_name(tfr_mode);
279 if (tfr_timing) {
280 env_set("tfr_mode", tfr_mode);
281 pr_info("hdmitx: qms: save tfr mode %s from outputmoe\n", tfr_mode);
282 return;
283 }
284 }
285 pr_info("hdmitx: qms: failed to save tfr mode\n");
286}
287
288/*
lizhi.hu506ddfa2024-07-10 21:35:41 +0800289 * If environment qms_en is true, and RX supports QMS, and the
Wenjie Qiao4bdbbee2024-02-01 10:16:44 +0800290 * output mode is BRR then enable TX QMS
291 */
292static void qms_scene_pre_process(struct hdmitx_dev *hdev)
293{
294 bool env_qms_en = 0;
295 bool rx_qms_cap = 0;
296 enum hdmi_vic qms_brr_vic = HDMI_UNKNOWN;
zongdong.jiaob6fa9962024-08-25 19:51:48 +0800297 const struct hdmi_timing *tfr_timing = NULL;
298 const struct hdmi_timing *brr_timing = NULL;
Wenjie Qiao4bdbbee2024-02-01 10:16:44 +0800299 char *color = NULL;
zongdong.jiao1ac547f2024-03-06 13:43:31 +0800300 const char *i_modes[3] = {
301 "480i", "576i", "1080i",
302 };
303 char *mode;
304 int i;
305
lizhi.hu506ddfa2024-07-10 21:35:41 +0800306 /* default as 0 */
307 hdev->qms_en = 0;
zongdong.jiaob6fa9962024-08-25 19:51:48 +0800308
309 if (hdev->vic == HDMI_UNKNOWN)
310 return;
311
312 rx_qms_cap = hdev->RXCap.qms;
313
314 /* save current hdmimode/outputmode is QMS/TFR mode */
315 if (!rx_qms_cap)
316 return;
317
318 /* check uboot environment */
319 if (env_get("qms_en") && (env_get_ulong("qms_en", 10, 0) == 1))
320 env_qms_en = 1;
321 else
322 return;
323
zongdong.jiao1ac547f2024-03-06 13:43:31 +0800324 /* if current mode is interlaced mode, then skip QMS */
zongdong.jiaob6fa9962024-08-25 19:51:48 +0800325 mode = env_get("outputmode");
zongdong.jiao1ac547f2024-03-06 13:43:31 +0800326 if (!mode)
327 return;
328 for (i = 0; i < 3; i++) {
329 if (strstr(mode, i_modes[i]))
330 return;
331 }
Wenjie Qiao4bdbbee2024-02-01 10:16:44 +0800332
zongdong.jiaob6fa9962024-08-25 19:51:48 +0800333 check_hdmi_env_params();
Wenjie Qiao4bdbbee2024-02-01 10:16:44 +0800334
zongdong.jiaob6fa9962024-08-25 19:51:48 +0800335 save_hdmi_tfr_mode();
Wenjie Qiao4bdbbee2024-02-01 10:16:44 +0800336
zongdong.jiaob6fa9962024-08-25 19:51:48 +0800337 mode = env_get("tfr_mode");
338 if (!mode)
339 return;
340 tfr_timing = hdmitx21_gettiming_from_name(mode);
341 qms_brr_vic = hdmitx_find_brr_vic(tfr_timing->vic);
Wenjie Qiao4bdbbee2024-02-01 10:16:44 +0800342
343 if (env_qms_en && rx_qms_cap && qms_brr_vic != HDMI_UNKNOWN)
344 hdev->qms_en = 1;
zongdong.jiaob6fa9962024-08-25 19:51:48 +0800345 else
Wenjie Qiao4bdbbee2024-02-01 10:16:44 +0800346 return;
zongdong.jiaob6fa9962024-08-25 19:51:48 +0800347 /* check tfr is less than brr */
348 mode = env_get("outputmode");
349 brr_timing = hdmitx21_gettiming_from_vic(qms_brr_vic);
350 if (brr_timing->v_freq < tfr_timing->v_freq) {
351 hdev->qms_en = 0;
352 color = env_get("colorattribute");
353 hdev->vic = tfr_timing->vic;
354 mode = tfr_timing->sname ? tfr_timing->sname : tfr_timing->name;
355 hdev->para = hdmitx21_get_fmtpara(mode, color);
356 pr_info("hdmitx: qms: tfr %s larger than brr %s\n", env_get("tfr_mode"), mode);
Wenjie Qiao4bdbbee2024-02-01 10:16:44 +0800357 return;
358 }
zongdong.jiaob6fa9962024-08-25 19:51:48 +0800359
360 pr_info("hdmitx: qms: env %d rx %d vic %d brr_vic %d\n",
361 env_qms_en, rx_qms_cap, hdev->vic, qms_brr_vic);
362
363 hdev->brr_vic = qms_brr_vic;
364 /* reconfig the hdmi para */
365 brr_timing = hdmitx21_gettiming_from_vic(hdev->brr_vic);
xiang.wu168a8fa32024-05-27 17:20:43 +0800366 color = env_get("colorattribute");
zongdong.jiao15a19b22024-05-21 15:33:05 +0800367 /* save brr_vic to vic without the environment */
368 hdev->vic = hdev->brr_vic;
zongdong.jiaob6fa9962024-08-25 19:51:48 +0800369 mode = brr_timing->sname ? brr_timing->sname : brr_timing->name;
370 hdev->para = hdmitx21_get_fmtpara(mode, color);
371 check_hdmi_env_params();
Wenjie Qiao4bdbbee2024-02-01 10:16:44 +0800372}
373
374static void qms_scene_post_process(struct hdmitx_dev *hdev)
375{
zongdong.jiaob6fa9962024-08-25 19:51:48 +0800376 if (!hdev->qms_en)
377 return;
zongdong.jiao15a19b22024-05-21 15:33:05 +0800378
lizhi.hu506ddfa2024-07-10 21:35:41 +0800379 /* Init QMS parameter */
Wenjie Qiao4bdbbee2024-02-01 10:16:44 +0800380 vrr_init_qms_para(hdev);
zongdong.jiaob6fa9962024-08-25 19:51:48 +0800381 env_set("tfr_mode", NULL);
Wenjie Qiao4bdbbee2024-02-01 10:16:44 +0800382}
383
Wenjie Qiao8a73a562023-02-23 18:37:14 +0800384static int do_output(cmd_tbl_t *cmdtp, int flag, int argc, char *const argv[])
385{
386 const struct hdmi_timing *timing = NULL;
387 struct hdmitx_dev *hdev = get_hdmitx21_device();
388
xiang.wu1a6d6f1d2023-08-04 14:13:00 +0800389#ifdef CONFIG_PXP_EMULATOR
390 hdmitx21_pxp_init(1);
391#endif
Wenjie Qiao8a73a562023-02-23 18:37:14 +0800392 if (argc < 1)
393 return cmd_usage(cmdtp);
394
395 if (strcmp(argv[1], "list") == 0) {
396 hdev->hwop.list_support_modes();
397 } else if (strcmp(argv[1], "bist") == 0) {
398 unsigned int mode = 0;
399
400 if (strcmp(argv[2], "off") == 0)
401 mode = 0;
402 else if (strcmp(argv[2], "line") == 0)
403 mode = 2;
404 else if (strcmp(argv[2], "dot") == 0)
405 mode = 3;
406 else if (strcmp(argv[2], "x") == 0)
407 mode = 'x';
408 else if (strcmp(argv[2], "X") == 0)
409 mode = 'X';
410 else
411 mode = simple_strtoul(argv[2], NULL, 10);
412 hdev->hwop.test_bist(mode);
413 } else if (strcmp(argv[1], "prbs") == 0) {
414 hdev->para->cs = HDMI_COLORSPACE_RGB;
415 hdev->para->cd = COLORDEPTH_24B;
416 hdev->vic = HDMI_16_1920x1080p60_16x9;
417 hdmitx21_set(hdev);
418 hdev->hwop.test_prbs();
419 } else if (strncmp(argv[1], "div40", 5) == 0) {
420 bool div40 = 0;
421
422 if (argv[1][5] == '1')
423 div40 = 1;
424 hdev->hwop.set_div40(div40);
425 } else { /* "output" */
Wenjie Qiao389d3ea2023-05-25 16:07:03 +0800426 if (!hdev->pxp_mode) {
xiang.wu114497ab2024-02-21 14:57:05 +0800427 if (!hdmitx_edid_check_data_valid(0, hdev->rawedid)) {
lizhi.hu506ddfa2024-07-10 21:35:41 +0800428 /*
429 * in SWPL-34712: if EDID parsing error in kernel,
Wenjie Qiao389d3ea2023-05-25 16:07:03 +0800430 * only forcely output default mode(480p,RGB,8bit)
431 * in sysctl, not save the default mode to env.
432 * if uboot follow this rule, will cause issue OTT-19333:
433 * uboot read edid error and then output default mode,
434 * without save it mode env. if then kernel edid normal,
435 * sysctrl/kernel get mode from env, the actual output
436 * mode differs with outputmode env,it will
437 * cause display abnormal(such as stretch). so don't
438 * follow this rule in uboot, that's to say the actual
439 * output mode needs to stays with the outputmode env.
440 */
441 printf("edid parsing ng, forcely output 720p, rgb,8bit\n");
442 save_default_720p();
443 hdev->vic = HDMI_4_1280x720p60_16x9;
444 hdev->para =
445 hdmitx21_get_fmtpara("720p60hz", "rgb,8bit");
446 hdev->para->cs = HDMI_COLORSPACE_RGB;
447 hdev->para->cd = COLORDEPTH_24B;
448 hdmitx21_set(hdev);
449 return CMD_RET_SUCCESS;
450 }
Wenjie Qiao8a73a562023-02-23 18:37:14 +0800451 }
452 if (!env_get("colorattribute"))
453 env_set("colorattribute", "444,8bit");
zongdong.jiaob6fa9962024-08-25 19:51:48 +0800454 /* if QMS is enabled, no need to use argv[1] */
455 if (!hdev->qms_en) {
456 hdev->para = hdmitx21_get_fmtpara(argv[1], env_get("colorattribute"));
457 hdev->vic = hdev->para->timing.vic;
458 }
xiang.wu114497ab2024-02-21 14:57:05 +0800459 if (hdev->vic == HDMI_0_UNKNOWN) {
Wenjie Qiao8a73a562023-02-23 18:37:14 +0800460 /* Not find VIC */
461 printf("Not find '%s' mapped VIC\n", argv[1]);
462 return CMD_RET_FAILURE;
463 }
464 if (strstr(argv[1], "hz420"))
465 hdev->para->cs = HDMI_COLORSPACE_YUV420;
466 /* S5 support over 6G, T7 not support */
467 switch (hdev->vic) {
468 case HDMI_96_3840x2160p50_16x9:
469 case HDMI_97_3840x2160p60_16x9:
470 case HDMI_101_4096x2160p50_256x135:
471 case HDMI_102_4096x2160p60_256x135:
472 case HDMI_106_3840x2160p50_64x27:
473 case HDMI_107_3840x2160p60_64x27:
Wenjie Qiao4bdbbee2024-02-01 10:16:44 +0800474 if (hdev->chip_type != MESON_CPU_ID_S5) {
Wenjie Qiao8a73a562023-02-23 18:37:14 +0800475 if (hdev->para->cs == HDMI_COLORSPACE_RGB ||
476 hdev->para->cs == HDMI_COLORSPACE_YUV444) {
477 if (hdev->para->cd != COLORDEPTH_24B) {
478 printf("vic %d cs %d has no cd %d\n",
479 hdev->vic,
480 hdev->para->cs,
481 hdev->para->cd);
482 hdev->para->cd = COLORDEPTH_24B;
483 printf("set cd as %d\n", COLORDEPTH_24B);
484 }
485 }
486 }
487 break;
488 default:
lizhi.hu506ddfa2024-07-10 21:35:41 +0800489 /*
490 * In Spec2.1 Table 7-34, v_active greater than or equal to 2160 and refresh
zhou.hanaccf2ad2024-06-29 11:36:03 +0800491 * rate greater than 30 will support y420
492 * Only the S5 will run this case, because 4k 50/60hz has already been
493 * filtered and only S5 support over 6G (4k 100/120hz)
494 */
Wenjie Qiao8a73a562023-02-23 18:37:14 +0800495 timing = hdmitx21_gettiming_from_vic(hdev->vic);
496 if (!timing)
497 break;
zhou.hanaccf2ad2024-06-29 11:36:03 +0800498 if (timing->v_active >= 2160 && timing->v_freq > 30000)
Wenjie Qiao8a73a562023-02-23 18:37:14 +0800499 break;
500 if (timing->v_active >= 4320)
501 break;
502 if (hdev->para->cs == HDMI_COLORSPACE_YUV420) {
503 printf("vic %d has no cs %d\n", hdev->vic,
504 hdev->para->cs);
505 hdev->para->cs = HDMI_COLORSPACE_YUV444;
506 printf("set cs as %d\n", HDMI_COLORSPACE_YUV444);
507 }
508 break;
509 }
510 printf("set hdmitx VIC = %d CS = %d CD = %d\n",
511 hdev->vic, hdev->para->cs, hdev->para->cd);
lizhi.hu506ddfa2024-07-10 21:35:41 +0800512 /*
513 * currently, hdmi mode is always set, if
Wenjie Qiao8a73a562023-02-23 18:37:14 +0800514 * mode set abort/exit, need to add return
515 * result of mode setting, so that vout
516 * driver will pass it to kernel, and do
517 * mode setting again when vout init in kernel
518 */
zongdong.jiaob6fa9962024-08-25 19:51:48 +0800519 qms_scene_pre_process(hdev);
Wenjie Qiao8a73a562023-02-23 18:37:14 +0800520 hdmitx21_set(hdev);
Wenjie Qiao4bdbbee2024-02-01 10:16:44 +0800521 qms_scene_post_process(hdev);
Wenjie Qiaoaf3ac882024-05-29 10:12:12 +0800522 if (hdev->para->frl_rate && !hdev->flt_train_st) {
Wenjie Qiao389d3ea2023-05-25 16:07:03 +0800523 /* FLT training failed, need go to tmds mode */
524 printf("hdmitx frl training failed, set tmds mode\n");
xiang.wu1dba66a02024-05-28 19:53:01 +0800525 hdmitx_module_disable();
526 hdev->frl_train_fail_flag = true;
527 run_command("run init_display", 0);
Wenjie Qiao389d3ea2023-05-25 16:07:03 +0800528 }
Wenjie Qiao8a73a562023-02-23 18:37:14 +0800529 }
530 return CMD_RET_SUCCESS;
531}
532
533static int do_clkmsr(cmd_tbl_t *cmdtp, int flag, int argc, char *const argv[])
534{
Wenjie Qiao4bdbbee2024-02-01 10:16:44 +0800535 struct hdmitx_dev *hdev = get_hdmitx21_device();
536
537 if (hdev->chip_type == MESON_CPU_ID_S5) {
538 clk_msr(4);
539 clk_msr(8);
540 clk_msr(16);
541 clk_msr(27);
542 clk_msr(63);
543 clk_msr(64);
544 clk_msr(66);
545 clk_msr(68);
546 clk_msr(69);
547 clk_msr(70);
548 clk_msr(71);
549 clk_msr(72);
550 clk_msr(73);
551 clk_msr(74);
552 clk_msr(75);
553 clk_msr(76);
554 clk_msr(79);
555 clk_msr(82);
556 clk_msr(89);
557 clk_msr(90);
558 clk_msr(91);
559 clk_msr(92);
560 clk_msr(93);
561 clk_msr(94);
562 clk_msr(95);
563 return CMD_RET_SUCCESS;
564 }
Wenjie Qiao8a73a562023-02-23 18:37:14 +0800565 clk_msr(51);
566 clk_msr(59);
567 clk_msr(61);
568 clk_msr(76);
569 clk_msr(77);
570 clk_msr(78);
571 clk_msr(80);
572 clk_msr(81);
573 clk_msr(82);
574 clk_msr(83);
575 clk_msr(219);
576 clk_msr(220);
577 clk_msr(221);
578 clk_msr(222);
579 return CMD_RET_SUCCESS;
580}
581
582static int do_blank(cmd_tbl_t *cmdtp, int flag, int argc, char *const argv[])
583{
584 struct hdmitx_dev *hdev = get_hdmitx21_device();
585
586 if (argc < 1)
587 return cmd_usage(cmdtp);
588
589 if (strcmp(argv[1], "1") == 0)
590 hdev->hwop.output_blank(1);
591 if (strcmp(argv[1], "0") == 0)
592 hdev->hwop.output_blank(0);
593
594 return CMD_RET_SUCCESS;
595}
596
597static int do_off(cmd_tbl_t *cmdtp, int flag, int argc, char *const argv[])
598{
599 struct hdmitx_dev *hdev = get_hdmitx21_device();
600
xiang.wu114497ab2024-02-21 14:57:05 +0800601 hdev->vic = HDMI_0_UNKNOWN;
Wenjie Qiao4bdbbee2024-02-01 10:16:44 +0800602 if (hdev->chip_type == MESON_CPU_ID_S5)
603 hdmitx_module_disable();
Wenjie Qiao8a73a562023-02-23 18:37:14 +0800604 hdev->hwop.turn_off();
605 printf("turn off hdmitx\n");
606 return 1;
607}
608
609static int do_dump(cmd_tbl_t *cmdtp, int flag, int argc, char *const argv[])
610{
611 struct hdmitx_dev *hdev = get_hdmitx21_device();
612
613 hdev->hwop.dump_regs();
614 return 1;
615}
616
617static int do_reg(cmd_tbl_t *cmdtp, int flag, int argc, char *const argv[])
618{
619 unsigned long addr = 0;
620 unsigned int data = 0;
621
622 if (argc < 1)
623 return cmd_usage(cmdtp);
624
625 if (strncmp(argv[1], "rh", 2) == 0) {
626 addr = strtoul(argv[1] + 2, NULL, 16);
627 data = hdmitx21_rd_reg((unsigned int)addr);
628 printf("rd[0x%lx] 0x%x\n", addr, data);
629 }
630
631 if (strncmp(argv[1], "wh", 2) == 0) {
632 addr = strtoul(argv[1] + 2, NULL, 16);
633 data = strtoul(argv[2], NULL, 16);
634 hdmitx21_wr_reg(addr, data);
635 printf("wr[0x%lx] 0x%x\n", addr, data);
636 }
637
638 return 1;
639}
640
xiang.wu1a6d6f1d2023-08-04 14:13:00 +0800641static int do_pbist(cmd_tbl_t *cmdtp, int flag, int argc, char *const argv[])
642{
643 struct hdmitx_dev *hdev = get_hdmitx21_device();
644
645 if (strcmp(argv[1], "1") == 0)
646 hdmitx21_pbist_config(hdev, hdev->vic, 1);
647 if (strcmp(argv[1], "0") == 0)
648 hdmitx21_pbist_config(hdev, hdev->vic, 0);
649 return 1;
650}
651
xiang.wu1492f3642024-01-08 14:06:40 +0800652static int do_s7_clk_config(cmd_tbl_t *cmdtp, int flag, int argc, char *const argv[])
653{
654 struct hdmitx_dev *hdev = get_hdmitx21_device();
655
656 if (strcmp(argv[1], "1") == 0) {
657 hdev->s7_clk_config = 1;
658 pr_info("s7_clk_config = %d\n", hdev->s7_clk_config);
659 } if (strcmp(argv[1], "0") == 0) {
660 hdev->s7_clk_config = 0;
661 pr_info("s7_clk_config = %d\n", hdev->s7_clk_config);
662 }
663 return 1;
664}
665
xiang.wu114497ab2024-02-21 14:57:05 +0800666static int get_rterm(cmd_tbl_t *cmdtp, int flag, int argc, char *const argv[])
667{
668 struct arm_smccc_res res;
669 u8 rterm_efuse;
670
671 arm_smccc_smc(HDCPTX_IOOPR, HDMITX_GET_RTERM, 0, 0, 0, 0, 0, 0, &res);
672 rterm_efuse = (unsigned int)((res.a0) & 0xffffffff);
673 pr_info("rterm_efuse = %d\n", rterm_efuse);
674 return 1;
675}
676
xiang.wu1a6d6f1d2023-08-04 14:13:00 +0800677static int do_debug(cmd_tbl_t *cmdtp, int flag, int argc, char *const argv[])
678{
679 unsigned int enable_all = 0;
680 int pkt_op = 0;
681 unsigned int mov_val = 0;
682 unsigned char pb[28] = {0x46, 0xD0, 0x00, 0x00, 0x00, 0x00, 0x46, 0xD0,
683 0x00, 0x10, 0x21, 0xaa, 0x9b, 0x96, 0x19, 0xfc, 0x19, 0x75, 0xd5, 0x78,
684 0x10, 0x21, 0xaa, 0x9b, 0x96, 0x19, 0xfc, 0x19};
685 unsigned char hb[3] = {0x01, 0x02, 0x03};
686
687 if (argc < 1)
688 return cmd_usage(cmdtp);
689
690 if (strncmp(argv[1], "pkt", 3) == 0) {
691 enable_all = strtoul(argv[1] + 3, NULL, 16);
692 pkt_op = strtoul(argv[2], NULL, 16);
693 mov_val = strtoul(argv[3], NULL, 10);
694 pkt_send_position_change(enable_all, pkt_op, mov_val);
695 } else if (strncmp(argv[1], "w_dhdr", 6) == 0 ) {
696 hdmitx21_write_dhdr_sram();
697 } else if (strncmp(argv[1], "r_dhdr", 6) == 0 ) {
698 hdmitx21_read_dhdr_sram();
699 } else if (strncmp(argv[1], "t_avi", 4) == 0 ) {
700 printf("test send avi pkt\n");
701 hdmi_avi_infoframe_rawset(hb, pb);
702 } else if (strncmp(argv[1], "t_audio", 7) == 0 ) {
703 printf("test send audio pkt\n");
704 hdmi_audio_infoframe_rawset(hb, pb);
705 } else if (strncmp(argv[1], "t_sbtm", 6) == 0 ) {
706 printf("test send SBTM pkt\n");
707 hdmitx21_send_sbtm_pkt();
708 }
709
710 return 1;
711}
712
lizhi.hu506ddfa2024-07-10 21:35:41 +0800713/*
714 * step1, only select VIC which is supported in EDID
Wenjie Qiaoaf3ac882024-05-29 10:12:12 +0800715 * step2, check if VIC is supported by SOC hdmitx
716 * step3, build format with basic mode/attr and check
717 * if it's supported by EDID/hdmitx_cap
718 */
Wenjie Qiao8a73a562023-02-23 18:37:14 +0800719static void disp_cap_show(struct hdmitx_dev *hdev)
720{
Wenjie Qiao8a73a562023-02-23 18:37:14 +0800721 if (!hdev)
722 return;
723
Wenjie Qiaoaf3ac882024-05-29 10:12:12 +0800724 struct rx_cap *prxcap = &hdev->RXCap;
725 const struct hdmi_timing *timing = NULL;
726 enum hdmi_vic vic;
727 int i = 0;
728 int vic_len = prxcap->VIC_count + VESA_MAX_TIMING;
729 int *edid_vics = vmalloc(vic_len * sizeof(int));
730 enum hdmi_vic prefer_vic = HDMI_0_UNKNOWN;
731
732 memset(edid_vics, 0, vic_len * sizeof(int));
733
lizhi.hu506ddfa2024-07-10 21:35:41 +0800734 /*
735 * step1: only select VIC which is supported in EDID
736 * copy edid vic list
737 */
Wenjie Qiaoaf3ac882024-05-29 10:12:12 +0800738 if (prxcap->VIC_count > 0)
739 memcpy(edid_vics, prxcap->VIC, sizeof(int) * prxcap->VIC_count);
740 for (i = 0; i < VESA_MAX_TIMING && prxcap->vesa_timing[i]; i++)
741 edid_vics[prxcap->VIC_count + i] = prxcap->vesa_timing[i];
742
743 for (i = 0; i < vic_len; i++) {
744 vic = edid_vics[i];
745 if (vic == HDMI_0_UNKNOWN)
Wenjie Qiao8a73a562023-02-23 18:37:14 +0800746 continue;
Wenjie Qiaoaf3ac882024-05-29 10:12:12 +0800747
748 prefer_vic = hdmitx_get_prefer_vic(hdev, vic);
749 /* if mode_best_vic is support by RX, try 16x9 first */
zhou.hana8e91612024-04-28 14:56:45 +0000750 if (prefer_vic != vic) {
Wenjie Qiaoaf3ac882024-05-29 10:12:12 +0800751 pr_info("%s: check prefer vic:%d exist, ignore [%d].\n",
752 __func__, prefer_vic, vic);
zhou.hana8e91612024-04-28 14:56:45 +0000753 continue;
754 }
Wenjie Qiaoaf3ac882024-05-29 10:12:12 +0800755
756 timing = hdmitx_mode_vic_to_hdmi_timing(vic);
757 if (!timing) {
lizhi.hu506ddfa2024-07-10 21:35:41 +0800758 /* HDMITX_ERROR("%s: unsupport vic [%d]\n", __func__, vic); */
Wenjie Qiaoaf3ac882024-05-29 10:12:12 +0800759 continue;
760 }
761
762 /* step2, check if VIC is supported by SOC hdmitx */
763 if (hdmitx_common_validate_vic(&hdev->tx_common, vic) != 0) {
lizhi.hu506ddfa2024-07-10 21:35:41 +0800764 /* HDMITX_ERROR("%s: vic[%d] over range.\n", __func__, vic); */
Wenjie Qiaoaf3ac882024-05-29 10:12:12 +0800765 continue;
766 }
767
lizhi.hu506ddfa2024-07-10 21:35:41 +0800768 /*
769 * step3, build format with basic mode/attr and check
Wenjie Qiaoaf3ac882024-05-29 10:12:12 +0800770 * if it's supported by EDID/hdmitx_cap
771 */
772 if (hdmitx_common_check_valid_para_of_vic(&hdev->tx_common, vic) != 0) {
lizhi.hu506ddfa2024-07-10 21:35:41 +0800773 /* HDMITX_ERROR("%s: vic[%d] check fmt attr failed.\n", __func__, vic); */
Wenjie Qiaoaf3ac882024-05-29 10:12:12 +0800774 continue;
775 }
776
777 printf(" %s\n", timing->sname ? timing->sname : timing->name);
778
779 if (vic == prxcap->native_vic)
780 printf("*\n");
781 else
782 printf("\n");
Wenjie Qiao8a73a562023-02-23 18:37:14 +0800783 }
Wenjie Qiaoaf3ac882024-05-29 10:12:12 +0800784
xiang.wu114497ab2024-02-21 14:57:05 +0800785 printf("420_cap\n");
786 for (i = 0; i < Y420_VIC_MAX_NUM; i++) {
Wenjie Qiaoaf3ac882024-05-29 10:12:12 +0800787 vic = prxcap->y420_vic[i];
xiang.wu114497ab2024-02-21 14:57:05 +0800788 printf("420vic:%d\n", vic);
789 }
Wenjie Qiaoaf3ac882024-05-29 10:12:12 +0800790 vfree(edid_vics);
Wenjie Qiao8a73a562023-02-23 18:37:14 +0800791}
792
793static void vesa_cap_show(struct hdmitx_dev *hdev)
794{
795}
796
797static void dc_cap_show(struct hdmitx_dev *hdev)
798{
Wenjie Qiao8a73a562023-02-23 18:37:14 +0800799 struct rx_cap *prxcap = &hdev->RXCap;
Wenjie Qiaoaf3ac882024-05-29 10:12:12 +0800800 const struct dv_info *dv = &prxcap->dv_info;
801 const struct dv_info *dv2 = &prxcap->dv_info2;
802 int i;
Wenjie Qiao8a73a562023-02-23 18:37:14 +0800803
Wenjie Qiaoaf3ac882024-05-29 10:12:12 +0800804 /* DVI case, only rgb,8bit */
805 if (prxcap->ieeeoui != HDMI_IEEE_OUI) {
806 printf("rgb,8bit\n");
807 return;
808 }
809
Wenjie Qiao8a73a562023-02-23 18:37:14 +0800810 if (prxcap->dc_36bit_420)
811 printf("420,12bit\n");
Wenjie Qiaoaf3ac882024-05-29 10:12:12 +0800812 if (prxcap->dc_30bit_420)
Wenjie Qiao8a73a562023-02-23 18:37:14 +0800813 printf("420,10bit\n");
Wenjie Qiaoaf3ac882024-05-29 10:12:12 +0800814
815 for (i = 0; i < Y420_VIC_MAX_NUM; i++) {
816 if (prxcap->y420_vic[i]) {
Wenjie Qiao8a73a562023-02-23 18:37:14 +0800817 printf("420,8bit\n");
Wenjie Qiaoaf3ac882024-05-29 10:12:12 +0800818 break;
Wenjie Qiao8a73a562023-02-23 18:37:14 +0800819 }
820 }
Wenjie Qiaoaf3ac882024-05-29 10:12:12 +0800821
Wenjie Qiao8a73a562023-02-23 18:37:14 +0800822 if (prxcap->native_Mode & (1 << 5)) {
823 if (prxcap->dc_y444) {
Wenjie Qiaoaf3ac882024-05-29 10:12:12 +0800824 if (prxcap->dc_36bit || dv->sup_10b_12b_444 == 0x2 ||
825 dv2->sup_10b_12b_444 == 0x2)
Wenjie Qiao8a73a562023-02-23 18:37:14 +0800826 printf("444,12bit\n");
Wenjie Qiaoaf3ac882024-05-29 10:12:12 +0800827 if (prxcap->dc_30bit || dv->sup_10b_12b_444 == 0x1 ||
828 dv2->sup_10b_12b_444 == 0x1) {
Wenjie Qiao8a73a562023-02-23 18:37:14 +0800829 printf("444,10bit\n");
Wenjie Qiaoaf3ac882024-05-29 10:12:12 +0800830 }
Wenjie Qiao8a73a562023-02-23 18:37:14 +0800831 }
832 printf("444,8bit\n");
833 }
834 /* y422, not check dc */
Wenjie Qiaoaf3ac882024-05-29 10:12:12 +0800835 if (prxcap->native_Mode & (1 << 4))
Wenjie Qiao8a73a562023-02-23 18:37:14 +0800836 printf("422,12bit\n");
Wenjie Qiao8a73a562023-02-23 18:37:14 +0800837
Wenjie Qiaoaf3ac882024-05-29 10:12:12 +0800838 if (prxcap->dc_36bit || dv->sup_10b_12b_444 == 0x2 ||
839 dv2->sup_10b_12b_444 == 0x2)
Wenjie Qiao8a73a562023-02-23 18:37:14 +0800840 printf("rgb,12bit\n");
Wenjie Qiaoaf3ac882024-05-29 10:12:12 +0800841 if (prxcap->dc_30bit || dv->sup_10b_12b_444 == 0x1 ||
842 dv2->sup_10b_12b_444 == 0x1)
Wenjie Qiao8a73a562023-02-23 18:37:14 +0800843 printf("rgb,10bit\n");
844 printf("rgb,8bit\n");
845}
846
847static void aud_cap_show(struct hdmitx_dev *hdev)
848{
849}
850
851static void hdr_cap_show(struct hdmitx_dev *hdev)
852{
853 int hdr10plugsupported = 0;
854 struct hdr_info *hdr = &hdev->RXCap.hdr_info;
xiang.wu114497ab2024-02-21 14:57:05 +0800855 const struct hdr10_plus_info *hdr10p = &hdev->RXCap.hdr_info.hdr10plus_info;
Wenjie Qiao8a73a562023-02-23 18:37:14 +0800856
857 printf("\nhdr_cap\n");
858 if (hdr10p->ieeeoui == HDR10_PLUS_IEEE_OUI &&
859 hdr10p->application_version != 0xFF)
860 hdr10plugsupported = 1;
861 printf("HDR10Plus Supported: %d\n", hdr10plugsupported);
862 printf("HDR Static Metadata:\n");
863 printf(" Supported EOTF:\n");
xiang.wu114497ab2024-02-21 14:57:05 +0800864 printf(" Traditional SDR: %d\n", !!(hdr->hdr_support & HDR_SUP_EOTF_SDR));
865 printf(" Traditional HDR: %d\n", !!(hdr->hdr_support & HDR_SUP_EOTF_HDR));
866 printf(" SMPTE ST 2084: %d\n", !!(hdr->hdr_support & HDR_SUP_EOTF_SMPTE_ST_2084));
867 printf(" Hybrid Log-Gamma: %d\n", !!(hdr->hdr_support & HDR_SUP_EOTF_HLG));
868 printf(" Supported SMD type1: %d\n", hdr->static_metadata_type1);
Wenjie Qiao8a73a562023-02-23 18:37:14 +0800869 printf(" Luminance Data\n");
xiang.wu114497ab2024-02-21 14:57:05 +0800870 printf(" Max: %d\n", hdr->lumi_max);
871 printf(" Avg: %d\n", hdr->lumi_avg);
872 printf(" Min: %d\n\n", hdr->lumi_min);
Wenjie Qiao8a73a562023-02-23 18:37:14 +0800873 printf("HDR Dynamic Metadata:");
874}
875
876static void _dv_cap_show(const struct dv_info *dv)
877{
878 int i;
879
880 if (dv->ieeeoui != DV_IEEE_OUI || dv->block_flag != CORRECT) {
881 printf("The Rx don't support DolbyVision\n");
882 return;
883 }
884 printf("DolbyVision RX support list:\n");
885
886 if (dv->ver == 0) {
887 printf("VSVDB Version: V%d\n", dv->ver);
888 printf("2160p%shz: 1\n", dv->sup_2160p60hz ? "60" : "30");
889 printf("Support mode:\n");
890 printf(" DV_RGB_444_8BIT\n");
891 if (dv->sup_yuv422_12bit)
892 printf(" DV_YCbCr_422_12BIT\n");
893 }
894 if (dv->ver == 1) {
895 printf("VSVDB Version: V%d(%d-byte)\n", dv->ver, dv->length + 1);
896 if (dv->length == 0xB) {
897 printf("2160p%shz: 1\n", dv->sup_2160p60hz ? "60" : "30");
898 printf("Support mode:\n");
899 printf(" DV_RGB_444_8BIT\n");
900 if (dv->sup_yuv422_12bit)
901 printf(" DV_YCbCr_422_12BIT\n");
902 if (dv->low_latency == 0x01)
903 printf(" LL_YCbCr_422_12BIT\n");
904 }
905
906 if (dv->length == 0xE) {
907 printf("2160p%shz: 1\n", dv->sup_2160p60hz ? "60" : "30");
908 printf("Support mode:\n");
909 printf(" DV_RGB_444_8BIT\n");
910 if (dv->sup_yuv422_12bit)
911 printf(" DV_YCbCr_422_12BIT\n");
912 }
913 }
914 if (dv->ver == 2) {
915 printf("VSVDB Version: V%d\n", dv->ver);
916 printf("2160p%shz: 1\n", dv->sup_2160p60hz ? "60" : "30");
917 printf("Support mode:\n");
918 if (dv->Interface != 0x00 && dv->Interface != 0x01) {
919 printf(" DV_RGB_444_8BIT\n");
920 if (dv->sup_yuv422_12bit)
921 printf(" DV_YCbCr_422_12BIT\n");
922 }
923 printf(" LL_YCbCr_422_12BIT\n");
924 if (dv->Interface == 0x01 || dv->Interface == 0x03) {
925 if (dv->sup_10b_12b_444 == 0x1)
926 printf(" LL_RGB_444_10BIT\n");
927 if (dv->sup_10b_12b_444 == 0x2)
928 printf(" LL_RGB_444_12BIT\n");
929 }
930 }
931 printf("IEEEOUI: 0x%06x\n", dv->ieeeoui);
932 printf("VSVDB: ");
933 for (i = 0; i < (dv->length + 1); i++)
934 printf("%02x", dv->rawdata[i]);
935 printf("\n");
936}
937
938static void dv_cap_show(struct hdmitx_dev *hdev)
939{
940 const struct dv_info *dv = &hdev->RXCap.dv_info;
941
942 printf("dv_cap\n");
943 if (dv->ieeeoui != DV_IEEE_OUI) {
944 printf("The Rx don't support DolbyVision\n");
945 return;
946 }
947 _dv_cap_show(dv);
948}
949
950static void edid_cap_show(struct hdmitx_dev *hdev)
951{
952 int i;
953 struct rx_cap *prxcap = &hdev->RXCap;
954
xiang.wu114497ab2024-02-21 14:57:05 +0800955 printf("Rx EDID Parse:\n");
956 printf("Rx Manufacturer Name: %s\n", prxcap->IDManufacturerName);
957 printf("Rx Product Code: %02x%02x\n",
958 prxcap->IDProductCode[0], prxcap->IDProductCode[1]);
959 printf("Rx Serial Number: %02x%02x%02x%02x\n",
960 prxcap->IDSerialNumber[0],
961 prxcap->IDSerialNumber[1],
962 prxcap->IDSerialNumber[2],
963 prxcap->IDSerialNumber[3]);
964 printf("Rx Product Name: %s\n", prxcap->ReceiverProductName);
Wenjie Qiao8a73a562023-02-23 18:37:14 +0800965
xiang.wu114497ab2024-02-21 14:57:05 +0800966 printf("Manufacture Week: %d\n", prxcap->manufacture_week);
967 printf("Manufacture Year: %d\n", prxcap->manufacture_year + 1990);
Wenjie Qiao8a73a562023-02-23 18:37:14 +0800968
xiang.wu114497ab2024-02-21 14:57:05 +0800969 printf("Physical size(mm): %d x %d\n",
970 prxcap->physical_width, prxcap->physical_height);
971
972 printf("EDID Version: %d.%d\n",
973 prxcap->edid_version, prxcap->edid_revision);
974
lizhi.hu506ddfa2024-07-10 21:35:41 +0800975/*
976 * printf(
xiang.wu114497ab2024-02-21 14:57:05 +0800977 * "EDID block number: 0x%x\n", tx_comm->EDID_buf[0x7e]);
978 *
979 *
980 * printf(
981 * "Source Physical Address[a.b.c.d]: %x.%x.%x.%x\n",
982 * hdmitx_device->hdmi_info.vsdb_phy_addr.a,
983 * hdmitx_device->hdmi_info.vsdb_phy_addr.b,
984 * hdmitx_device->hdmi_info.vsdb_phy_addr.c,
985 * hdmitx_device->hdmi_info.vsdb_phy_addr.d);
986 */
987
lizhi.hu506ddfa2024-07-10 21:35:41 +0800988 /* TODO native_vic2 */
Wenjie Qiao8a73a562023-02-23 18:37:14 +0800989 printf("native Mode %x, VIC (native %d):\n",
xiang.wu114497ab2024-02-21 14:57:05 +0800990 prxcap->native_Mode, prxcap->native_vic);
Wenjie Qiao8a73a562023-02-23 18:37:14 +0800991
992 printf("ColorDeepSupport %x\n", prxcap->ColorDeepSupport);
993
xiang.wu114497ab2024-02-21 14:57:05 +0800994 for (i = 0; i < prxcap->VIC_count ; i++) {
Wenjie Qiao8a73a562023-02-23 18:37:14 +0800995 printf("%d ", prxcap->VIC[i]);
xiang.wu114497ab2024-02-21 14:57:05 +0800996 }
Wenjie Qiao8a73a562023-02-23 18:37:14 +0800997 printf("\n");
xiang.wu114497ab2024-02-21 14:57:05 +0800998 printf("Audio {format, channel, freq, cce}\n");
999 for (i = 0; i < prxcap->AUD_count; i++) {
1000 printf("{%d, %d, %x, %x}\n",
1001 prxcap->RxAudioCap[i].audio_format_code,
1002 prxcap->RxAudioCap[i].channel_num_max,
1003 prxcap->RxAudioCap[i].freq_cc,
1004 prxcap->RxAudioCap[i].cc3);
1005 }
1006 printf("Speaker Allocation: %x\n", prxcap->RxSpeakerAllocation);
1007 printf("Vendor: 0x%x ( %s device)\n", prxcap->ieeeoui, (prxcap->ieeeoui) ? "HDMI" : "DVI");
Wenjie Qiao8a73a562023-02-23 18:37:14 +08001008
1009 printf("MaxTMDSClock1 %d MHz\n", prxcap->Max_TMDS_Clock1 * 5);
1010
xiang.wu114497ab2024-02-21 14:57:05 +08001011 if (prxcap->hf_ieeeoui) {
1012 printf("Vendor2: 0x%x\n",
1013 prxcap->hf_ieeeoui);
1014 printf("MaxTMDSClock2 %d MHz\n",
1015 prxcap->Max_TMDS_Clock2 * 5);
Wenjie Qiao8a73a562023-02-23 18:37:14 +08001016 }
1017
xiang.wu114497ab2024-02-21 14:57:05 +08001018 printf("MaxFRLRate: %d\n", prxcap->max_frl_rate);
Wenjie Qiao8a73a562023-02-23 18:37:14 +08001019
xiang.wu114497ab2024-02-21 14:57:05 +08001020 if (prxcap->allm)
1021 printf("ALLM: %x\n", prxcap->allm);
Wenjie Qiao8a73a562023-02-23 18:37:14 +08001022
xiang.wu114497ab2024-02-21 14:57:05 +08001023 if (prxcap->cnc3)
1024 printf("Game/CNC3: %x\n", prxcap->cnc3);
Wenjie Qiao8a73a562023-02-23 18:37:14 +08001025
xiang.wu114497ab2024-02-21 14:57:05 +08001026 printf("vLatency: ");
1027 if (prxcap->vLatency == LATENCY_INVALID_UNKNOWN)
Wenjie Qiao8a73a562023-02-23 18:37:14 +08001028 printf(" Invalid/Unknown\n");
xiang.wu114497ab2024-02-21 14:57:05 +08001029 else if (prxcap->vLatency == LATENCY_NOT_SUPPORT)
Wenjie Qiao8a73a562023-02-23 18:37:14 +08001030 printf(" UnSupported\n");
1031 else
xiang.wu114497ab2024-02-21 14:57:05 +08001032 printf(" %d\n", prxcap->vLatency);
1033
1034 printf("aLatency: ");
1035 if (prxcap->aLatency == LATENCY_INVALID_UNKNOWN)
1036 printf(" Invalid/Unknown\n");
1037 else if (prxcap->aLatency == LATENCY_NOT_SUPPORT)
1038 printf(" UnSupported\n");
1039 else
1040 printf(" %d\n", prxcap->aLatency);
1041
1042 printf("i_vLatency: ");
1043 if (prxcap->i_vLatency == LATENCY_INVALID_UNKNOWN)
1044 printf(" Invalid/Unknown\n");
1045 else if (prxcap->i_vLatency == LATENCY_NOT_SUPPORT)
1046 printf(" UnSupported\n");
1047 else
1048 printf(" %d\n", prxcap->i_vLatency);
1049
1050 printf("i_aLatency: ");
1051 if (prxcap->i_aLatency == LATENCY_INVALID_UNKNOWN)
1052 printf(" Invalid/Unknown\n");
1053 else if (prxcap->i_aLatency == LATENCY_NOT_SUPPORT)
1054 printf(" UnSupported\n");
1055 else
1056 printf(" %d\n", prxcap->i_aLatency);
Wenjie Qiao8a73a562023-02-23 18:37:14 +08001057
1058 if (prxcap->colorimetry_data)
1059 printf("ColorMetry: 0x%x\n", prxcap->colorimetry_data);
Wenjie Qiao8a73a562023-02-23 18:37:14 +08001060
xiang.wu114497ab2024-02-21 14:57:05 +08001061 printf("SCDC: %x\n", prxcap->scdc_present);
1062
1063 printf("RR_Cap: %x\n",
1064 prxcap->scdc_rr_capable);
1065 printf("LTE_340M_Scramble: %x\n",
1066 prxcap->lte_340mcsc_scramble);
1067 /* dsc capability */
1068 printf("dsc_10bpc: %d\n",
1069 prxcap->dsc_10bpc);
1070 printf("dsc_12bpc: %d\n",
1071 prxcap->dsc_12bpc);
1072 printf("dsc_16bpc: %d\n",
1073 prxcap->dsc_16bpc);
1074 printf("dsc_all_bpp: %d\n",
1075 prxcap->dsc_all_bpp);
1076 printf("dsc_native_420: %d\n",
1077 prxcap->dsc_native_420);
1078 printf("dsc_1p2: %d\n",
1079 prxcap->dsc_1p2);
1080 printf("dsc_max_slices: 0x%x(%d slices)\n",
1081 prxcap->dsc_max_slices, dsc_max_slices_num[prxcap->dsc_max_slices]);
1082 printf("dsc_max_frl_rate: 0x%x\n",
1083 prxcap->dsc_max_frl_rate);
1084 printf("dsc_total_chunk_bytes: 0x%x\n",
1085 prxcap->dsc_total_chunk_bytes);
1086 if (prxcap->dv_info.ieeeoui == DOVI_IEEEOUI)
Wenjie Qiao8a73a562023-02-23 18:37:14 +08001087 printf(" DolbyVision%d", prxcap->dv_info.ver);
xiang.wu114497ab2024-02-21 14:57:05 +08001088
1089 if (prxcap->hdr_info2.hdr_support)
1090 printf(" HDR/%d",
1091 prxcap->hdr_info2.hdr_support);
1092 if (prxcap->hdr_info.sbtm_info.sbtm_support)
1093 printf(" SBTM");
Wenjie Qiao8a73a562023-02-23 18:37:14 +08001094 if (prxcap->dc_y444 || prxcap->dc_30bit || prxcap->dc_30bit_420)
1095 printf(" DeepColor");
1096 printf("\n");
xiang.wu114497ab2024-02-21 14:57:05 +08001097 printf("additional_vsif_num: %d\n", prxcap->additional_vsif_num);
1098 printf("ifdb_present: %d\n", prxcap->ifdb_present);
lizhi.hu506ddfa2024-07-10 21:35:41 +08001099 /*
1100 * for checkvalue which maybe used by application to adjust
xiang.wu114497ab2024-02-21 14:57:05 +08001101 * whether edid is changed
1102 */
1103 printf("checkvalue: %s\n", prxcap->hdmichecksum);
1104
Wenjie Qiao8a73a562023-02-23 18:37:14 +08001105}
1106
1107static int do_info(cmd_tbl_t *cmdtp, int flag, int argc, char *const argv[])
1108{
1109 struct hdmitx_dev *hdev = get_hdmitx21_device();
1110 struct hdmi_format_para *para;
1111
1112 if (!hdev) {
1113 pr_info("null hdmitx dev\n");
1114 return CMD_RET_FAILURE;
1115 }
1116 if (!hdev->para) {
1117 printf("null hdmitx para\n");
1118 return CMD_RET_FAILURE;
1119 }
1120
1121 para = hdev->para;
1122 printf("current mode %s vic %d\n", para->timing.name, hdev->vic);
1123 printf("cd%d cs%d cr%d\n", para->cd, para->cs, para->cr);
1124 printf("enc_idx %d\n", hdev->enc_idx);
1125 printf("frac_rate: %d\n", hdev->frac_rate_policy);
1126 printf("Rx EDID info\n");
1127 dump_full_edid(hdev->rawedid);
1128 disp_cap_show(hdev);
1129 vesa_cap_show(hdev);
1130 aud_cap_show(hdev);
1131 hdr_cap_show(hdev);
1132 dv_cap_show(hdev);
1133 dc_cap_show(hdev);
1134 edid_cap_show(hdev);
Wenjie Qiaoaf3ac882024-05-29 10:12:12 +08001135 printf("dsc policy: %d, enable: %d\n", hdev->tx_common.tx_hw->hdmi_tx_cap.dsc_policy,
1136 para->dsc_en);
1137 printf("frl_rate: %d\n", hdev->para->frl_rate);
Wenjie Qiao8a73a562023-02-23 18:37:14 +08001138 return 1;
1139}
1140
1141static int xtochar(int num, char *checksum)
1142{
1143 struct hdmitx_dev *hdev = get_hdmitx21_device();
1144
1145 if (((hdev->rawedid[num] >> 4) & 0xf) <= 9)
1146 checksum[0] = ((hdev->rawedid[num] >> 4) & 0xf) + '0';
1147 else
1148 checksum[0] = ((hdev->rawedid[num] >> 4) & 0xf) - 10 + 'a';
1149
1150 if ((hdev->rawedid[num] & 0xf) <= 9)
1151 checksum[1] = (hdev->rawedid[num] & 0xf) + '0';
1152 else
1153 checksum[1] = (hdev->rawedid[num] & 0xf) - 10 + 'a';
1154
1155 return 0;
1156}
1157
lizhi.hu506ddfa2024-07-10 21:35:41 +08001158/*
1159 * hdr_priority definition:
Wenjie Qiao4bdbbee2024-02-01 10:16:44 +08001160 * strategy1: bit[3:0]
1161 * 0: original cap
1162 * 1: disable dolby vision cap
1163 * 2: disable dolby vision and hdr/hlg cap
1164 * strategy2:
1165 * bit4: 1: disable dv 0:enable dv
1166 * bit5: 1: disable hdr10/hdr10+ 0: enable hdr10/hdr10+
1167 * bit6: 1: disable hlg 0: enable hlg
1168 * bit28-bit31 choose strategy: bit[31:28]
1169 * 0: strategy1
1170 * 1: strategy2
1171 */
1172
lizhi.hu506ddfa2024-07-10 21:35:41 +08001173/*
1174 * for uboot, there is no need to dynamically change the hdr_priority as
Wenjie Qiao4bdbbee2024-02-01 10:16:44 +08001175 * kernel. So below functions only implement the disable_xxx_info() function,
1176 * and leave the enable_xxx_info as blank
1177 */
1178
1179/* dv_info */
1180static void enable_dv_info(struct dv_info *des, const struct dv_info *src)
1181{
1182 if (!des || !src)
1183 return;
1184}
1185
1186static void disable_dv_info(struct dv_info *des)
1187{
1188 if (!des)
1189 return;
1190
1191 memset(des, 0, sizeof(*des));
1192}
1193
1194/* hdr10 */
1195static void enable_hdr10_info(struct hdr_info *des, const struct hdr_info *src)
1196{
1197 if (!des || !src)
1198 return;
1199}
1200
1201static void disable_hdr10_info(struct hdr_info *des)
1202{
1203 if (!des)
1204 return;
1205
xiang.wu114497ab2024-02-21 14:57:05 +08001206 des->hdr_support = des->hdr_support & 0xB;
1207 des->static_metadata_type1 = 0;
1208 des->lumi_max = 0;
1209 des->lumi_avg = 0;
1210 des->lumi_min = 0;
Wenjie Qiao4bdbbee2024-02-01 10:16:44 +08001211}
1212
1213/* hdr10plus */
1214static void enable_hdr10p_info(struct hdr10_plus_info *des, const struct hdr10_plus_info *src)
1215{
1216 if (!des || !src)
1217 return;
1218}
1219
1220static void disable_hdr10p_info(struct hdr10_plus_info *des)
1221{
1222 if (!des)
1223 return;
1224
1225 memset(des, 0, sizeof(*des));
1226}
1227
1228/* hlg */
1229static void enable_hlg_info(struct hdr_info *des, const struct hdr_info *src)
1230{
1231 if (!des || !src)
1232 return;
1233}
1234
1235static void disable_hlg_info(struct hdr_info *des)
1236{
1237 if (!des)
1238 return;
1239
xiang.wu114497ab2024-02-21 14:57:05 +08001240 des->hdr_support = des->hdr_support & 0x7;
Wenjie Qiao4bdbbee2024-02-01 10:16:44 +08001241}
1242
1243static void enable_all_hdr_info(struct rx_cap *prxcap)
1244{
1245 if (!prxcap)
1246 return;
1247}
1248
1249static void update_hdr_strategy1(struct rx_cap *prxcap, u32 strategy)
1250{
1251 if (!prxcap)
1252 return;
1253
1254 switch (strategy) {
1255 case 0:
1256 enable_all_hdr_info(prxcap);
1257 break;
1258 case 1:
1259 disable_dv_info(&prxcap->dv_info);
1260 break;
1261 case 2:
1262 disable_dv_info(&prxcap->dv_info);
1263 disable_hdr10_info(&prxcap->hdr_info);
xiang.wu114497ab2024-02-21 14:57:05 +08001264 disable_hdr10p_info(&prxcap->hdr_info.hdr10plus_info);
Wenjie Qiao4bdbbee2024-02-01 10:16:44 +08001265 disable_hlg_info(&prxcap->hdr_info);
1266 break;
1267 default:
1268 break;
1269 }
1270}
1271
1272static void update_hdr_strategy2(struct rx_cap *prxcap, u32 strategy)
1273{
1274 if (!prxcap)
1275 return;
1276
1277 /* bit4: 1 disable dv 0 enable dv */
1278 if (strategy & BIT(4))
1279 disable_dv_info(&prxcap->dv_info);
1280 else
1281 enable_dv_info(&prxcap->dv_info, NULL);
1282 /* bit5: 1 disable hdr10/hdr10+ 0 enable hdr10/hdr10+ */
1283 if (strategy & BIT(5)) {
1284 disable_hdr10_info(&prxcap->hdr_info);
xiang.wu114497ab2024-02-21 14:57:05 +08001285 disable_hdr10p_info(&prxcap->hdr_info.hdr10plus_info);
Wenjie Qiao4bdbbee2024-02-01 10:16:44 +08001286 } else {
1287 enable_hdr10_info(&prxcap->hdr_info, NULL);
xiang.wu114497ab2024-02-21 14:57:05 +08001288 enable_hdr10p_info(&prxcap->hdr_info.hdr10plus_info, NULL);
Wenjie Qiao4bdbbee2024-02-01 10:16:44 +08001289 }
1290 /* bit6: 1 disable hlg 0 enable hlg */
1291 if (strategy & BIT(6))
1292 disable_hlg_info(&prxcap->hdr_info);
1293 else
1294 enable_hlg_info(&prxcap->hdr_info, NULL);
1295}
1296
1297static int hdmitx_set_hdr_priority(struct rx_cap *prxcap, u32 hdr_priority)
1298{
1299 u32 choose = 0;
1300 u32 strategy = 0;
1301
1302 if (!prxcap)
1303 return -1;
1304
1305 printf("%s, set hdr_prio: %u\n", __func__, hdr_priority);
1306 /* choose strategy: bit[31:28] */
1307 choose = (hdr_priority >> 28) & 0xf;
1308 switch (choose) {
1309 case 0:
1310 strategy = hdr_priority & 0xf;
1311 update_hdr_strategy1(prxcap, strategy);
1312 break;
1313 case 1:
1314 strategy = hdr_priority & 0xf0;
1315 update_hdr_strategy2(prxcap, strategy);
1316 break;
1317 default:
1318 break;
1319 }
1320 return 0;
1321}
1322
xiang.wu100ee50f2024-05-21 19:39:45 +08001323void hdmitx_update_dv_strategy_info(struct dv_info *dv)
1324{
1325 if (dv->ver == 0) {
1326 if (dv->length == 0x19)
1327 dv->support_DV_RGB_444_8BIT = 1;
1328 }
1329
1330 if (dv->ver == 1) {
1331 if (dv->length == 0x0B) {
1332 dv->support_DV_RGB_444_8BIT = 1;
1333 if (dv->low_latency == 0x01)
1334 dv->support_LL_YCbCr_422_12BIT = 1;
1335 } else if (dv->length == 0x0E) {
1336 dv->support_DV_RGB_444_8BIT = 1;
1337 }
1338 }
1339
1340 if (dv->ver == 2) {
1341 if (dv->length >= 0x0B) {
1342 if (dv->Interface != 0x00 && dv->Interface != 0x01)
1343 dv->support_DV_RGB_444_8BIT = 1;
1344 dv->support_LL_YCbCr_422_12BIT = 1;
1345 if (dv->Interface == 0x01 || dv->Interface == 0x03) {
1346 if (dv->sup_10b_12b_444 == 0x1)
1347 dv->support_LL_RGB_444_10BIT = 1;
1348 if (dv->sup_10b_12b_444 == 0x2)
1349 dv->support_LL_RGB_444_12BIT = 1;
1350 }
1351 }
1352 }
1353}
1354
Wenjie Qiao8a73a562023-02-23 18:37:14 +08001355static void get_parse_edid_data(struct hdmitx_dev *hdev)
1356{
Wenjie Qiao8a73a562023-02-23 18:37:14 +08001357 hdev->hwop.read_edid(hdev->rawedid);
1358
ruofei.zhao4a2ec0c2023-10-31 19:24:41 +08001359 /* dump edid raw data */
1360 dump_full_edid(hdev->rawedid);
Wenjie Qiao8a73a562023-02-23 18:37:14 +08001361
1362 /* parse edid data */
xiang.wu114497ab2024-02-21 14:57:05 +08001363 hdmitx_edid_parse(&hdev->RXCap, hdev->rawedid);
Wenjie Qiao8a73a562023-02-23 18:37:14 +08001364
xiang.wu100ee50f2024-05-21 19:39:45 +08001365 /* Update the member variables used by the dv running strategy */
1366 hdmitx_update_dv_strategy_info(&hdev->RXCap.dv_info);
1367 hdmitx_update_dv_strategy_info(&hdev->RXCap.dv_info2);
1368
Wenjie Qiaoaf3ac882024-05-29 10:12:12 +08001369 memcpy(&hdev->tx_common.rxcap, &hdev->RXCap, sizeof(hdev->tx_common.rxcap));
Wenjie Qiao8a73a562023-02-23 18:37:14 +08001370}
1371
1372/* policy process: to find the output mode/attr/dv_type */
1373void scene_process(struct hdmitx_dev *hdev,
xiang.wu18cf0cd12024-06-13 15:27:52 +08001374 struct meson_policy_out *output)
Wenjie Qiao8a73a562023-02-23 18:37:14 +08001375{
xiang.wu18cf0cd12024-06-13 15:27:52 +08001376 struct meson_policy_in input;
Wenjie Qiao8a73a562023-02-23 18:37:14 +08001377
xiang.wu18cf0cd12024-06-13 15:27:52 +08001378 hdmitx_set_mode_policy();
1379 memset(&input, 0, sizeof(struct meson_policy_in));
1380 get_hdmi_input(hdev, &input);
1381 hdmitx_get_policy_output(output);
Wenjie Qiao8a73a562023-02-23 18:37:14 +08001382}
1383
1384static int do_get_parse_edid(cmd_tbl_t *cmdtp, int flag, int argc, char *const argv[])
1385{
1386 struct hdmitx_dev *hdev = get_hdmitx21_device();
1387 unsigned char *edid = hdev->rawedid;
1388 unsigned char *store_checkvalue;
Wenjie Qiao8a73a562023-02-23 18:37:14 +08001389 unsigned int i;
1390 unsigned int checkvalue[4];
1391 unsigned int checkvalue1;
1392 unsigned int checkvalue2;
1393 char checksum[11];
1394 unsigned char def_cksum[] = {'0', 'x', '0', '0', '0', '0', '0', '0', '0', '0', '\0'};
1395 char *hdmimode;
1396 char *colorattribute;
xiang.wu1a6d6f1d2023-08-04 14:13:00 +08001397 int user_dv_mode;
1398 char *last_output_mode;
1399 char *last_colorattribute;
1400 int last_dv_status;
1401 bool over_write = false;
Wenjie Qiao8a73a562023-02-23 18:37:14 +08001402 char dv_type[2] = {0};
xiang.wu18cf0cd12024-06-13 15:27:52 +08001403 struct meson_policy_out output;
Wenjie Qiao389d3ea2023-05-25 16:07:03 +08001404 struct hdmi_format_para *para = NULL;
1405 bool mode_support = false;
lizhi.hu506ddfa2024-07-10 21:35:41 +08001406 /*
1407 * hdmi_mode / colorattribute may be null or "none".
Wenjie Qiao389d3ea2023-05-25 16:07:03 +08001408 * if either is null or "none", it means user not
1409 * selected manually, and need to select the best
1410 * mode or colorattribute by policy
1411 */
1412 bool no_manual_output = false;
Wenjie Qiao8a73a562023-02-23 18:37:14 +08001413
zongdong.jiaob6fa9962024-08-25 19:51:48 +08001414 memset(edid, 0, EDID_BLK_SIZE * EDID_MAX_BLOCK);
1415
Wenjie Qiao4bdbbee2024-02-01 10:16:44 +08001416 if (!hdev->hpd_state) {
Wenjie Qiao8a73a562023-02-23 18:37:14 +08001417 printf("HDMI HPD low, no need parse EDID\n");
1418 return 1;
1419 }
xiang.wu18cf0cd12024-06-13 15:27:52 +08001420 memset(&output, 0, sizeof(struct meson_policy_out));
Wenjie Qiao8a73a562023-02-23 18:37:14 +08001421
1422 get_parse_edid_data(hdev);
zongdong.jiaob6fa9962024-08-25 19:51:48 +08001423 /*
1424 * QMS BRR selection
1425 * 120 or 60
1426 * TX cap & Rx Cap
1427 */
1428 if (0)
1429 qms_scene_pre_process(hdev);
Wenjie Qiao8a73a562023-02-23 18:37:14 +08001430
1431 /* check if the tv has changed or anything wrong */
1432 store_checkvalue = (unsigned char *)env_get("hdmichecksum");
Wenjie Qiao389d3ea2023-05-25 16:07:03 +08001433 /* get user selected output mode/color */
1434 colorattribute = env_get("user_colorattribute");
Wenjie Qiao8a73a562023-02-23 18:37:14 +08001435 hdmimode = env_get("hdmimode");
xiang.wu1a6d6f1d2023-08-04 14:13:00 +08001436 user_dv_mode = get_ubootenv_dv_type();
1437
1438 last_output_mode = env_get("outputmode");
1439 last_colorattribute = env_get("colorattribute");
1440 last_dv_status = get_ubootenv_dv_status();
Wenjie Qiao8a73a562023-02-23 18:37:14 +08001441 if (!store_checkvalue)
1442 store_checkvalue = def_cksum;
1443
xiang.wu1a6d6f1d2023-08-04 14:13:00 +08001444 printf("read hdmichecksum: %s, user hdmimode: %s, colorattribute: %s, dv_type: %d\n",
Wenjie Qiao389d3ea2023-05-25 16:07:03 +08001445 store_checkvalue, hdmimode ? hdmimode : "null",
xiang.wu1a6d6f1d2023-08-04 14:13:00 +08001446 colorattribute ? colorattribute : "null", user_dv_mode);
Wenjie Qiao8a73a562023-02-23 18:37:14 +08001447
1448 for (i = 0; i < 4; i++) {
1449 if (('0' <= store_checkvalue[i * 2 + 2]) && (store_checkvalue[i * 2 + 2] <= '9'))
1450 checkvalue1 = store_checkvalue[i * 2 + 2] - '0';
1451 else
1452 checkvalue1 = store_checkvalue[i * 2 + 2] - 'W';
1453 if (('0' <= store_checkvalue[i * 2 + 3]) && (store_checkvalue[i * 2 + 3] <= '9'))
1454 checkvalue2 = store_checkvalue[i * 2 + 3] - '0';
1455 else
1456 checkvalue2 = store_checkvalue[i * 2 + 3] - 'W';
1457 checkvalue[i] = checkvalue1 * 16 + checkvalue2;
1458 }
1459
1460 if (checkvalue[0] != hdev->rawedid[0x7f] ||
1461 checkvalue[1] != hdev->rawedid[0xff] ||
1462 checkvalue[2] != hdev->rawedid[0x17f] ||
1463 checkvalue[3] != hdev->rawedid[0x1ff]) {
1464 hdev->RXCap.edid_changed = 1;
1465
1466 checksum[0] = '0';
1467 checksum[1] = 'x';
1468 for (i = 0; i < 4; i++)
1469 xtochar(0x80 * i + 0x7f, &checksum[2 * i + 2]);
1470 checksum[10] = '\0';
xiang.wu114497ab2024-02-21 14:57:05 +08001471 memcpy(hdev->RXCap.hdmichecksum, checksum, 10);
Wenjie Qiao389d3ea2023-05-25 16:07:03 +08001472 printf("TV has changed, now crc: %s\n", checksum);
Wenjie Qiao8a73a562023-02-23 18:37:14 +08001473 } else {
xiang.wu114497ab2024-02-21 14:57:05 +08001474 memcpy(hdev->RXCap.hdmichecksum, store_checkvalue, 10);
1475 printf("TV is same, checksum: %s\n", hdev->RXCap.hdmichecksum);
Wenjie Qiao8a73a562023-02-23 18:37:14 +08001476 }
1477
Wenjie Qiao389d3ea2023-05-25 16:07:03 +08001478 /* check user have selected both mode/color or not */
1479 if (!hdmimode || !strcmp(hdmimode, "none") ||
1480 !colorattribute || !strcmp(colorattribute, "none"))
1481 no_manual_output = true;
1482 else
1483 no_manual_output = false;
1484
1485 if (!no_manual_output) {
1486 /* check current user selected mode + color support or not */
1487 para = hdmitx21_get_fmtpara(hdmimode, colorattribute);
Wenjie Qiaoaf3ac882024-05-29 10:12:12 +08001488 if (!hdmitx_common_validate_format_para(&hdev->tx_common, para)) {
Wenjie Qiao389d3ea2023-05-25 16:07:03 +08001489 mode_support = true;
xiang.wu1a6d6f1d2023-08-04 14:13:00 +08001490 } else {
1491 printf("saved output mode not supported!\n");
Wenjie Qiao389d3ea2023-05-25 16:07:03 +08001492 mode_support = false;
xiang.wu1a6d6f1d2023-08-04 14:13:00 +08001493 }
1494
lizhi.hu506ddfa2024-07-10 21:35:41 +08001495 /*
1496 * if user selected mode/color/dv type which saved in ubootenv of
xiang.wu1a6d6f1d2023-08-04 14:13:00 +08001497 * hdmimode/user_colorattribute/user_prefer_dv_type are different
1498 * with last actual output mode/color/dv type which saved in
1499 * ubootenv of outputmode/colorattribute/dolby_status, then it means
1500 * that the user selected format is over-writen by policy(for example:
1501 * firstly user has selected HDR priority to HDR, and select color
1502 * to rgb,12bit(now the "user_colorattribute" env will be "rgb,12bit"),
1503 * but then it selected HDR priority to DV, the actual output color
1504 * will be "444,8bit" or "422,12bit" according to dv type, and
1505 * the ubootenv "colorattribute" will be "444,8bit" or "422,12bit"),
1506 * then uboot should use the policy to select the output format,
1507 * otherwise, uboot use hdmimode/user_colorattribute/user_prefer_dv_type
1508 * env, while system use outputmode/colorattribute/dolby_status env,
1509 * there will be always a mode change during bootup
1510 */
1511 if (mode_support) {
lizhi.hu506ddfa2024-07-10 21:35:41 +08001512 /*
1513 * note that for T7 multi-display, it may store panel in
xiang.wu1a6d6f1d2023-08-04 14:13:00 +08001514 * "outputmode" env, and will always run uboot policy
1515 */
1516 if (!last_output_mode || strcmp(hdmimode, last_output_mode))
1517 over_write = true;
1518 else if (!last_colorattribute ||
1519 strcmp(colorattribute, last_colorattribute))
1520 over_write = true;
1521 else if (user_dv_mode != last_dv_status)
1522 over_write = true;
1523 else
1524 over_write = false;
1525
1526 if (over_write)
1527 printf("last output_mode:%s, colorattribute:%s, dolby_status:%d\n",
1528 last_output_mode ? last_output_mode : "null",
1529 last_colorattribute ? last_colorattribute : "null",
1530 last_dv_status);
1531 }
Wenjie Qiao389d3ea2023-05-25 16:07:03 +08001532 }
lizhi.hu506ddfa2024-07-10 21:35:41 +08001533 /*
1534 * When outputting frl mode, if frl training fails under uboot,
xiang.wu1dba66a02024-05-28 19:53:01 +08001535 * in order to ensure that it is displayed under uboot, change
1536 * to the default TMDS mode for output display. systemctrl
1537 * maintains the original 8k policy. After the subsequent systermctrl
1538 * starts running, if it is checked that the current output is not the
1539 * original frl mode, it will switch to the original frl mode.
1540 */
1541 if (hdev->frl_train_fail_flag) {
1542 save_default_720p();
1543 } else if (hdev->RXCap.edid_changed || no_manual_output || !mode_support || over_write) {
lizhi.hu506ddfa2024-07-10 21:35:41 +08001544 /*
1545 * 4 cases need to decide output by uboot mode select policy:
Wenjie Qiao389d3ea2023-05-25 16:07:03 +08001546 * 1.TV changed
1547 * 2.either hdmimode or colorattribute is NULL or "none",
1548 * which means that user have not selected mode or colorattribute,
1549 * and need to select the auto best mode or best colorattribute.
1550 * 3.user selected mode not supportted by uboot (probably
1551 * means mode select policy or edid parse between sysctrl and
1552 * uboot have some gap), then need to find proper output mode
1553 * with uboot policy.
Wenjie Qiao4bdbbee2024-02-01 10:16:44 +08001554 * 4.user selected mode is over writen by system policy
Wenjie Qiao389d3ea2023-05-25 16:07:03 +08001555 */
Wenjie Qiao8a73a562023-02-23 18:37:14 +08001556 /* find proper mode if EDID changed */
xiang.wu18cf0cd12024-06-13 15:27:52 +08001557 scene_process(hdev, &output);
xiang.wu114497ab2024-02-21 14:57:05 +08001558 env_set("hdmichecksum", hdev->RXCap.hdmichecksum);
1559 if (hdmitx_edid_check_data_valid(0, hdev->rawedid)) {
lizhi.hu506ddfa2024-07-10 21:35:41 +08001560 /*
1561 * SWPL-34712: if EDID parsing error case, not save env,
Wenjie Qiao8a73a562023-02-23 18:37:14 +08001562 * only output default mode(480p,RGB,8bit). after
1563 * EDID read OK, systemcontrol will recover the hdmi
1564 * mode from env, to avoid keep the default hdmi output
1565 */
xiang.wu18cf0cd12024-06-13 15:27:52 +08001566 memcpy(sel_hdmimode, output.displaymode,
1567 sizeof(output.displaymode));
lizhi.hu506ddfa2024-07-10 21:35:41 +08001568 /* The outputmode must be saved based on the value of connectorX_type. */
1569 if (env_get("connector0_type") &&
1570 is_valid_hdmi(env_get("connector0_type"))) {
1571 env_set("outputmode", output.displaymode);
1572 } else if (env_get("connector1_type") &&
1573 is_valid_hdmi(env_get("connector1_type"))) {
1574 env_set("outputmode2", output.displaymode);
1575 } else if (env_get("connector2_type") &&
1576 is_valid_hdmi(env_get("connector2_type"))) {
1577 env_set("outputmode3", output.displaymode);
1578 } else {
1579 pr_info("no config connectorX_type, save default %s outputmode\n",
xiang.wu18cf0cd12024-06-13 15:27:52 +08001580 output.displaymode);
lizhi.hu506ddfa2024-07-10 21:35:41 +08001581 env_set("outputmode", output.displaymode);
Wenjie Qiao8a73a562023-02-23 18:37:14 +08001582 }
1583 env_set("colorattribute",
xiang.wu18cf0cd12024-06-13 15:27:52 +08001584 output.deepcolor);
lizhi.hu506ddfa2024-07-10 21:35:41 +08001585 /*
1586 * if change from DV TV to HDR/SDR TV, don't change
Wenjie Qiao8a73a562023-02-23 18:37:14 +08001587 * DV status to disabled, as DV core need to be enabled.
xiang.wu1a6d6f1d2023-08-04 14:13:00 +08001588 * that's to say connect DV TV & output DV-> power down box ->
1589 * connect HDR/SDR TV -> power on box, the dolby_status
1590 * will keep the same as that when connect DV TV under follow sink.
Wenjie Qiao8a73a562023-02-23 18:37:14 +08001591 */
xiang.wu18cf0cd12024-06-13 15:27:52 +08001592 if (output.amdv_type != get_ubootenv_dv_status() &&
1593 output.amdv_type != DOLBY_VISION_DISABLE) {
1594 sprintf(dv_type, "%d", output.amdv_type);
Wenjie Qiao8a73a562023-02-23 18:37:14 +08001595 env_set("dolby_status", dv_type);
lizhi.hu506ddfa2024-07-10 21:35:41 +08001596 /*
1597 * according to the policy of systemcontrol,
Wenjie Qiao8a73a562023-02-23 18:37:14 +08001598 * if current DV mode is not supported by TV
1599 * EDID, DV type maybe changed to one witch
1600 * TV support, and need VPP/DV module to
1601 * update new DV output mode.
1602 */
xiang.wu1a6d6f1d2023-08-04 14:13:00 +08001603 printf("update dolby_status: %d\n",
xiang.wu18cf0cd12024-06-13 15:27:52 +08001604 output.amdv_type);
Wenjie Qiao8a73a562023-02-23 18:37:14 +08001605 }
Wenjie Qiao389d3ea2023-05-25 16:07:03 +08001606 } else {
1607 save_default_720p();
Wenjie Qiao8a73a562023-02-23 18:37:14 +08001608 }
Wenjie Qiao389d3ea2023-05-25 16:07:03 +08001609 printf("update outputmode: %s\n", sel_hdmimode);
Wenjie Qiao8a73a562023-02-23 18:37:14 +08001610 printf("update colorattribute: %s\n", env_get("colorattribute"));
1611 printf("update hdmichecksum: %s\n", env_get("hdmichecksum"));
Wenjie Qiao389d3ea2023-05-25 16:07:03 +08001612 } else {
1613 memset(sel_hdmimode, 0, sizeof(sel_hdmimode));
1614 memcpy(sel_hdmimode, hdmimode, strlen(hdmimode));
1615 if (is_hdmi_mode(env_get("outputmode")))
1616 env_set("outputmode", hdmimode);
1617 else if (is_hdmi_mode(env_get("outputmode2")))
1618 env_set("outputmode2", hdmimode);
1619 else if (is_hdmi_mode(env_get("outputmode3")))
1620 env_set("outputmode3", hdmimode);
1621 env_set("colorattribute", colorattribute);
Wenjie Qiao8a73a562023-02-23 18:37:14 +08001622 }
xiang.wu1a6d6f1d2023-08-04 14:13:00 +08001623 env_set("save_outputmode", sel_hdmimode);
zongdong.jiaob6fa9962024-08-25 19:51:48 +08001624 /*
1625 * ubootenv dolby_status is used for is_dv_preference() decision,
xiang.wu1a6d6f1d2023-08-04 14:13:00 +08001626 * system_control save current dv output status in it.
1627 * it will be used by dv module later to decide DV output later.
1628 * if currently adaptive hdr, then we should set dolby_status to
1629 * 0, so that DV module won't enable DV.
1630 */
1631 if (get_hdr_policy() == 1)
1632 env_set("dolby_status", 0);
Wenjie Qiao389d3ea2023-05-25 16:07:03 +08001633 hdev->para = hdmitx21_get_fmtpara(sel_hdmimode, env_get("colorattribute"));
Wenjie Qiao8a73a562023-02-23 18:37:14 +08001634 hdev->vic = hdev->para->timing.vic;
xiang.wu18cf0cd12024-06-13 15:27:52 +08001635
1636 /* update the hdr/hdr10+/dv capabilities in the end of scene_process */
1637 int hdr_priority = get_hdr_strategy_priority();
1638
1639 if (hdr_priority != -1) {
1640 hdmitx_set_hdr_priority(&hdev->RXCap, hdr_priority);
1641 memcpy(&hdev->tx_common.rxcap, &hdev->RXCap, sizeof(hdev->tx_common.rxcap));
1642 }
1643
Wenjie Qiao8a73a562023-02-23 18:37:14 +08001644 hdmitx_mask_rx_info(hdev);
Wenjie Qiaoaf3ac882024-05-29 10:12:12 +08001645 hdev->para->frl_rate = hdmitx_select_frl_rate(&hdev->para->dsc_en,
1646 hdev->tx_common.tx_hw->hdmi_tx_cap.dsc_policy,
1647 hdev->para->vic, hdev->para->cs,
1648 hdev->para->cd);
Wenjie Qiao4bdbbee2024-02-01 10:16:44 +08001649 return 0;
1650}
1651
1652static int do_dsc_policy(cmd_tbl_t *cmdtp, int flag, int argc, char *const argv[])
1653{
1654 struct hdmitx_dev *hdev = get_hdmitx21_device();
Wenjie Qiaoaf3ac882024-05-29 10:12:12 +08001655 struct tx_cap *txcap = &hdev->tx_common.tx_hw->hdmi_tx_cap;
Wenjie Qiao4bdbbee2024-02-01 10:16:44 +08001656
1657 if (argc < 1)
1658 return cmd_usage(cmdtp);
1659
1660 if (strcmp(argv[1], "0") == 0)
Wenjie Qiaoaf3ac882024-05-29 10:12:12 +08001661 txcap->dsc_policy = 0;
Wenjie Qiao4bdbbee2024-02-01 10:16:44 +08001662 else if (strcmp(argv[1], "1") == 0)
Wenjie Qiaoaf3ac882024-05-29 10:12:12 +08001663 txcap->dsc_policy = 1;
Wenjie Qiao4bdbbee2024-02-01 10:16:44 +08001664 else if (strcmp(argv[1], "2") == 0)
Wenjie Qiaoaf3ac882024-05-29 10:12:12 +08001665 txcap->dsc_policy = 2;
Wenjie Qiao4bdbbee2024-02-01 10:16:44 +08001666 else if (strcmp(argv[1], "3") == 0)
Wenjie Qiaoaf3ac882024-05-29 10:12:12 +08001667 txcap->dsc_policy = 3;
Wenjie Qiao4bdbbee2024-02-01 10:16:44 +08001668 else if (strcmp(argv[1], "4") == 0)
Wenjie Qiaoaf3ac882024-05-29 10:12:12 +08001669 txcap->dsc_policy = 4;
Wenjie Qiao4bdbbee2024-02-01 10:16:44 +08001670 else
1671 printf("note: please set dsc policy as 0~4\n");
Wenjie Qiaoaf3ac882024-05-29 10:12:12 +08001672 if (txcap->dsc_policy <= 4)
1673 printf("use dsc policy: %d\n", txcap->dsc_policy);
Wenjie Qiao4bdbbee2024-02-01 10:16:44 +08001674
1675 return CMD_RET_SUCCESS;
1676}
1677
1678static int do_manual_frl_rate(cmd_tbl_t *cmdtp, int flag, int argc, char *const argv[])
1679{
1680 struct hdmitx_dev *hdev = get_hdmitx21_device();
1681 unsigned int temp = 0;
1682 char *ptr;
1683
1684 /* if rx don't support FRL, return */
1685 if (!hdev->RXCap.max_frl_rate) {
1686 printf("rx not support FRL\n");
1687 return 0;
1688 }
1689
1690 temp = strtoul(argv[1], &ptr, 16);
1691 /* forced FRL rate setting */
1692 if (temp <= 6) {
1693 hdev->manual_frl_rate = temp;
1694 pr_info("force set frl_rate as %d\n", hdev->manual_frl_rate);
1695 } else {
1696 pr_info("error: should set frl_rate in 0 ~ 6\n");
1697 }
1698 if (hdev->manual_frl_rate > hdev->RXCap.max_frl_rate)
1699 pr_info("warning: larger than rx max_frl_rate %d\n", hdev->RXCap.max_frl_rate);
1700 return 0;
1701}
1702
1703static int do_manual_dfm_type(cmd_tbl_t *cmdtp, int flag, int argc, char *const argv[])
1704{
1705 struct hdmitx_dev *hdev = get_hdmitx21_device();
1706 unsigned int temp = 0;
1707 char *ptr;
1708
1709 temp = strtoul(argv[1], &ptr, 10);
1710 /* forced dfm_type setting */
1711 if (temp <= 2) {
1712 hdev->dfm_type = temp;
1713 pr_info("force set dfm_type as %d\n", hdev->dfm_type);
1714 } else {
1715 pr_info("error: should set frl_rate in 0 ~ 2\n");
1716 }
Wenjie Qiao8a73a562023-02-23 18:37:14 +08001717 return 0;
1718}
1719
Wenjie Qiao77833902023-12-18 19:01:59 +08001720#ifdef CONFIG_EFUSE_OBJ_API
1721static int do_efuse_show(cmd_tbl_t *cmdtp, int flag, int argc, char *const argv[])
1722{
1723 struct hdmitx_dev *hdev = get_hdmitx21_device();
1724
1725 get_hdmi_efuse(hdev);
Wenjie Qiaoaf3ac882024-05-29 10:12:12 +08001726 pr_info("FEAT_DISABLE_HDMI_60HZ = %d\n", hdev->tx_common.efuse_dis_hdmi_4k60);
1727 pr_info("FEAT_DISABLE_OUTPUT_4K = %d\n", hdev->tx_common.efuse_dis_output_4k);
1728 pr_info("FEAT_DISABLE_HDCP_TX_22 = %d\n", hdev->tx_common.efuse_dis_hdcp_tx22);
1729 pr_info("FEAT_DISABLE_HDMI_TX_3D = %d\n", hdev->tx_common.efuse_dis_hdmi_tx3d);
1730 pr_info("FEAT_DISABLE_HDMI = %d\n", hdev->tx_common.efuse_dis_hdcp_tx14);
Wenjie Qiao77833902023-12-18 19:01:59 +08001731
1732 return 0;
1733}
1734#endif
1735
Wenjie Qiao8a73a562023-02-23 18:37:14 +08001736static cmd_tbl_t cmd_hdmi_sub[] = {
1737 U_BOOT_CMD_MKENT(hpd, 1, 1, do_hpd_detect, "", ""),
Wenjie Qiao8a73a562023-02-23 18:37:14 +08001738 U_BOOT_CMD_MKENT(rx_det, 1, 1, do_rx_det, "", ""),
1739 U_BOOT_CMD_MKENT(output, 3, 1, do_output, "", ""),
1740 U_BOOT_CMD_MKENT(clkmsr, 3, 1, do_clkmsr, "", ""),
1741 U_BOOT_CMD_MKENT(blank, 3, 1, do_blank, "", ""),
1742 U_BOOT_CMD_MKENT(off, 1, 1, do_off, "", ""),
1743 U_BOOT_CMD_MKENT(dump, 1, 1, do_dump, "", ""),
1744 U_BOOT_CMD_MKENT(info, 1, 1, do_info, "", ""),
Wenjie Qiao8a73a562023-02-23 18:37:14 +08001745 U_BOOT_CMD_MKENT(reg, 3, 1, do_reg, "", ""),
1746 U_BOOT_CMD_MKENT(get_parse_edid, 1, 1, do_get_parse_edid, "", ""),
Wenjie Qiao4bdbbee2024-02-01 10:16:44 +08001747 U_BOOT_CMD_MKENT(dsc_policy, 1, 1, do_dsc_policy, "", ""),
1748 U_BOOT_CMD_MKENT(frl_rate, 1, 1, do_manual_frl_rate, "", ""),
1749 U_BOOT_CMD_MKENT(dfm_type, 1, 1, do_manual_dfm_type, "", ""),
Wenjie Qiao77833902023-12-18 19:01:59 +08001750#ifdef CONFIG_EFUSE_OBJ_API
1751 U_BOOT_CMD_MKENT(efuse, 1, 1, do_efuse_show, "", ""),
1752#endif
xiang.wu1a6d6f1d2023-08-04 14:13:00 +08001753 U_BOOT_CMD_MKENT(pbist, 3, 1, do_pbist, "", ""),
1754 U_BOOT_CMD_MKENT(debug, 3, 1, do_debug, "", ""),
xiang.wu1492f3642024-01-08 14:06:40 +08001755 U_BOOT_CMD_MKENT(s7_clk_config, 3, 1, do_s7_clk_config, "", ""),
xiang.wu114497ab2024-02-21 14:57:05 +08001756 U_BOOT_CMD_MKENT(get_rterm, 3, 1, get_rterm, "", ""),
Wenjie Qiao8a73a562023-02-23 18:37:14 +08001757};
1758
1759static int do_hdmitx(cmd_tbl_t *cmdtp, int flag, int argc, char *const argv[])
1760{
1761 cmd_tbl_t *c;
1762
1763 if (argc < 2)
1764 return cmd_usage(cmdtp);
1765
1766 argc--;
1767 argv++;
1768
1769 c = find_cmd_tbl(argv[0], &cmd_hdmi_sub[0], ARRAY_SIZE(cmd_hdmi_sub));
1770
1771 if (c)
1772 return c->cmd(cmdtp, flag, argc, argv);
1773 else
1774 return cmd_usage(cmdtp);
1775}
1776
1777U_BOOT_CMD(hdmitx, CONFIG_SYS_MAXARGS, 0, do_hdmitx,
1778 "HDMITX sub-system",
1779 "hdmitx version:20200618\n"
1780 "hdmitx hpd\n"
1781 " Detect hdmi rx plug-in\n"
Wenjie Qiao8a73a562023-02-23 18:37:14 +08001782 "hdmitx output [list | FORMAT | bist PATTERN]\n"
1783 " list: list support formats\n"
1784 " FORMAT can be 720p60/50hz, 1080i60/50hz, 1080p60hz, etc\n"
1785 " extend with 8bits/10bits, y444/y422/y420/rgb\n"
1786 " such as 2160p60hz,10bits,y420\n"
1787 " PATTERN: can be as: line, dot, off, or 1920(width)\n"
1788 "hdmitx blank [0|1]\n"
1789 " 1: output blank 0: output normal\n"
1790 "hdmitx clkmsr\n"
1791 " show hdmitx clocks\n"
1792 "hdmitx off\n"
1793 " Turn off hdmitx output\n"
1794 "hdmitx info\n"
1795 " current mode info\n"
1796 "hdmitx rx_det\n"
1797 " Auto detect if RX is FBC and set outputmode\n"
1798);
1799
1800struct hdr_info *hdmitx_get_rx_hdr_info(void)
1801{
1802 struct hdmitx_dev *hdev = get_hdmitx21_device();
1803
1804 return &hdev->RXCap.hdr_info;
1805}
Wenjie Qiao4bdbbee2024-02-01 10:16:44 +08001806
1807static int do_list_dsc_mode(cmd_tbl_t *cmdtp, int flag, int argc, char *const argv[])
1808{
1809#ifdef CONFIG_AML_DSC_ENC
1810 dsc_enc_cap_show();
1811#endif
1812 return 0;
1813}
1814
1815static int do_dsc_debug(cmd_tbl_t *cmdtp, int flag, int argc, char *const argv[])
1816{
1817#ifdef CONFIG_AML_DSC_ENC
1818 dsc_debug(argc - 1, argv + 1);
1819#endif
1820 return 0;
1821}
1822
1823static cmd_tbl_t cmd_dsc_sub[] = {
1824 U_BOOT_CMD_MKENT(list_mode, 1, 1, do_list_dsc_mode, "", ""),
1825 U_BOOT_CMD_MKENT(dbg, 20, 1, do_dsc_debug, "", ""),
1826};
1827
1828static int do_dsc_enc(cmd_tbl_t *cmdtp, int flag, int argc, char *const argv[])
1829{
1830 cmd_tbl_t *c;
1831
1832 if (argc < 2)
1833 return cmd_usage(cmdtp);
1834
1835 argc--;
1836 argv++;
1837
1838 c = find_cmd_tbl(argv[0], &cmd_dsc_sub[0], ARRAY_SIZE(cmd_dsc_sub));
1839
1840 if (c)
1841 return c->cmd(cmdtp, flag, argc, argv);
1842 else
1843 return cmd_usage(cmdtp);
1844}
1845
1846U_BOOT_CMD(dsc, CONFIG_SYS_MAXARGS, 0, do_dsc_enc,
1847 "dsc cmd",
1848 "dsc help function\n"
1849 "dsc dbg state\n"
1850 " dump dsc status\n"
1851 "dsc dbg dump_reg\n"
1852 " dump dsc registers and venc registers\n"
1853 "dsc dbg read addr\n"
1854 " read dsc asic register\n"
1855 "dsc dbg write addr value\n"
1856 " write dsc asic register\n"
1857 "dsc dbg rst_dsc\n"
1858 " reset dsc enc\n"
1859 "dsc list_mode\n"
1860 " show supported dsc encode mode list\n"
1861);
1862